The Experts below are selected from a list of 38229 Experts worldwide ranked by ideXlab platform
Atanas Rountev - One of the best experts on this subject based on the ideXlab platform.
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leakchecker practical Static Memory leak detection for managed languages
Symposium on Code Generation and Optimization, 2014Co-Authors: Guoqing Xu, Shengqian Yang, Atanas RountevAbstract:Static detection of Memory leaks in a managed language such as Java is attractive because it does not rely on any leak-triggering inputs, allowing compile-time tools to find leaks before software is released. A long-standing issue that prevents practical Static Memory leak detection for Java is that it can be very expensive to Statically determine object liveness in large applications. We present a novel (and the first practical) Static leak detection technique that bypasses this problem by considering a common leak pattern. In many cases severe leaks occur in loops where, in each iteration, some objects created by the iteration are unnecessarily referenced by objects external to the loop. These unnecessary references are never used in later loop iterations. Based on this insight, we shift our focus from computing liveness, which is very difficult to achieve precisely and efficiently for large programs, to the easier goal of identifying objects that flow out of a loop but never flow back in. We formalize this analysis using a type and effect system and present its key properties. The analysis was implemented in a tool called LeakChecker and used to detect leaks in eight real-world programs, such as Eclipse, Derby, and log4j. LeakChecker not only identified known leaks, but also discovered new ones whose causes were unknown beforehand, while exhibiting a false positive rate suitable for practical use.
Jiri Petrzela - One of the best experts on this subject based on the ideXlab platform.
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Multi-valued Static Memory with resonant tunneling diodes as natural source of chaos
Nonlinear Dynamics, 2018Co-Authors: Jiri PetrzelaAbstract:This paper brings deep study focused on dynamical behavior associated with a multi-valued Static Memory (MVSM) cell composed by a pair of the resonant tunneling diodes. Ampere–voltage characteristic of these diodes is approximated by the piecewise-linear scalar function with two positive breakpoints. Initial linear analysis supposes separation of a state space into nine affine segments, while local vector field geometry and dynamical flow in each region are graphically visualized. It is shown that discovered chaotic solution is not a numerical artifact, is robust and can generate various dense structurally stable strange attractors. For numerical investigations concepts of the largest Lyapunov exponent, the basins of attraction and a conventional signal analysis are adopted. MVSM dynamics is then implemented as the lumped electronic circuits using different but universal analog design approaches. Proposed oscillators are optimized with respect to the simple one-to-one relations between the mathematical model parameters and adjustable-by-hand circuit components. The constructed chaotic oscillators strictly utilize only commercially available active devices. This makes true experimental verification of idea that chaos exists inside narrow regions of a hyperspace of the internal MVSM system parameters possible and easy task.
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strange attractors generated by multiple valued Static Memory cell with polynomial approximation of resonant tunneling diodes
Entropy, 2018Co-Authors: Jiri PetrzelaAbstract:This paper brings analysis of the multiple-valued Memory system (MVMS) composed by a pair of the resonant tunneling diodes (RTD). Ampere-voltage characteristic (AVC) of both diodes is approximated in operational voltage range as common in practice: by polynomial scalar function. Mathematical model of MVMS represents autonomous deterministic dynamical system with three degrees of freedom and smooth vector field. Based on the very recent results achieved for piecewise-linear MVMS numerical values of the parameters are calculated such that funnel and double spiral chaotic attractor is observed. Existence of such types of strange attractors is proved both numerically by using concept of the largest Lyapunov exponents (LLE) and experimentally by computer-aided simulation of designed lumped circuit using only commercially available active elements.
Ding Ye - One of the best experts on this subject based on the ideXlab platform.
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Static Memory leak detection using full sparse value flow analysis
International Symposium on Software Testing and Analysis, 2012Co-Authors: Ding YeAbstract:We introduce a Static detector, Saber, for detecting Memory leaks in C programs. Leveraging recent advances on sparse pointer analysis, Saber is the first to use a full-sparse value-flow analysis for leak detection. Saber tracks the flow of values from allocation to free sites using a sparse value-flow graph (SVFG) that captures def-use chains and value flows via assignments for all Memory locations represented by both top-level and address-taken pointers. By exploiting field-, flow- and context-sensitivity during different phases of the analysis, Saber detects leaks in a program by solving a graph reachability problem on its SVFG. Saber, which is fully implemented in Open64, is effective at detecting 211 leaks in the 15 SPEC2000 C programs and five applications, while keeping the false positive rate at 18.5%. We have also compared Saber with Fastcheck (which analyzes allocated objects flowing only into top-level pointers) and Sparrow (which handles all allocated objects using abstract interpretation) using the 15 SPEC2000 C programs. Saber is as accurate as Sparrow but is 14.2X faster and reports 40.7% more bugs than Fastcheck at a slightly higher false positive rate but is only 3.7X slower.
Guoqing Xu - One of the best experts on this subject based on the ideXlab platform.
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leakchecker practical Static Memory leak detection for managed languages
Symposium on Code Generation and Optimization, 2014Co-Authors: Guoqing Xu, Shengqian Yang, Atanas RountevAbstract:Static detection of Memory leaks in a managed language such as Java is attractive because it does not rely on any leak-triggering inputs, allowing compile-time tools to find leaks before software is released. A long-standing issue that prevents practical Static Memory leak detection for Java is that it can be very expensive to Statically determine object liveness in large applications. We present a novel (and the first practical) Static leak detection technique that bypasses this problem by considering a common leak pattern. In many cases severe leaks occur in loops where, in each iteration, some objects created by the iteration are unnecessarily referenced by objects external to the loop. These unnecessary references are never used in later loop iterations. Based on this insight, we shift our focus from computing liveness, which is very difficult to achieve precisely and efficiently for large programs, to the easier goal of identifying objects that flow out of a loop but never flow back in. We formalize this analysis using a type and effect system and present its key properties. The analysis was implemented in a tool called LeakChecker and used to detect leaks in eight real-world programs, such as Eclipse, Derby, and log4j. LeakChecker not only identified known leaks, but also discovered new ones whose causes were unknown beforehand, while exhibiting a false positive rate suitable for practical use.
Denis Flandre - One of the best experts on this subject based on the ideXlab platform.
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low leakage soi cmos Static Memory cell with ultra low power diode
IEEE Journal of Solid-state Circuits, 2007Co-Authors: David Levacq, Vincent Dessard, Denis FlandreAbstract:A new CMOS digital storage device is developed based on the combination of two reverse biased composite CMOS diodes, each of them featuring ultra-low leakage and a negative impedance characteristic in reverse mode. The biasing of MOS transistors in very weak inversion, with negative gate-to-source voltages, results in a Static current that lays orders of magnitude below that of conventional cross-coupled CMOS inverters. Based on our device, a 7-transistors SRAM cell is presented. Modeling, simulation and experimental characterization of the main properties of this cell are reported for a 0.13 mum partially-depleted SOI CMOS process. The feasibility of ultra-low leakage Memory circuits is demonstrated experimentally by the design of a 256 times 1 bits SRAM column.