The Experts below are selected from a list of 303 Experts worldwide ranked by ideXlab platform
Tsunenobu Kimoto - One of the best experts on this subject based on the ideXlab platform.
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analytical model for reduction of deep levels in sic by Thermal Oxidation
Journal of Applied Physics, 2012Co-Authors: Koutarou Kawahara, Jun Suda, Tsunenobu KimotoAbstract:Two trap-reduction processes, Thermal Oxidation and C+ implantation followed by Ar annealing, have been discovered, being effective ways for reducing the Z1/2 center (EC – 0.67 eV), which is a lifetime killer in n-type 4H-SiC. In this study, it is shown that new deep levels are generated by the trap-reduction processes in parallel with the reduction of the Z1/2 center. A comparison of defect behaviors (reduction, generation, and change of the depth profile) for the two trap-reduction processes shows that the reduction of deep levels by Thermal Oxidation can be explained by an interstitial diffusion model. Prediction of the defect distributions after Oxidation was achieved by a numerical calculation based on a diffusion equation, in which interstitials generated at the SiO2/SiC interface diffuse to the SiC bulk and occupy vacancies related to the origin of the Z1/2 center. The prediction based on the proposed analytical model is mostly valid for SiC after Oxidation at any temperature, for any Oxidation tim...
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reduction of deep levels and improvement of carrier lifetime in n type 4h sic by Thermal Oxidation
Applied Physics Express, 2009Co-Authors: Toru Hiyoshi, Tsunenobu KimotoAbstract:Significant reduction of major deep levels in n-type 4H-SiC(0001) epilayers by means of Thermal Oxidation is demonstrated. By Thermal Oxidation of epilayers at 1150–1300 °C, the concentration of the Z1/2 and EH6/7 centers has been reduced from (0.3–2)×1013 cm-3 to below the detection limit (1×1011 cm-3). The depth-profile analysis of the Z1/2 center has revealed that the Z1/2 center is eliminated to a depth of about 50 µm from the surface after Thermal Oxidation at 1300 °C for 5 h. The carrier lifetime in an n-type 4H-SiC epilayer measured by differential microwave photoconductance decay has been significantly improved from 0.73 µs (as-grown) to 1.62 µs (after Oxidation: 1300 °C, 5 h×2). The reduction mechanism of the Z1/2 and EH6/7 centers is discussed.
I. Ya. Mittova - One of the best experts on this subject based on the ideXlab platform.
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Phosphomolybdic acid-assisted Thermal Oxidation of GaAs
Russian Microelectronics, 2007Co-Authors: I. Ya. Mittova, S. S. Lavrushina, E. V. Lebedeva, A. V. PopeloAbstract:An experimental investigation is conducted into the Thermal Oxidation of GaAs assisted by phosphomolybdic acid. The mechanism of the process is identified. It is established that oxide films thus produced consist mainly of GaPO4 and are superior in insulating performance to ones made by conventional Thermal Oxidation.
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Effect of PbO layers with nickel oxide and vanadium oxide additions on the Thermal Oxidation of InP
Inorganic Materials, 2006Co-Authors: I. Ya. Mittova, A. A. SamsonovAbstract:IR and ultrasoft x-ray emission spectroscopy data indicate that the Thermal Oxidation of PbO/InP structures with additions of transition-metal (nickel and vanadium) oxides leads to the formation of multicomponent layers consisting of nickel, vanadium, lead, and indium phosphates. These oxide additions to PbO nanolayers accelerate the Thermal Oxidation of InP. A small amount of vanadium oxide added to PbO gives rise to a significant contribution of a catalytic mechanism to the accelerated Thermal Oxidation of InP. The principal distinction between the PbO/InP and (PbO + NiO)/InP structures is that the Thermal Oxidation of the latter leads to the formation of an In_xNi_yP_z transition layer, which influences the growth rate and the composition of the resulting layer.
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Thermal Oxidation of InP surfaces modified with NiO + PbO mixtures
Inorganic Materials, 2005Co-Authors: I. Ya. Mittova, E. V. Tomina, A. A. Samsonov, A. N. Lukin, S. P. SimonovAbstract:It is shown by IR spectroscopy that the Thermal Oxidation of (NiO + PbO)/InP structures leads to the formation of nickel and lead polyphosphates and indium ortho- and metaphosphates. The nickel phosphates may then gradually transform into diphosphates, depending on the Oxidation temperature, whereas the lead phosphates undergo no changes.
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Solid-State Reactions during Thermal Oxidation of Vanadium-Modified GaAs Surfaces
Inorganic Materials, 2004Co-Authors: I. Ya. Mittova, E. V. Tomina, A. A. Lapenko, A. O. KhorokhordinaAbstract:It is shown that vanadium layers deposited by magnetron sputtering onto GaAs accelerate surface oxide growth during Thermal Oxidation. The processes occurring during Thermal Oxidation on the surface and at the semiconductor–metal interface are interpreted under the assumption that vanadium deposition leads to the formation of an interfacial V_ x Ga_ y As_ z layer, which plays a key role in determining the mechanism of V/GaAs Oxidation.
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Solid-Phase Reactions in the Thermal Oxidation of Ni/GaAs Heterostructures
Russian Microelectronics, 2002Co-Authors: I. Ya. Mittova, E. V. Tomina, A. S. Sukhochev, A. N. Prokin, A. O. VasyukevichAbstract:The Thermal Oxidation of GaAs covered with an Ni layer is studied experimentally. It is shown that this layer makes for better dielectric performance of the oxide film and inhibits the escape of the volatiles from GaAs. A possible pattern of the Oxidation of Ni/GaAs heterostructures is put forward. It includes the formation of a transition layer between NiO and GaAs, which contains nickel–arsenic and nickel–gallium compounds. Reactions at the interface between the transition layer and NiO are considered.
L G Matus - One of the best experts on this subject based on the ideXlab platform.
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Thermal Oxidation of sic in n 2 o
Journal of The Electrochemical Society, 1994Co-Authors: R C De Meo, T K Wang, T P Chow, Dale M Brown, L G MatusAbstract:Thermal Oxidation kinetics of 3C and 6H-SiC in N 2 O at 1050 to 1150 o C have been studied. The Oxidation rate follows an unusual parabolic-linear relationship that has also been found for Oxidation of silicon in N 2 O. The activation energy of the parabolic rate constant (B) is 3.1±0.22 eV/molecule for 3C-SiC, and 4.80±1.02 eV/molecule for 6H-SiC. The limiting mechanism for Oxidation is attributed to the diffusion of CO through the oxynitride layer. 3C-SiC metal oxide semiconductor capacitors fabricated in N 2 O exhibit fixed oxide charge densities on the order of 10 12 cm -2 and are slightly lower than those oxidized in steam
Koutarou Kawahara - One of the best experts on this subject based on the ideXlab platform.
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analytical model for reduction of deep levels in sic by Thermal Oxidation
Journal of Applied Physics, 2012Co-Authors: Koutarou Kawahara, Jun Suda, Tsunenobu KimotoAbstract:Two trap-reduction processes, Thermal Oxidation and C+ implantation followed by Ar annealing, have been discovered, being effective ways for reducing the Z1/2 center (EC – 0.67 eV), which is a lifetime killer in n-type 4H-SiC. In this study, it is shown that new deep levels are generated by the trap-reduction processes in parallel with the reduction of the Z1/2 center. A comparison of defect behaviors (reduction, generation, and change of the depth profile) for the two trap-reduction processes shows that the reduction of deep levels by Thermal Oxidation can be explained by an interstitial diffusion model. Prediction of the defect distributions after Oxidation was achieved by a numerical calculation based on a diffusion equation, in which interstitials generated at the SiO2/SiC interface diffuse to the SiC bulk and occupy vacancies related to the origin of the Z1/2 center. The prediction based on the proposed analytical model is mostly valid for SiC after Oxidation at any temperature, for any Oxidation tim...
Koji Kita - One of the best experts on this subject based on the ideXlab platform.
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fabrication of sio2 4h sic 0001 interface with nearly ideal capacitance voltage characteristics by Thermal Oxidation
Applied Physics Letters, 2014Co-Authors: Richard Heihachiro Kikuchi, Koji KitaAbstract:We fabricated SiO2/4H-SiC (0001) metal-oxide-semiconductor capacitors with nearly ideal capacitance-voltage characteristics, simply by the control of Thermal Oxidation conditions which were selected based on thermodynamic and kinetic considerations of SiC Oxidation. The interface with low interface defect state density <1011 cm−2 eV−1 for the energy range of 0.1–0.4 eV below the conduction band of SiC was obtained by Thermal Oxidation at 1300 °C in a ramp-heating furnace with a short rise/fall time, followed by low temperature O2 anneal at 800 °C.
