The Experts below are selected from a list of 12471 Experts worldwide ranked by ideXlab platform

Hyun Jae Kim - One of the best experts on this subject based on the ideXlab platform.

Potsun Liu - One of the best experts on this subject based on the ideXlab platform.

  • nitrogenated amorphous ingazno Thin Film Transistor
    Applied Physics Letters, 2011
    Co-Authors: Potsun Liu, Lifeng Teng, Yi Teh Chou, Han Ping Shieh
    Abstract:

    This work presents the electrical characteristics of the nitrogenated amorphous InGaZnO Thin Film Transistor (a-IGZO:N TFT). The a-IGZO:N Film acting as a channel layer of a Thin Film Transistor (TFT) device was prepared by dc reactive sputter with a nitrogen and argon gas mixture at room temperature. Experimental results show that the in situ nitrogen incorporation to IGZO Film can properly adjust the threshold voltage and enhance the ambient stability of a TFT device. Furthermore, the a-IGZO:N TFT has a 44% increase in the carrier mobility and electrical reliability and uniformity also progress obviously while comparing with those not implementing a nitrogen doping process.

  • nonvolatile polycrystalline silicon Thin Film Transistor memory with oxide nitride oxide stack gate dielectrics and nanowire channels
    Applied Physics Letters, 2007
    Co-Authors: Shih Ching Chen, Potsun Liu, Tingchang Chang, P H Yeh, Chi Feng Weng, S M Sze, Chunyen Chang, Chenhsin Lien
    Abstract:

    In this work, the authors study a polycrystalline silicon Thin-Film Transistor (poly-Si TFT) with oxide/nitride/oxide (ONO) stack gate dielectrics and multiple nanowire channels for the applications of both nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory and switch Transistor. The proposed device named as nanowire SONOS-TFT has superior electrical characteristics of a Transistor such as on/off current ratio, threshold voltage (Vth), and subthreshold slope due to the good gate control ability originated from fringing electrical field effects. Moreover, the proposed device under adequate operation scheme can exhibit high program/erase efficiency and good retention time characteristics at high temperature.

Jin Jang - One of the best experts on this subject based on the ideXlab platform.

  • bulk accumulation oxide Thin Film Transistor circuits with zero gate to drain overlap capacitance for high speed
    IEEE Electron Device Letters, 2015
    Co-Authors: Suhui Lee, Mallory Mativenga, Jin Jang
    Abstract:

    The overlap between gate and source/drain electrodes gives rise to parasitic capacitance ( $C_{\text {gd}}$ /), which causes RC signal delay in Thin-Film Transistor (TFT) circuits. Here, we show that in amorphous-indium–gallium–zinc-oxide TFTs, offsets as large as $0.5~\mu \text{m}$ , result in only slight reductions in drain-current, such that (compared with single-gate TFTs with 2.5- $\mu \text{m}$ gate-to-source/drain overlaps) an overall three times increase in switching speed can be achieved in dual-gate TFTs with offset top-gates shorted to offset bottom-gates. The high switching speed ( $\sim 18$ ns/stage delay), which is a combined effect of the bulk-accumulation achieved by shorting the two gates and zero $C_{\text {gd}}$ , results in high-speed amorphous oxide TFT-based circuits.

  • high performance n channel organic Thin Film Transistor for cmos circuits using electron donating self assembled layer
    IEEE Electron Device Letters, 2010
    Co-Authors: Sung Hoon Kim, Sun Hee Lee, Jin Jang
    Abstract:

    We introduce an electron-donating self-assembled monolayer (SAM) to improve the performance of solution-processed n-channel organic Thin-Film Transistor (OTFT) using an organic semiconductor (OS) of an N, N' bis-(octyl-)-dicyanoperylene-3,4:9,10-bis(dicarboximide) (PDI-8CN2). The OTFTs without SAM, with electron-withdrawing, and electron-donating layers, exhibited field-effect mobility of 0.02, 0.01, and 0.33 cm2/(V·s), respectively. The electron-donating thiophenol layer on source/drain electrodes shows a small injection barrier of 0.05 eV to the n-type OS and thus, exhibited field-effect mobility of 0.33 cm2/(V·s) and threshold voltage of -1.1 V.

  • high performance Thin Film Transistor with 6 13 bis triisopropylsilylethynyl pentacene by inkjet printing
    Organic Electronics, 2008
    Co-Authors: Min Hee Choi, Dong Joon Choo, Jin Jang, Soon Ki Kwon
    Abstract:

    Abstract We have studied the performance improvement of organic Thin-Film Transistor (OTFT) with a solution based TIPS pentacene (6,13-bis(triisopropylsilylethynyl)pentacene) by inkjet printing. The TIPS pentacene with 1.0 wt.% solution in 1,2-dichlorobenzene was used for printing of an active layer of OTFT. The OTFT printed at room temperature shows a shoulder-like behavior but it disappears for the OTFT printed at the substrate temperature of 60 °C. The OTFT on plastic exhibited an on/off current ratio of ∼10 7 , a threshold voltage of −2.0 V, a gate voltage swing of 0.6 V/decade and a field-effect mobility of 0.24 cm 2 /Vs in the saturation region.

Jinseong Park - One of the best experts on this subject based on the ideXlab platform.

  • high performance Thin Film Transistor with low temperature atomic layer deposition nitrogen doped zno
    Applied Physics Letters, 2007
    Co-Authors: S J Lim, Soon Ju Kwon, Hyungjun Kim, Jinseong Park
    Abstract:

    High performance Thin Film Transistor (TFT) with atomic layer deposition (ALD) nitrogen doped ZnO (ZnO:N) as an active layer is demonstrated. The electrical properties of ZnO Thin Films were effectively controlled by in situ nitrogen doping using NH4OH as a source for reactants. Especially, the electron concentration in ZnO was lowered to below 1015cm−3. Good device characteristics were obtained from the inverted staggered type TFTs with ZnO:N channel and ALD Al2O3 gate insulator; μsat=6.7cm2∕Vs, Ioff=2.03×10−12A, Ion∕off=9.46×107, and subthreshold swing=0.67V∕decade. The entire TFT fabrication processes were carried out at below 150°C, which is a favorable process for plastic based flexible display.

T N Jackson - One of the best experts on this subject based on the ideXlab platform.

  • low voltage double gate zno Thin Film Transistor circuits
    IEEE Electron Device Letters, 2013
    Co-Authors: J I Ramirez, Kaige G Sun, T N Jackson
    Abstract:

    In this letter, we report double-gate ZnO Thin-Film Transistor (TFT) circuits deposited by plasma-enhanced atomic layer deposition that are suitable for low-voltage operation. Compared to bottom-gate-only ZnO TFTs, double-gate ZnO TFTs have improved mobility, subthreshold slope, and bias stability. In this letter, the TFT top gate is used to adjust the bottom-gate turn-on and threshold voltage. This allows the logic transition point for circuits to be adjusted for operation at a low voltage. Using this approach, high-gain inverters (gain >100) and low-voltage ring oscillators using double-gate TFTs have been demonstrated. Double-gate inverters with a beta ratio of 5 have a gain larger than 100. Fifteen-stage double-gate ZnO TFT ring oscillators operate with VDD = 1.5 V, ID = 28 μA, and propagation delay of 2 μs per stage.

  • low voltage zno double gate Thin Film Transistor circuits
    Device Research Conference, 2012
    Co-Authors: Israel J Ramirez, Kaige G Sun, T N Jackson
    Abstract:

    We report here double-gate ZnO Thin Film Transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very Thin (few nm thick) gate dielectric which may limit manufacturability [1]. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Double-gate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. [2,3] We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD) [4,5]. Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, double-gate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with V DD = 1.2 V, I D = 32 µA, and propagation delay of 2.1 µs/stage.

  • organic Thin Film Transistor driven polymer dispersed liquid crystal displays on flexible polymeric substrates
    Applied Physics Letters, 2002
    Co-Authors: C D Sheraw, L Zhou, J R Huang, David J Gundlach, T N Jackson, M G Kane, Ian G Hill, M S Hammond, J Campi, B K Greening
    Abstract:

    We have fabricated organic Thin-Film Transistor (OTFT)-driven active matrix liquid crystal displays on flexible polymeric substrates. These small displays have 16×16 pixel polymer-dispersed liquid crystal arrays addressed by pentacene active layer OTFTs. The displays were fabricated using a low-temperature process (<110 °C) on flexible polyethylene naphthalate Film and are operated as reflective active matrix displays.