The Experts below are selected from a list of 798 Experts worldwide ranked by ideXlab platform

Barthou Denis - One of the best experts on this subject based on the ideXlab platform.

  • Dynamic Thread Pinning for Phase-Based OpenMP Programs
    'Springer Science and Business Media LLC', 2013
    Co-Authors: Mazouz Abdelhafid, Touati Sid, Barthou Denis
    Abstract:

    F. Wolf, B. Mohr, and D. an Ney (Eds.), pages 12, pp. 53-64International audienceThread Affinity has appeared as an important technique to improve the overall program performance and for better performance stability. However, if we consider a program with multiple phases, it is unlikely that a single Thread Affinity produces the best program performance for all these phases. If we consider the case of OpenMP, applications may have multiple parallel regions, each with a distinct inter-Thread data sharing pattern. In this paper, we propose an approach that allows to change Thread Affinity dynamically (Thread migrations) between parallel regions at runtime to account for these distinct inter-Thread data sharing patterns. We demonstrate that as far as cache sharing is concerned for SPEC OMP01, not all the tested OpenMP applications exhibit a distinct phase behavior. However, we show that while fixing Thread Affinity for the whole execution may improve performance by up to 30%, allowing dynamic Thread pinning may improve performance by up to 40%. Furthermore, we provide an analysis about the required conditions to improve the effectiveness of the approac

  • Performance evaluation and analysis of Thread pinning strategies on multi-core platforms: Case study of SPEC OMP applications on intel architectures
    'Institute of Electrical and Electronics Engineers (IEEE)', 2011
    Co-Authors: Mazouz Abdelhafid, Touati Sid, Barthou Denis
    Abstract:

    International audienceWith the introduction of multi-core processors, Thread Affinity has quickly appeared to be one of the most important factors to accelerate program execution times. The current article presents a complete experimental study on the performance of various Thread pinning strategies. We investigate four application independent Thread pinning strategies and five application sensitive ones based on cache sharing. We made extensive performance evaluation on three different multi-core machines reflecting three usual utilisation: workstation machine, server machine and high performance machine. In overall, we show that fixing Thread affinities (whatever the tested strategy) is a better choice for improving program performance on HPC ccNUMA machines compared to OS-based Thread placement. This means that the current Linux OS scheduling strategy is not necessarily the best choice in terms of performance on ccNUMA machines, even if it is a good choice in terms of cores usage ratio and work balancing. On smaller Core2 and Nehalem machines, we show that the benefit of Thread pinning is not satisfactory in terms of speedups versus OS-based scheduling, but the performance stability is much better

Mazouz Abdelhafid - One of the best experts on this subject based on the ideXlab platform.

  • Dynamic Thread Pinning for Phase-Based OpenMP Programs
    'Springer Science and Business Media LLC', 2013
    Co-Authors: Mazouz Abdelhafid, Touati Sid, Barthou Denis
    Abstract:

    F. Wolf, B. Mohr, and D. an Ney (Eds.), pages 12, pp. 53-64International audienceThread Affinity has appeared as an important technique to improve the overall program performance and for better performance stability. However, if we consider a program with multiple phases, it is unlikely that a single Thread Affinity produces the best program performance for all these phases. If we consider the case of OpenMP, applications may have multiple parallel regions, each with a distinct inter-Thread data sharing pattern. In this paper, we propose an approach that allows to change Thread Affinity dynamically (Thread migrations) between parallel regions at runtime to account for these distinct inter-Thread data sharing patterns. We demonstrate that as far as cache sharing is concerned for SPEC OMP01, not all the tested OpenMP applications exhibit a distinct phase behavior. However, we show that while fixing Thread Affinity for the whole execution may improve performance by up to 30%, allowing dynamic Thread pinning may improve performance by up to 40%. Furthermore, we provide an analysis about the required conditions to improve the effectiveness of the approac

  • Performance evaluation and analysis of Thread pinning strategies on multi-core platforms: Case study of SPEC OMP applications on intel architectures
    'Institute of Electrical and Electronics Engineers (IEEE)', 2011
    Co-Authors: Mazouz Abdelhafid, Touati Sid, Barthou Denis
    Abstract:

    International audienceWith the introduction of multi-core processors, Thread Affinity has quickly appeared to be one of the most important factors to accelerate program execution times. The current article presents a complete experimental study on the performance of various Thread pinning strategies. We investigate four application independent Thread pinning strategies and five application sensitive ones based on cache sharing. We made extensive performance evaluation on three different multi-core machines reflecting three usual utilisation: workstation machine, server machine and high performance machine. In overall, we show that fixing Thread affinities (whatever the tested strategy) is a better choice for improving program performance on HPC ccNUMA machines compared to OS-based Thread placement. This means that the current Linux OS scheduling strategy is not necessarily the best choice in terms of performance on ccNUMA machines, even if it is a good choice in terms of cores usage ratio and work balancing. On smaller Core2 and Nehalem machines, we show that the benefit of Thread pinning is not satisfactory in terms of speedups versus OS-based scheduling, but the performance stability is much better

De Oliveira Castro Pablo - One of the best experts on this subject based on the ideXlab platform.

  • Piecewise Holistic Autotuning of Parallel Programs with CERE
    'Wiley', 2017
    Co-Authors: Popov Mihail, Akel Chadi, Chatelain Yohan, Jalby William, De Oliveira Castro Pablo
    Abstract:

    International audienceCurrent architecture complexity requires fine tuning of compiler and runtime parameters to achieve best performance.Autotuning substantially improves default parameters in many scenarios but it is a costly process requiring long iterative evaluations. We propose an automatic piecewise autotuner based on CERE (Codelet Extractor and REplayer). CERE decomposes applications into small pieces called codelets: each codelet maps to a loop or to an OpenMP parallel region and can be replayed as a standalone program.Codelet autotuning achieves better speedups at a lower tuning cost. By grouping codelet invocations with the same performance behavior, CERE reduces the number of loops or OpenMP regions to be evaluated. Moreover unlike whole-program tuning, CERE customizes the set of best parameters for each specific OpenMP region or loop. We demonstrate the CERE tuning of compiler optimizations, number of hreads,Thread Affinity, and scheduling policy on both NUMA and heterogeneous architectures. Over the NAS benchmarks, we achieve an average speedup of1.08x after tuning. Tuning a codelet is 13x cheaper than whole-program evaluation and predicts the tuning impact with a 94.7% accuracy. Similarly, exploring Thread configurations and scheduling policies for a Black-Scholes solver on an heterogeneous big.LITTLE architecture is over 40x faster using CERE

  • Piecewise Holistic Autotuning of Compiler and Runtime Parameters
    'Springer Science and Business Media LLC', 2016
    Co-Authors: Popov Mihail, Akel Chadi, Jalby William, De Oliveira Castro Pablo
    Abstract:

    International audienceCurrent architecture complexity requires fine tuning of compiler and runtime parameters to achieve full potential performance. Autotuning substantially improves default parameters in many scenarios but it is a costly process requiring a long iterative evaluation. We propose an automatic piecewise autotuner based on CERE (Codelet Extractor and REplayer). CERE decomposes applications into small pieces called codelets: each codelet maps to a loop or to an OpenMP parallel region and can be replayed as a standalone program. Codelet autotuning achieves better speedups at a lower tuning cost. By grouping codelet invocations with the same performance behavior, CERE reduces the number of loops or OpenMP regions to be evaluated. Moreover unlike whole-program tuning, CERE customizes the set of best parameters for each specific OpenMP region or loop. We demonstrate CERE tuning of compiler optimizations, number of Threads and Thread Affinity on a NUMA architecture. On average over the NAS 3.0 benchmarks, we achieve a speedup of 1.08x after tuning. Tuning a single codelet is 13x cheaper than whole-program evaluation and estimates the tuning impact on the original region with a 94.7% accuracy. On a Reverse Time Migration (RTM) proto-application we achieve a 1.11x speedup with a 200x cheaper exploration

Yuzhong Shen - One of the best experts on this subject based on the ideXlab platform.

  • energy evaluation for applications with different Thread affinities on the intel xeon phi
    Symposium on Computer Architecture and High Performance Computing, 2014
    Co-Authors: Gary Lawson, Masha Sosonkina, Yuzhong Shen
    Abstract:

    The Intel Xeon Phi coprocessor offers high parallelism on energy-efficient hardware to minimize energy consumption while maintaining performance. Dynamic frequency and voltage scaling is not accessible on the Intel Xeon Phi. Hence, saving energy relies mainly on tuning application performance. One general optimization technique is Thread Affinity, which is an important factor in multi-core architectures. This work investigates the effects of varying Thread Affinity modes and reducing core utilization on energy and execution time for the NASA Advanced Supercomputing Parallel Benchmarks (NPB). Energy measurements are captured using the micsmc utility tool available on Xeon Phi. The measurements are checked against total power captured using Watts up power meters. The results are compared to the system-default Thread Affinity and granularity modes. Mostly positive impacts on performance and energy are observed: When executed at the maximum Thread count on all unoccupied cores, all the benchmarks but one exhibited energy savings if a specific Affinity mode is set.

Denis Barthou - One of the best experts on this subject based on the ideXlab platform.

  • Dynamic Thread Pinning for Phase-Based OpenMP Programs
    2015
    Co-Authors: Abdelhafid Mazouz, Sid-ahmed-ali Touati, Denis Barthou
    Abstract:

    Abstract. Thread Affinity has appeared as an important technique to improve the overall program performance and for better performance stability. However, if we consider a program with multiple phases, it is unlikely that a single Thread Affinity produces the best program performance for all these phases. If we consider the case of OpenMP, applications may have multiple parallel regions, each with a dis-tinct inter-Thread data sharing pattern. In this paper, we propose an approach that allows to change Thread Affinity dynamically (Thread migrations) between parallel regions at runtime to account for these distinct inter-Thread data sharing patterns. We demonstrate that as far as cache sharing is concerned for SPEC OMP01, not all the tested OpenMP applications exhibit a distinct phase behavior. However, we show that while fixing Thread Affinity for the whole execution may improve performance by up to 30%, allowing dynamic Thread pinning may improve per-formance by up to 40%. Furthermore, we provide an analysis about the required conditions to improve the effectiveness of the approach