user network interface

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K.a. Walsh - One of the best experts on this subject based on the ideXlab platform.

  • A SONET STS-3c user network interface IC
    Proceedings of the IEEE 1991 Custom Integrated Circuits Conference, 1991
    Co-Authors: T.j. Robe, K.a. Walsh
    Abstract:

    The STS-3c user network interface IC transmits and receives a SONET (synchronous optical network) STS-3c signal at 155.52 Mb/s. In addition to payload insertion and recovery, this 1- mu m CMOS IC scrambles the serial STS-3c line signal, performs SONET payload pointer processing, and provides several error performance monitoring functions. Test results show successful performance at data rates of up to 300 Mb/s.

  • Highly integrated ATM/SONET user-network interface
    Electronics Letters, 1991
    Co-Authors: G.r. Lalk, C.a. Johnston, L. Giuck, T.c. Banwell, T.j. Robe, K.a. Walsh, K.c. Young
    Abstract:

    The implementation of a highly integrated experimental research prototype ATM/SONET interface that operates at the SONET OC-3 rate of 155.52 Mbit/s is reported. The prototype interface provides various features of the physical (SONET) and asynchronous transfer mode (ATM) layers of the B-ISDN protocol reference model. This type of interface could be used in applications such as workstation interfaces in a switched ATM local area network or for the user-network interface in a broadband public network or customer premises network.

  • A SONET STS-3c user network interface integrated circuit
    IEEE Journal on Selected Areas in Communications, 1991
    Co-Authors: T.j. Robe, K.a. Walsh
    Abstract:

    Two different design implementation techniques were used to produce a functionally complex high performance synchronous optical network (SONET) synchronous transmission signal (STS)-3c (155.52 Mb/s) user network interface (UNI) chip in cost-effective 1 mu m CMOS technology. The CMOS chip functions as an STS-3c transmitter and receiver and can interface to the STS-3c line in either bit-serial or byte-parallel data format. The transmitter creates a SONET STS-3c frame structure including the necessary framing and control bytes. The receiver performs frame detection, several performance monitoring functions, and payload processor interpretation. In addition to SONET overheads, both the transmitter and receiver provide payload asynchronous transfer mode (ATM) mapping signals to the user. The user can choose between serial operation at 155.52 Mb/s or parallel operation at 19.44 Mbyte/s. Test results show that the experimental integrated circuit performs successfully at serial data rates of up to 300 Mb/s. >

T.j. Robe - One of the best experts on this subject based on the ideXlab platform.

  • A SONET STS-3c user network interface IC
    Proceedings of the IEEE 1991 Custom Integrated Circuits Conference, 1991
    Co-Authors: T.j. Robe, K.a. Walsh
    Abstract:

    The STS-3c user network interface IC transmits and receives a SONET (synchronous optical network) STS-3c signal at 155.52 Mb/s. In addition to payload insertion and recovery, this 1- mu m CMOS IC scrambles the serial STS-3c line signal, performs SONET payload pointer processing, and provides several error performance monitoring functions. Test results show successful performance at data rates of up to 300 Mb/s.

  • Highly integrated ATM/SONET user-network interface
    Electronics Letters, 1991
    Co-Authors: G.r. Lalk, C.a. Johnston, L. Giuck, T.c. Banwell, T.j. Robe, K.a. Walsh, K.c. Young
    Abstract:

    The implementation of a highly integrated experimental research prototype ATM/SONET interface that operates at the SONET OC-3 rate of 155.52 Mbit/s is reported. The prototype interface provides various features of the physical (SONET) and asynchronous transfer mode (ATM) layers of the B-ISDN protocol reference model. This type of interface could be used in applications such as workstation interfaces in a switched ATM local area network or for the user-network interface in a broadband public network or customer premises network.

  • A SONET STS-3c user network interface integrated circuit
    IEEE Journal on Selected Areas in Communications, 1991
    Co-Authors: T.j. Robe, K.a. Walsh
    Abstract:

    Two different design implementation techniques were used to produce a functionally complex high performance synchronous optical network (SONET) synchronous transmission signal (STS)-3c (155.52 Mb/s) user network interface (UNI) chip in cost-effective 1 mu m CMOS technology. The CMOS chip functions as an STS-3c transmitter and receiver and can interface to the STS-3c line in either bit-serial or byte-parallel data format. The transmitter creates a SONET STS-3c frame structure including the necessary framing and control bytes. The receiver performs frame detection, several performance monitoring functions, and payload processor interpretation. In addition to SONET overheads, both the transmitter and receiver provide payload asynchronous transfer mode (ATM) mapping signals to the user. The user can choose between serial operation at 155.52 Mb/s or parallel operation at 19.44 Mbyte/s. Test results show that the experimental integrated circuit performs successfully at serial data rates of up to 300 Mb/s. >

George Swallow - One of the best experts on this subject based on the ideXlab platform.

Zafar Ali - One of the best experts on this subject based on the ideXlab platform.

Ludi Zheng - One of the best experts on this subject based on the ideXlab platform.