Vector Product

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Pramod Kumar Meher - One of the best experts on this subject based on the ideXlab platform.

  • Efficient Subquadratic Space Complexity Architectures for Parallel MPB Single- and Double-Multiplications for All Trinomials Using Toeplitz Matrix-Vector Product Decomposition
    IEEE Transactions on Circuits and Systems I: Regular Papers, 2015
    Co-Authors: Pramod Kumar Meher
    Abstract:

    Subquadratic multiplication algorithm has received significant attention of cryptographic hardware researchers for efficient implementation public-key cryptosystems. In this paper, we derive a new shifted MPB (SMPB) representation based on modified polynomial basis (MPB). We have shown that by using MPB and SMPB, the proposed double basis multiplication can be transformed into Toeplitz matrix-Vector Product (TMVP) structure. Furthermore, by employing this formulation of double basis multiplication, we show that three-operand multiplication over GF(2m) for all trinomials can be realized efficiently by the recursive TMVP (RTMVP) formulation. To perform the three-operand multiplication with the RTMVP formulation, we have derived a new RTMVP decomposition scheme. The proposed single- and double-multiplications can, respectively, use TMVP and RTMVP decompositions to achieve subquadratic space complexity architectures. By theoretical analysis, it is shown that the proposed subquadratic multipliers involve significantly less space complexity and less computation time compared to the existing subquadratic multipliers using TMVP and Karatsuba algorithms. Moreover, our proposed double-multiplication design can be used in several applications involving successive multiplications, such as exponentiation, inversion, and elliptic curve point multiplication.

R. B. V. Subramanyam - One of the best experts on this subject based on the ideXlab platform.

  • A novel Bit Vector Product algorithm for mining frequent itemsets from large datasets using MapReduce framework
    Cluster Computing, 2017
    Co-Authors: Sumalatha Saleti, R. B. V. Subramanyam
    Abstract:

    Frequent itemset mining (FIM) is an interesting sub-area of research in the field of Data Mining. With the increase in the size of datasets, conventional FIM algorithms are not suitable and efforts are made to migrate to the Big Data Frameworks for designing algorithms using MapReduce like computing paradigms. We too interested in designing MapReduce based algorithm. Initially, our Parallel Compression algorithm makes data simpler to handle. A novel bit Vector data structure is proposed to maintain compressed transactions and it is formed by scanning the dataset only once. Our Bit Vector Product algorithm follows the MapReduce approach and effectively searches for frequent itemsets from a given list of transactions. The experimental results are present to prove the efficacy of our approach over some of the recent works.

Kevin Shaw - One of the best experts on this subject based on the ideXlab platform.

  • vpf a Vector Product format extension suitable for three dimensional modeling and simulation
    1998
    Co-Authors: Mahdi Abdelguerfi, Kevin Shaw, Roy Ladner, Miyi J Chung, Ruth Wilson
    Abstract:

    Abstract : With support from the Defense Modeling and Simulation Office and the National Imagery and Mapping Agency's (NIMA) Terrain Modeling Program Office, the Digital Mapping, Charting, and Geodesy Analysis Program (DMAP) has investigated an extension to NIMA's current Vector Product Format (VPF) that would benefit the Modeling and Simulation community. In its current form, VPF's winged-edge topology is documented as not being capable of modeling a wide range of three-dimensional (3D) objects that may be transmitted and received through the Synthetic Environment Data Representation and Interchange Specification (SEDRIS). This range of objects includes non-manifold objects found in integrated, 3D synthetic environments. DMAP therefore proposes VPF+, an extension to VPF that provides for georelational modeling in 3D and that is SEDRIS capable. VPF+ adds a new level of topology called Level 4 Full 3D Topology (Level 4). The topological information encompasses the adjacencies involved in 3D manifold and non-manifold objects, and is described using a new, extended Winged-Edge data structure. This data structure is referred to as "Non-Manifold 3D Winged-Edge Topology." Level 4 also adds a new 3D_Object feature class that is intended to capture a wide range of 3D objects. These features are further defined to be either Well Formed or Not Well Formed, with Well Formed 3D_Object features having additional optional topological information to improve software performance. Finally, Level 4 implements no changes that alter VPF's Level 0 through Level 3 topology.

  • Virtual world reconstruction using the modeling and simulation extended Vector Product prototype
    1997
    Co-Authors: Kevin Shaw, M. Abdelguerfi, E. Cooper, C. Wynne, Barbara Ray
    Abstract:

    Abstract : The modeling and simulation (M&S) communities for both the Navy and Marine Corps are not currently satisfied by the data provided by the Defense Mapping Agency. In particular, deficiencies exist in both the lack of a continuous surface representation and an inconsistent view of elevation throughout a single database. The M&S Extended Vector Product (MSEVP) prototype being developed is an extended Vector Product format-based Product containing a continuous surface representation and a consistent view of elevation across the thematic coverages contained within a database. A continuous surface representation is provided in the MSEVP prototype as a Triangulated Irregular Network (TIN) and stored in the MSEVP elevation coverage. This report also examines bow a TIN representation of the transportation network is constructed from a two-dimensional linear representation. Each linear road is widened to provide a more realistic representation of its real work counterpart and then overlaid over the elevation TIN to ensure that the road adheres to the surface characterized by the elevation coverage. This overlay process ensures that a consistent view of elevation will exist across coverages.

  • An Initial Design for an Extended Vector Product Format Prototype for Modeling and Simulation.
    1997
    Co-Authors: Kevin Shaw, H. V. Miller, Barbara Ray, Robert Broome, Todd Lovitt
    Abstract:

    Abstract : Having been tasked with making the Defense Mapping Agency's (DMA) georelational Vector Product Format (VPF) more receptive to the needs of the modeling and simulation community, the Digital Mapping, Charting, and Geodesy Analysis Program (DMAP) has designed a prototype Modeling and Simulation Extended Vector Product (MSEVP).

  • An Extended Vector Product Format (EVPF) suitable for the representation of three-dimensional elevation in terrain databases
    International Journal of Geographical Information Science, 1997
    Co-Authors: Abdelguerfi, Edgar Cooper, Christ Wynne, Kevin Shaw
    Abstract:

    Recent studies have shown that the Vector Product Format (VPF) and most VPF-based Products no longer meet the needs of the Modelling and Simulation (M&S) community of the Army, Navy, and Marine Corps. The research presented in this paper addresses some of the deficiencies outlined in these requirement surveys. One of the goals of this research is an Extended Vector Product Format (EVPF) and an EVPF-based Product Modelling and Simulation Extended Vector Product (MSEVP). EVPF, which remains within the confines of VPFs static georelational data structure, extends VPF to allow for the efficient storage and access of Triangulated Irregular Network (TIN)-based three dimensional elevation data. Additionally, EVPF permits the efficient integration of terrain elevation data with ground surface features, and provides an elegant method of rendering terrain in three-dimensions. This paper documents the design of EVPF and highlights its salient features. It also reports on our progress toward the design and implementa...

  • Technical Review of the Vector Product Format Symbol Set Prototype.
    1996
    Co-Authors: Jerry L. Landrum, Kevin Shaw, Thomas A. Fetterer
    Abstract:

    Abstract : Vector Product Format Symbology (VPFS) is a standard structure for the organization of digital symbology to be used with Vector Product Format (VPF) Products. The symbols it contains are designed to be compatible with a wide variety of applications which use VPF. VPFS supports a greatly enriched symbology by incorporating logical conditions that allow the association of symbology with feature attribute values. VPFS encompasses most, if not all, of the VPF Products providing a standard and consistent symbolization of features across VPF Product lines. As the use of multiple VPF Products becomes common, this standard symbology set will greatly ease the conflicts between graphical representations of features in different databases. This review examines the appropriateness of the VPFS standard and specification in concept as well as the efficacy of VPFS as implemented in the prototype. It also presents suggestions for the improvement of the VPFS Product design.

Albert Y Zomaya - One of the best experts on this subject based on the ideXlab platform.

  • aesptv an adaptive and efficient framework for sparse tensor Vector Product kernel on a high performance computing platform
    IEEE Transactions on Parallel and Distributed Systems, 2020
    Co-Authors: Yuedan Chen, Guoqing Xiao, Tamer M Ozsu, Chubo Liu, Albert Y Zomaya
    Abstract:

    Multi-dimensional, large-scale, and sparse data, which can be neatly represented by sparse tensors, are increasingly used in various applications such as data analysis and machine learning. A high-performance sparse tensor-Vector Product (SpTV), one of the most fundamental operations of processing sparse tensors, is necessary for improving efficiency of related applications. In this article, we propose aeSpTV, an adaptive and efficient SpTV framework on Sunway TaihuLight supercomputer, to solve several challenges of optimizing SpTVon high-performance computing platforms. First, to map SpTV to Sunway architecture and tame expensive memory access latency and parallel writing conflict due to the intrinsic irregularity of SpTV, we introduce an adaptive SpTV parallelization. Second, to co-execute with the parallelization design while still ensuring high efficiency, we design a sparse tensor data structure named CSSoCR. Third, based on the adaptive SpTV parallelization with the novel tensor data structure, we present an autotuner that chooses the most befitting tensor partitioning method for aeSpTV using the variance analysis theory of mathematical statistics to achieve load balance. Fourth, to further leverage the computing power of Sunway, we propose customized optimizations for aeSpTV. Experimental results show that aeSpTV yields good sacalability on both thread-level and process-level parallelism of Sunway. It achieves a maximum GFLOPS of 195.69 on 128 processes. Additionally, it is proved that optimization effects of the partitioning autotuner and optimization techniques are remarkable.

Alistair P Rendell - One of the best experts on this subject based on the ideXlab platform.

  • generating optimal cuda sparse matrix Vector Product implementations for evolving gpu hardware
    Concurrency and Computation: Practice and Experience, 2012
    Co-Authors: Ahmed El H Zein, Alistair P Rendell
    Abstract:

    The CUDA model for GPUs presents the programmer with a plethora of different programming options. These includes different memory types, different memory access methods, and different data types. Identifying which options to use and when is a non-trivial exercise. This paper explores the effect of these different options on the performance of a routine that evaluates sparse matrix Vector Products across three different generations of NVIDIA GPU hardware. A process for analysing performance and selecting the subset of implementations that perform best is proposed. The potential for mapping sparse matrix attributes to optimal CUDA sparse matrix Vector Product implementation is discussed.

  • Generating optimal CUDA sparse matrix–Vector Product implementations for evolving GPU hardware
    Concurrency and Computation: Practice and Experience, 2011
    Co-Authors: Ahmed H. El Zein, Alistair P Rendell
    Abstract:

    The CUDA model for GPUs presents the programmer with a plethora of different programming options. These includes different memory types, different memory access methods, and different data types. Identifying which options to use and when is a non-trivial exercise. This paper explores the effect of these different options on the performance of a routine that evaluates sparse matrix Vector Products across three different generations of NVIDIA GPU hardware. A process for analysing performance and selecting the subset of implementations that perform best is proposed. The potential for mapping sparse matrix attributes to optimal CUDA sparse matrix Vector Product implementation is discussed.

  • from sparse matrix to optimal gpu cuda sparse matrix Vector Product implementation
    Grid Computing, 2010
    Co-Authors: Ahmed El H Zein, Alistair P Rendell
    Abstract:

    The CUDA model for GPUs presents the programmer with a plethora of different programming options. These includes different memory types, different memory access methods, and different data types. Identifying which options to use and when is a non-trivial exercise. This paper explores the effect of these different options on the performance of a routine that evaluates sparse matrix Vector Products. A process for analysing performance and selecting the subset of implementations that perform best is proposed. The potential for mapping sparse matrix attributes to optimal CUDA sparse matrix Vector Product implementation is discussed.

  • CCGRID - From Sparse Matrix to Optimal GPU CUDA Sparse Matrix Vector Product Implementation
    2010 10th IEEE ACM International Conference on Cluster Cloud and Grid Computing, 2010
    Co-Authors: Ahmed H. El Zein, Alistair P Rendell
    Abstract:

    The CUDA model for GPUs presents the programmer with a plethora of different programming options. These includes different memory types, different memory access methods, and different data types. Identifying which options to use and when is a non-trivial exercise. This paper explores the effect of these different options on the performance of a routine that evaluates sparse matrix Vector Products. A process for analysing performance and selecting the subset of implementations that perform best is proposed. The potential for mapping sparse matrix attributes to optimal CUDA sparse matrix Vector Product implementation is discussed.