The Experts below are selected from a list of 34122 Experts worldwide ranked by ideXlab platform
Wikner J J. - One of the best experts on this subject based on the ideXlab platform.
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A 1.2-V analog Interface for a 300-MSps HD Video digitizer in Core 65-nm CMOS
'Institute of Electrical and Electronics Engineers (IEEE)', 2014Co-Authors: Aamir, Syed Ahmed, Angelova Polina, Wikner J J.Abstract:Aamir SA, Angelova P, Wikner JJ. A 1.2-V analog Interface for a 300-MSps HD Video digitizer in Core 65-nm CMOS. IEEE Transactions on VLSI Systems. 2014;22(4):888-898.This paper describes the front-end of a fully integrated analog Interface for 300 MSps, high-definition Video digitizers in a system on-chip environment. The analog Interface is implemented in a 1.2 V, 65-nm digital CMOS process and the design minimizes the number of power domains using core transistors only. Each analog Video receiver channel contains an integrated multiplexer with a current-mode dc-clamp, a programmable gain amplifier (PGA) and a pseudo second-order RC low-pass filter. The digital charge-pump clamp is integrated with low-voltage bootstrapped tee-switches inside the multiplexer, while restoring the dc component of ac-coupled inputs. The PGA contains a four-stage fully symmetric pseudo-differential amplifier with common-mode feedforward and inherent common-mode feedback, utilized in a closed loop capacitive feedback configuration. The amplifier features offset cancellation during the horizontal blanking. The Video Interface is evaluated using a unique test signal over a range of Video formats for INL+/DNL+, INL-/DNL-. The 0.07-0.39 mV INL, 2-70 μV DNL, and 66-74 dB of SFDR, enable us to target various formats for 9-12 bit Low-voltage digitizers
Massoud Pedram - One of the best experts on this subject based on the ideXlab platform.
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chromatic encoding a low power encoding technique for digital visual Interface
IEEE Transactions on Consumer Electronics, 2004Co-Authors: Weichung Cheng, Massoud PedramAbstract:This paper presents a low-power encoding technique, called chromatic encoding, for the digital visual Interface standard (DVI), a digital serial Video Interface. Chromatic encoding reduces power consumption by minimizing the transition counts on the DVI. This technique relies on the notion of tonal locality, i.e., the observation - first made in this paper - that the signal differences between adjacent pixels in images follow a Gaussian distribution. Based on this observation, an optimal code assignment is performed to minimize the transition counts. Furthermore, the three-color channels of the DVI may be reciprocally encoded to achieve even more power saving. The idea is that given the signal values from the three-color channels, one or two of these channels are encoded by reciprocal differences with a number of redundant bits used to indicate the selection. The channel selection problem is formulated as a minimum spanning tree problem and solved accordingly. The proposed technique requires only three redundant bits for each 24-bit pixel. Experimental results show up to a 75% power reduction in the DVI.
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chromatic encoding a low power encoding technique for digital visual Interface
Design Automation and Test in Europe, 2003Co-Authors: Weichung Cheng, Massoud PedramAbstract:This paper presents a low-power encoding technique, called chromatic encoding, for the Digital Visual Interface standard (DVI), a digital serial Video Interface. Chromatic encoding reduces power consumption by minimizing the transition counts on the DVI. This technique relies on the notion of tonal locality, i.e., the observation that the signal differences between adjacent pixels in images follow a Gaussian distribution. Based on this observation, an optimal code assignment is performed to minimize the transition counts. Furthermore, the three color channels of the DVI may be reciprocally encoded to achieve even more power saving. The idea is that given the signal values from the three color channels, one or two of these channels are encoded by reciprocal differences with a number of redundant bits used to indicate the selection. The proposed technique requires only three redundant bits for each 24-bit pixel. Experimental results show up to a 75% transition reduction.
J. Jacob Wikner - One of the best experts on this subject based on the ideXlab platform.
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1.2-V Analog Interface for a 300-MSps HD Video Digitizer in Core 65-nm CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014Co-Authors: Syed Ahmed Aamir, Pavel Angelov, J. Jacob WiknerAbstract:This paper describes the front-end of a fully integrated analog Interface for 300 MSps, high-definition Video digitizers in a system on-chip environment. The analog Interface is implemented in a 1.2 V, 65-nm digital CMOS process and the design minimizes the number of power domains using core transistors only. Each analog Video receiver channel contains an integrated multiplexer with a current-mode dc-clamp, a programmable gain amplifier (PGA) and a pseudo second-order RC low-pass filter. The digital charge-pump clamp is integrated with low-voltage bootstrapped tee-switches inside the multiplexer, while restoring the dc component of ac-coupled inputs. The PGA contains a four-stage fully symmetric pseudo-differential amplifier with common-mode feedforward and inherent common-mode feedback, utilized in a closed loop capacitive feedback configuration. The amplifier features offset cancellation during the horizontal blanking. The Video Interface is evaluated using a unique test signal over a range of Video formats for INL+/DNL+, INL-/DNL-. The 0.07-0.39 mV INL, 2-70 μV DNL, and 66-74 dB of SFDR, enable us to target various formats for 9-12 bit Low-voltage digitizers.
Aamir, Syed Ahmed - One of the best experts on this subject based on the ideXlab platform.
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A 1.2-V analog Interface for a 300-MSps HD Video digitizer in Core 65-nm CMOS
'Institute of Electrical and Electronics Engineers (IEEE)', 2014Co-Authors: Aamir, Syed Ahmed, Angelova Polina, Wikner J J.Abstract:Aamir SA, Angelova P, Wikner JJ. A 1.2-V analog Interface for a 300-MSps HD Video digitizer in Core 65-nm CMOS. IEEE Transactions on VLSI Systems. 2014;22(4):888-898.This paper describes the front-end of a fully integrated analog Interface for 300 MSps, high-definition Video digitizers in a system on-chip environment. The analog Interface is implemented in a 1.2 V, 65-nm digital CMOS process and the design minimizes the number of power domains using core transistors only. Each analog Video receiver channel contains an integrated multiplexer with a current-mode dc-clamp, a programmable gain amplifier (PGA) and a pseudo second-order RC low-pass filter. The digital charge-pump clamp is integrated with low-voltage bootstrapped tee-switches inside the multiplexer, while restoring the dc component of ac-coupled inputs. The PGA contains a four-stage fully symmetric pseudo-differential amplifier with common-mode feedforward and inherent common-mode feedback, utilized in a closed loop capacitive feedback configuration. The amplifier features offset cancellation during the horizontal blanking. The Video Interface is evaluated using a unique test signal over a range of Video formats for INL+/DNL+, INL-/DNL-. The 0.07-0.39 mV INL, 2-70 μV DNL, and 66-74 dB of SFDR, enable us to target various formats for 9-12 bit Low-voltage digitizers
Weichung Cheng - One of the best experts on this subject based on the ideXlab platform.
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chromatic encoding a low power encoding technique for digital visual Interface
IEEE Transactions on Consumer Electronics, 2004Co-Authors: Weichung Cheng, Massoud PedramAbstract:This paper presents a low-power encoding technique, called chromatic encoding, for the digital visual Interface standard (DVI), a digital serial Video Interface. Chromatic encoding reduces power consumption by minimizing the transition counts on the DVI. This technique relies on the notion of tonal locality, i.e., the observation - first made in this paper - that the signal differences between adjacent pixels in images follow a Gaussian distribution. Based on this observation, an optimal code assignment is performed to minimize the transition counts. Furthermore, the three-color channels of the DVI may be reciprocally encoded to achieve even more power saving. The idea is that given the signal values from the three-color channels, one or two of these channels are encoded by reciprocal differences with a number of redundant bits used to indicate the selection. The channel selection problem is formulated as a minimum spanning tree problem and solved accordingly. The proposed technique requires only three redundant bits for each 24-bit pixel. Experimental results show up to a 75% power reduction in the DVI.
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chromatic encoding a low power encoding technique for digital visual Interface
Design Automation and Test in Europe, 2003Co-Authors: Weichung Cheng, Massoud PedramAbstract:This paper presents a low-power encoding technique, called chromatic encoding, for the Digital Visual Interface standard (DVI), a digital serial Video Interface. Chromatic encoding reduces power consumption by minimizing the transition counts on the DVI. This technique relies on the notion of tonal locality, i.e., the observation that the signal differences between adjacent pixels in images follow a Gaussian distribution. Based on this observation, an optimal code assignment is performed to minimize the transition counts. Furthermore, the three color channels of the DVI may be reciprocally encoded to achieve even more power saving. The idea is that given the signal values from the three color channels, one or two of these channels are encoded by reciprocal differences with a number of redundant bits used to indicate the selection. The proposed technique requires only three redundant bits for each 24-bit pixel. Experimental results show up to a 75% transition reduction.
