The Experts below are selected from a list of 960 Experts worldwide ranked by ideXlab platform
Paul Tarau - One of the best experts on this subject based on the ideXlab platform.
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PADL - Garbage Collection Algorithms for Java-Based Prolog Engines
Practical Aspects of Declarative Languages, 2002Co-Authors: Qinan Zhou, Paul TarauAbstract:Implementing a Prolog Runtime System in a language like Java, which provides its own automated memory management and safety features (like built-in index checking and Array Initialization) requires a consistent approach to memory management based on a simple ultimate goal: minimizing total memory management time (the sum of Java's own and ours). Based on our experience with Jinni 2002 - a Java based compiled Prolog system, we analyze the existing garbage collection algorithms and propose new optimizations. In particular, we aim to have a garbage collector with least extra helper memory space yet with reasonably fast speed. Efforts are made in reducing both time and space overhead for the mark-sweep-compact algorithm. We suggest an in-place compaction algorithm and provide its implementation. As the Prolog engine uses dynamic Arrays for its stacks, the impact of Java's garbage collector on the system becomes a key factor. In this context, we measure and optimize the performance of the garbage collector with the overall memory management scheme in mind.
Qinan Zhou - One of the best experts on this subject based on the ideXlab platform.
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PADL - Garbage Collection Algorithms for Java-Based Prolog Engines
Practical Aspects of Declarative Languages, 2002Co-Authors: Qinan Zhou, Paul TarauAbstract:Implementing a Prolog Runtime System in a language like Java, which provides its own automated memory management and safety features (like built-in index checking and Array Initialization) requires a consistent approach to memory management based on a simple ultimate goal: minimizing total memory management time (the sum of Java's own and ours). Based on our experience with Jinni 2002 - a Java based compiled Prolog system, we analyze the existing garbage collection algorithms and propose new optimizations. In particular, we aim to have a garbage collector with least extra helper memory space yet with reasonably fast speed. Efforts are made in reducing both time and space overhead for the mark-sweep-compact algorithm. We suggest an in-place compaction algorithm and provide its implementation. As the Prolog engine uses dynamic Arrays for its stacks, the impact of Java's garbage collector on the system becomes a key factor. In this context, we measure and optimize the performance of the garbage collector with the overall memory management scheme in mind.
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Memory Management and Garbage Collection Algorithms for Java-Based Prolog
2001Co-Authors: Qinan ZhouAbstract:Implementing a Prolog Runtime System in a language like Java which provides its own automatic memory management and safety features such as built--in index checking and Array Initialization requires a consistent approach to memory management based on a simple ultimate goal: minimizing total memory management time and extra space involved. The total memory management time for Jinni is made up of garbage collection time both for Java and Jinni itself. Extra space is usually requested at Jinni's garbage collection. This goal motivates us to find a simple and practical garbage collection algorithm and implementation for our Prolog engine. In this thesis we survey various algorithms already proposed and offer our own contribution to the study of garbage collection by improvements and optimizations for some classic algorithms. We implemented these algorithms based on the dynamic Array algorithm for an all--dynamic Prolog engine (JINNI 2000). The comparisons of our implementations versus the originally proposed algorithm allow us to draw informative conclusions on their theoretical complexity model and their empirical effectiveness.
Ajit Pal - One of the best experts on this subject based on the ideXlab platform.
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energy efficient Array Initialization using loop unrolling with partial gray code sequence
VDAT, 2013Co-Authors: Sumanta Pyne, Ajit PalAbstract:The present work introduces a software technique to reduce energy consumed by the address bus of the on-chip data memory. This is done by reducing switching activity on the address bus of the on-chip data memory, with the help of loop unrolling with partial Gray code sequence. The present work introduces the translation of a loop with Array Initialization to its loop unrolled version with partial Gray code sequence. The expressions for switching activity consumed on the address bus of data memory are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the Array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. The proposed method achieves 25-50% reduction in switching activity on the address bus of on-chip data memory. The present work is evaluated on five benchmark programs and is suitable for programs where Array Initialization time is more than computation time.
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VDAT - Energy Efficient Array Initialization Using Loop Unrolling with Partial Gray Code Sequence
Communications in Computer and Information Science, 2013Co-Authors: Sumanta Pyne, Ajit PalAbstract:The present work introduces a software technique to reduce energy consumed by the address bus of the on-chip data memory. This is done by reducing switching activity on the address bus of the on-chip data memory, with the help of loop unrolling with partial Gray code sequence. The present work introduces the translation of a loop with Array Initialization to its loop unrolled version with partial Gray code sequence. The expressions for switching activity consumed on the address bus of data memory are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the Array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. The proposed method achieves 25-50% reduction in switching activity on the address bus of on-chip data memory. The present work is evaluated on five benchmark programs and is suitable for programs where Array Initialization time is more than computation time.
Frank Kammer - One of the best experts on this subject based on the ideXlab platform.
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On-the-Fly Array Initialization in Less Space
arXiv: Data Structures and Algorithms, 2017Co-Authors: Torben Hagerup, Frank KammerAbstract:We show that for all given $n,t,w \in \{1,2,...\}$ with $n
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on the fly Array Initialization in less space
arXiv: Data Structures and Algorithms, 2017Co-Authors: Torben Hagerup, Frank KammerAbstract:We show that for all given $n,t,w \in \{1,2,...\}$ with $n<2^w$, an Array of $n$ entries of $w$ bits each can be represented on a word RAM with a word length of $w$ bits in at most $nw+\lceil n(t/(2 w))^t\rceil$ bits of uninitialized memory to support constant-time Initialization of the whole Array and $O(t)$-time reading and writing of individual Array entries. At one end of this tradeoff, we achieve Initialization and access (i.e., reading and writing) in constant time with $nw+\lceil n/w^t\rceil$ bits for arbitrary fixed $t$, to be compared with $nw+\Theta(n)$ bits for the best previous solution, and at the opposite end, still with constant-time Initialization, we support $O(\log n)$-time access with just $nw+1$ bits, which is optimal for arbitrary access times if the Initialization executes fewer than $n$ steps.
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on the fly Array Initialization in less space
International Symposium on Algorithms and Computation, 2017Co-Authors: Torben Hagerup, Frank KammerAbstract:We show that for all given n,t,w in {1,2,...} with n<2^w, an Array of n entries of w bits each can be represented on a word RAM with a word length of w bits in at most nw+ceil(n(t/(2 w))^t) bits of uninitialized memory to support constant-time Initialization of the whole Array and O(t)-time reading and writing of individual Array entries. At one end of this tradeoff, we achieve Initialization and access (i.e., reading and writing) in constant time with nw+ceil(n/w^t) bits for arbitrary fixed t, to be compared with nw+Theta(n) bits for the best previous solution, and at the opposite end, still with constant-time Initialization, we support O(log n)-time access with just nw+1 bits, which is optimal for arbitrary access times if the Initialization executes fewer than n steps.
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ISAAC - On-the-Fly Array Initialization in Less Space
2017Co-Authors: Torben Hagerup, Frank KammerAbstract:We show that for all given n,t,w in {1,2,...} with n
Sumanta Pyne - One of the best experts on this subject based on the ideXlab platform.
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energy efficient Array Initialization using loop unrolling with partial gray code sequence
VDAT, 2013Co-Authors: Sumanta Pyne, Ajit PalAbstract:The present work introduces a software technique to reduce energy consumed by the address bus of the on-chip data memory. This is done by reducing switching activity on the address bus of the on-chip data memory, with the help of loop unrolling with partial Gray code sequence. The present work introduces the translation of a loop with Array Initialization to its loop unrolled version with partial Gray code sequence. The expressions for switching activity consumed on the address bus of data memory are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the Array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. The proposed method achieves 25-50% reduction in switching activity on the address bus of on-chip data memory. The present work is evaluated on five benchmark programs and is suitable for programs where Array Initialization time is more than computation time.
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VDAT - Energy Efficient Array Initialization Using Loop Unrolling with Partial Gray Code Sequence
Communications in Computer and Information Science, 2013Co-Authors: Sumanta Pyne, Ajit PalAbstract:The present work introduces a software technique to reduce energy consumed by the address bus of the on-chip data memory. This is done by reducing switching activity on the address bus of the on-chip data memory, with the help of loop unrolling with partial Gray code sequence. The present work introduces the translation of a loop with Array Initialization to its loop unrolled version with partial Gray code sequence. The expressions for switching activity consumed on the address bus of data memory are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the Array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. The proposed method achieves 25-50% reduction in switching activity on the address bus of on-chip data memory. The present work is evaluated on five benchmark programs and is suitable for programs where Array Initialization time is more than computation time.