The Experts below are selected from a list of 75 Experts worldwide ranked by ideXlab platform

Muhammed A Ibrahim - One of the best experts on this subject based on the ideXlab platform.

  • A novel full-wave rectifier/sinusoidal frequency doubler topology based on CFOAs
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.

  • a novel full wave rectifier sinusoidal frequency doubler topology based on cfoas
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.

S Shimizu - One of the best experts on this subject based on the ideXlab platform.

  • high speed cmos i o Buffer Circuits
    IEEE Journal of Solid-state Circuits, 1992
    Co-Authors: M Ishibe, Shoji Otaka, K J Takeda, Sumio Tanaka, Y Toyoshima, S Takatsuka, S Shimizu
    Abstract:

    Very high-speed off-chip data rates have been difficult to achieve in CMOS technologies. An all-CMOS set of I/O Buffer Circuits, which use current-mode and impedance matching techniques, capable of transmitting off-chip at 1-Gb/s data rates is described. The Circuits are also compatible with voltage-mode signal levels for ECL input and MOS output Circuits. >

Erkan Yuce - One of the best experts on this subject based on the ideXlab platform.

  • A novel full-wave rectifier/sinusoidal frequency doubler topology based on CFOAs
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.

  • a novel full wave rectifier sinusoidal frequency doubler topology based on cfoas
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.

M Ishibe - One of the best experts on this subject based on the ideXlab platform.

  • high speed cmos i o Buffer Circuits
    IEEE Journal of Solid-state Circuits, 1992
    Co-Authors: M Ishibe, Shoji Otaka, K J Takeda, Sumio Tanaka, Y Toyoshima, S Takatsuka, S Shimizu
    Abstract:

    Very high-speed off-chip data rates have been difficult to achieve in CMOS technologies. An all-CMOS set of I/O Buffer Circuits, which use current-mode and impedance matching techniques, capable of transmitting off-chip at 1-Gb/s data rates is described. The Circuits are also compatible with voltage-mode signal levels for ECL input and MOS output Circuits. >

Shahram Minaei - One of the best experts on this subject based on the ideXlab platform.

  • A novel full-wave rectifier/sinusoidal frequency doubler topology based on CFOAs
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.

  • a novel full wave rectifier sinusoidal frequency doubler topology based on cfoas
    Analog Integrated Circuits and Signal Processing, 2017
    Co-Authors: Erkan Yuce, Shahram Minaei, Muhammed A Ibrahim
    Abstract:

    A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed Circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM Circuits without needing any extra Buffer Circuits. No passive component matching conditions are needed. The proposed Circuits are simulated by using SPICE program to verify the theoretical analysis.