The Experts below are selected from a list of 321 Experts worldwide ranked by ideXlab platform

Katsunori Shida - One of the best experts on this subject based on the ideXlab platform.

  • Estimation of Position and Relative Permittivity of Dielectric in a Cylindrical Air Condenser by New Capacitance Measurement Method
    Japanese Journal of Applied Physics, 1996
    Co-Authors: Akira Kimoto, Katsunori Shida
    Abstract:

    In this work, a new Capacitance Measurement method for collecting the data used to estimate relative permittivity distributions is proposed. The proposed method involves measuring the Capacitance between a pair of Measurement electrodes using various combinations of supplementary electrodes. This method can be used to obtain many types of information in each Measurement, which cannot be acquired using conventional Capacitance Measurement methods. We first estimate the position and relative permittivity of a small dielectric column in a homogeneous cylindrical air space, and then discuss the effectiveness of our new Capacitance Measurement method. The great potential of this method is thus demonstrated.

  • Imaging of temperature-change distribution in the brain phantom by means of Capacitance Measurement
    IMTC 99. Proceedings of the 16th IEEE Instrumentation and Measurement Technology Conference (Cat. No.99CH36309), 1
    Co-Authors: A. Kimoto, Katsunori Shida
    Abstract:

    The purpose of this study is to accomplish a noninvasive imaging system of temperature-change distribution in the human head. The human tissue can be generally evaluated with electrical resistance and Capacitance. Capacitance is related to permittivity with temperature characteristics. In our method, Capacitance is measured by many small electrodes arranged on the surface of the human head. Using these values, permittivity distribution is reconstructed and then, the change of the images is replaced by temperature-change distribution using the permittivity-temperature characteristic. In this paper the reconstruction of temperature-change distribution in the brain phantom by means of the proposed Capacitance Measurement method is demonstrated when temperature of the brain phantom is changed. As a result, although improvement in the Measurement system and reconstruction algorithm is needed, the pattern of temperature-change could be presented.

  • A new Capacitance Measurement method for imaging of permittivity distribution
    Proceedings of 18th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 1
    Co-Authors: A. Kimoto, Y. Matsuoka, Katsunori Shida
    Abstract:

    The final purpose of the authors' study is the imaging of changed temperature distribution inside the human head by non-invasive Measurement. To achieve this purpose, the authors investigated the imaging of permittivity distribution by measuring Capacitance because permittivity depends on temperature and the Measurement of Capacitance gives one information about permittivity. This paper describes a new Capacitance Measurement method for estimating the permittivity distribution of an object. A regularization method based on a modified Newton-Raphson method, and the finite element method are used to obtain the imaging of permittivity distribution. The authors present the reconstruction image of an agar-agar placed into a homogeneous phantom. As a result, the authors suggest that it is possible to image permittivity distribution using the proposed new Capacitance Measurement method.

Dennis Sylvester - One of the best experts on this subject based on the ideXlab platform.

  • investigation of interconnect Capacitance characterization using charge based Capacitance Measurement cbcm technique and three dimensional simulation
    IEEE Journal of Solid-state Circuits, 1998
    Co-Authors: Dennis Sylvester, J Chen
    Abstract:

    This paper examines the recently introduced charge-based Capacitance Measurement (CBCM) technique through use of a three-dimensional (3-D) interconnect simulator. This method can be used in conjunction with simulation at early process development stages to provide designers with accurate parasitic interconnect Capacitances. Metal to substrate, interwire, and interlayer Capacitances are each discussed and overall close agreement is found between CBCM and 3-D simulation. Full process interconnect characterization is one possible application of this new compact, high-resolution test structure.

  • an on chip interconnect Capacitance characterization method with sub femto farad resolution
    International Conference on Microelectronic Test Structures, 1997
    Co-Authors: J C Chen, Dennis Sylvester, Hitoshi Aoki, S Nakagawa
    Abstract:

    In this paper, a sensitive and simple technique for parasitic interconnect Capacitance Measurement with 0.01 fF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. Only a DC current meter is required for its Measurement. We have applied this technique to extract various interconnect geometry Capacitances and compared the results to those from 3D simulations.

  • a simple method for on chip sub femto farad interconnect Capacitance Measurement
    IEEE Electron Device Letters, 1997
    Co-Authors: Bruce W Mcgaughy, J Chen, Dennis Sylvester
    Abstract:

    In this letter, a sensitive and simple technique for parasitic interconnect Capacitance Measurement and extraction is presented. This on-chip technique is based upon an efficient test structure design that utilizes only two transistors in addition to the unknown interconnect Capacitance to be characterized. No reference capacitor is needed. The Measurement itself is also simple; only a dc current meter is required. Furthermore, the extraction methodology employs a self-checking algorithm to verify that the extracted Capacitance value is consistent and accurate. The technique is demonstrated by extracting the Capacitance of a single crossover between a Metal 1 line and a Metal 2 of 0.44 fF. The resolution limit is dominated by the matching of the minimum sized transistors used for the test structure. We estimate this resolution limit to be about 0.03 fF.

  • an on chip attofarad interconnect charge based Capacitance Measurement cbcm technique
    International Electron Devices Meeting, 1996
    Co-Authors: J Chen, Bruce W Mcgaughy, Dennis Sylvester
    Abstract:

    In this paper, a sensitive and simple technique for parasitic interconnect Capacitance Measurement with 0.0l fF or 10 aF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. The Measurement itself is also simple; only a DC current meter is required. We have applied this technique to extract various interconnect geometry Capacitances, including the Capacitance of a single Metal 2 over Metal 1 crossing, for an industrial double metal process.

J Chen - One of the best experts on this subject based on the ideXlab platform.

  • investigation of interconnect Capacitance characterization using charge based Capacitance Measurement cbcm technique and three dimensional simulation
    IEEE Journal of Solid-state Circuits, 1998
    Co-Authors: Dennis Sylvester, J Chen
    Abstract:

    This paper examines the recently introduced charge-based Capacitance Measurement (CBCM) technique through use of a three-dimensional (3-D) interconnect simulator. This method can be used in conjunction with simulation at early process development stages to provide designers with accurate parasitic interconnect Capacitances. Metal to substrate, interwire, and interlayer Capacitances are each discussed and overall close agreement is found between CBCM and 3-D simulation. Full process interconnect characterization is one possible application of this new compact, high-resolution test structure.

  • a simple method for on chip sub femto farad interconnect Capacitance Measurement
    IEEE Electron Device Letters, 1997
    Co-Authors: Bruce W Mcgaughy, J Chen, Dennis Sylvester
    Abstract:

    In this letter, a sensitive and simple technique for parasitic interconnect Capacitance Measurement and extraction is presented. This on-chip technique is based upon an efficient test structure design that utilizes only two transistors in addition to the unknown interconnect Capacitance to be characterized. No reference capacitor is needed. The Measurement itself is also simple; only a dc current meter is required. Furthermore, the extraction methodology employs a self-checking algorithm to verify that the extracted Capacitance value is consistent and accurate. The technique is demonstrated by extracting the Capacitance of a single crossover between a Metal 1 line and a Metal 2 of 0.44 fF. The resolution limit is dominated by the matching of the minimum sized transistors used for the test structure. We estimate this resolution limit to be about 0.03 fF.

  • an on chip attofarad interconnect charge based Capacitance Measurement cbcm technique
    International Electron Devices Meeting, 1996
    Co-Authors: J Chen, Bruce W Mcgaughy, Dennis Sylvester
    Abstract:

    In this paper, a sensitive and simple technique for parasitic interconnect Capacitance Measurement with 0.0l fF or 10 aF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. The Measurement itself is also simple; only a DC current meter is required. We have applied this technique to extract various interconnect geometry Capacitances, including the Capacitance of a single Metal 2 over Metal 1 crossing, for an industrial double metal process.

A. Kimoto - One of the best experts on this subject based on the ideXlab platform.

  • Imaging of temperature-change distribution in the brain phantom by means of Capacitance Measurement
    IMTC 99. Proceedings of the 16th IEEE Instrumentation and Measurement Technology Conference (Cat. No.99CH36309), 1
    Co-Authors: A. Kimoto, Katsunori Shida
    Abstract:

    The purpose of this study is to accomplish a noninvasive imaging system of temperature-change distribution in the human head. The human tissue can be generally evaluated with electrical resistance and Capacitance. Capacitance is related to permittivity with temperature characteristics. In our method, Capacitance is measured by many small electrodes arranged on the surface of the human head. Using these values, permittivity distribution is reconstructed and then, the change of the images is replaced by temperature-change distribution using the permittivity-temperature characteristic. In this paper the reconstruction of temperature-change distribution in the brain phantom by means of the proposed Capacitance Measurement method is demonstrated when temperature of the brain phantom is changed. As a result, although improvement in the Measurement system and reconstruction algorithm is needed, the pattern of temperature-change could be presented.

  • A new Capacitance Measurement method for imaging of permittivity distribution
    Proceedings of 18th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 1
    Co-Authors: A. Kimoto, Y. Matsuoka, Katsunori Shida
    Abstract:

    The final purpose of the authors' study is the imaging of changed temperature distribution inside the human head by non-invasive Measurement. To achieve this purpose, the authors investigated the imaging of permittivity distribution by measuring Capacitance because permittivity depends on temperature and the Measurement of Capacitance gives one information about permittivity. This paper describes a new Capacitance Measurement method for estimating the permittivity distribution of an object. A regularization method based on a modified Newton-Raphson method, and the finite element method are used to obtain the imaging of permittivity distribution. The authors present the reconstruction image of an agar-agar placed into a homogeneous phantom. As a result, the authors suggest that it is possible to image permittivity distribution using the proposed new Capacitance Measurement method.

Tseung-yuen Tseng - One of the best experts on this subject based on the ideXlab platform.

  • An improved two-frequency method of Capacitance Measurement for SrTiO3 as high-k gate dielectric
    IEEE Electron Device Letters, 2002
    Co-Authors: Tseung-yuen Tseng
    Abstract:

    An improved two-frequency method of Capacitance Measurement for the high-k gate dielectrics is proposed. The equivalent circuit model of the MOS capacitor including the four parameters of intrinsic Capacitance, loss tangent, parasitic series inductance, and series resistance is developed. These parameters can be extracted by independently measuring the capacitor at two different frequencies. This technique is demonstrated for high-k SrTiO/sub 3/ gate dielectrics and the results show that the calibrated Capacitances are invariant over a wide range of frequency. In addition, the extracted loss tangent, inductance and resistance are independent on gate voltage and frequency. The effect of series resistance on the frequency dispersion of the Capacitance can be also explained by this model. These results indicate that this modified technique can be incorporated in the routine Capacitance-voltage (C-V) Measurement procedure providing the physically meaningful data for the high-k gate dielectrics.