The Experts below are selected from a list of 345 Experts worldwide ranked by ideXlab platform
Mingdou Ker - One of the best experts on this subject based on the ideXlab platform.
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optimization design on active guard ring to improve latch up immunity of CMOS Integrated Circuits
IEEE Transactions on Electron Devices, 2019Co-Authors: Chuncheng Chen, Mingdou KerAbstract:A new optimization design of an active guard ring has been proposed to improve latch-up immunity of CMOS Integrated Circuits and been successfully verified in a 0.18- $\mu \text{m}$ 1.8-/3.3-V CMOS technology. Codesigned with the on-chip electrostatic discharge (ESD) protection devices (gate-ground nMOS and gate-VDD pMOS) equipped at the input–output (I/O) pad, the overshooting/undershooting trigger current during latch-up test can be conducted away through the turned-on channels of the ESD protection MOSFET’s to the power rails ( ${V}_{\textsf {DD}}$ or ${V}_{\textsf {SS}}$ ). Therefore, the trigger current injecting from the I/O devices (that directly connected to the I/O pad) through the substrate to initiate the latch-up occurrence at the internal circuit blocks can be significantly reduced. Thus, the latch-up immunity of the whole chip can be effectively improved under the same placement distance between the I/O cells and the internal circuit blocks. The new proposed design is a cost-efficient solution to improve latch-up immunity and also to mention good ESD robustness of the I/O cells.
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transient induced latchup in CMOS Integrated Circuits
2009Co-Authors: Mingdou Ker, Shengfu HsuAbstract:The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal Circuits, and between I/O and internal Circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.
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investigation and design of on chip power rail esd clamp Circuits without suffering latchup like failure during system level esd test
IEEE Journal of Solid-state Circuits, 2008Co-Authors: Mingdou Ker, Chengcheng YenAbstract:On-chip power-rail electrostatic discharge (ESD) protection circuit designed with active ESD detection function is the key role to significantly improve ESD robustness of CMOS Integrated Circuits (ICs). Four power-rail ESD clamp Circuits with different ESD-transient detection Circuits were fabricated in a 0.18-mum CMOS process and tested to compare their system-level ESD susceptibility, which are named as power-rail ESD clamp Circuits with typical RC-based detection, PMOS feedback, NMOS+PMOS feedback, and cascaded PMOS feedback in this work. During the system-level ESD test, where the ICs in a system have been powered up, the feedback loop used in the power-rail ESD clamp Circuits provides the lock function to keep the ESD-clamping NMOS in a ldquolatch-onrdquo state. The latch-on ESD-clamping NMOS, which is often drawn with a larger device dimension to sustain high ESD level, conducts a huge current between the power lines to perform a latchup-like failure after the system-level ESD test. A modified power-rail ESD clamp circuit is proposed to solve this problem. The proposed power-rail ESD clamp circuit can provide high enough chip-level ESD robustness, and without suffering the latchup-like failure during the system-level ESD test.
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on chip transient detection circuit for system level esd protection in CMOS Integrated Circuits to meet electromagnetic compatibility regulation
IEEE Transactions on Electromagnetic Compatibility, 2008Co-Authors: Mingdou Ker, Chengcheng Yen, Pichia ShihAbstract:A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. The circuit performance to detect different positive and negative fast electrical transients has been investigated by the HSPICE simulator and verified in a silicon chip. The experimental results in a 0.13-m CMOS Integrated circuit (IC) have confirmed that the proposed on-chip transient detection circuit can be used to detect fast electrical transients during the system-level ESD events. The proposed transient detection circuit can be further combined with the power-on reset circuit to improve the immunity of the CMOS IC products against system-level ESD stress.
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study of board level noise filters to prevent transient induced latchup in CMOS Integrated Circuits during emc esd test
International Symposium on Electromagnetic Compatibility, 2006Co-Authors: Shengfu Hsu, Mingdou KerAbstract:Different types of board-level noise filters are evaluated for their effectiveness to improve the immunity of CMOS ICs against transient-induced latchup (TLU) under system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified in test chips with the silicon controlled rectifier (SCR) fabricated in a 0.25-/spl mu/m CMOS technology. Some of such board-level solutions can be further Integrated into the chip design to effectively improve TLU immunity of CMOS IC products.
Hang Song - One of the best experts on this subject based on the ideXlab platform.
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detectability of breast tumor by a hand held impulse radar detector performance evaluation and pilot clinical study
Scientific Reports, 2017Co-Authors: Hang Song, Xia Xiao, Shinsuke Sasada, Takayuki Kadoya, Morihito Okada, Koji Arihiro, Takamaro KikkawaAbstract:In this report, a hand-held impulse-radar breast cancer detector is presented and the detectability of malignant breast tumors is demonstrated in the clinical test at Hiroshima University Hospital, Hiroshima, Japan. The core functional parts of the detector consist of 65-nm technology complementary metal-oxide-semiconductor (CMOS) Integrated Circuits covering the ultrawideband width from 3.1 to 10.6 GHz, which enable the generation and transmission of Gaussian monocycle pulse (GMP) with the pulse width of 160 ps and single port eight throw (SP8T) switching matrices for controlling the combination of 4 × 4 cross-shaped dome antenna array. The detector is designed to be placed on the breast with the patient in the supine position. The detectability of malignant tumors is confirmed in excised breast tissues after total mastectomy surgery. The three-dimensional positions of the tumors in the imaging results are consistent with the results of histopathology analysis. The clinical tests are conducted by a clinical doctor for five patients at the hospital. The malignant tumors include invasive ductal carcinoma (IDC) and ductal carcinoma in situ (DCIS). The final confocal imaging results are consistent with those of Magnetic Resonance Imaging (MRI), demonstrating the feasibility of the hand-held impulse-radar detector for malignant breast tumors.
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microwave imaging using CMOS Integrated Circuits with rotating 4 4 antenna array on a breast phantom
International Journal of Antennas and Propagation, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts.
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Microwave Imaging Using CMOS Integrated Circuits with Rotating 4 × 4 Antenna Array on a Breast Phantom
Hindawi Limited, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts
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a radar based breast cancer detection system using CMOS Integrated Circuits
IEEE Access, 2015Co-Authors: Hang Song, Afreen Azhari, Eiji Suematsu, Hiromasa Watanabe, Hayato Kono, Yuji Seo, Junichi Somei, Yuichi Watarai, Toshihiko Ota, Yoshinori HiramatsuAbstract:An ultrawideband (UWB) radar-based breast cancer detection system, which is composed of complementary metal–oxide–semiconductor Integrated Circuits, is presented. This system includes Gaussian monocycle pulse (GMP) generation Circuits, switching (SW) matrix Circuits, equivalent-time sampling Circuits, and a compact UWB antenna array. During the detection process, the GMP signal with the center frequency of 6 GHz is first generated and transmitted with a repetition frequency of 100 MHz. The GMP signal is sent to a selected transmitter antenna by the SW matrix module, and the reflected signal is captured by the receiver antennas. Next, the high-speed equivalent-time sampling Circuits are employed to retrieve the reflected GMP signal. A confocal algorithm is used to reconstruct the breast image. The total size for the prototype module is $45~\textrm {cm} \times 30~\textrm {cm} \times 14.5$ cm in length, width, and height, respectively, which is dramatically smaller than the conventional detection systems. Using our proposed system, we demonstrate a successful detection of 1-cm cancer target in the breast phantom.
Takamaro Kikkawa - One of the best experts on this subject based on the ideXlab platform.
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detectability of breast tumor by a hand held impulse radar detector performance evaluation and pilot clinical study
Scientific Reports, 2017Co-Authors: Hang Song, Xia Xiao, Shinsuke Sasada, Takayuki Kadoya, Morihito Okada, Koji Arihiro, Takamaro KikkawaAbstract:In this report, a hand-held impulse-radar breast cancer detector is presented and the detectability of malignant breast tumors is demonstrated in the clinical test at Hiroshima University Hospital, Hiroshima, Japan. The core functional parts of the detector consist of 65-nm technology complementary metal-oxide-semiconductor (CMOS) Integrated Circuits covering the ultrawideband width from 3.1 to 10.6 GHz, which enable the generation and transmission of Gaussian monocycle pulse (GMP) with the pulse width of 160 ps and single port eight throw (SP8T) switching matrices for controlling the combination of 4 × 4 cross-shaped dome antenna array. The detector is designed to be placed on the breast with the patient in the supine position. The detectability of malignant tumors is confirmed in excised breast tissues after total mastectomy surgery. The three-dimensional positions of the tumors in the imaging results are consistent with the results of histopathology analysis. The clinical tests are conducted by a clinical doctor for five patients at the hospital. The malignant tumors include invasive ductal carcinoma (IDC) and ductal carcinoma in situ (DCIS). The final confocal imaging results are consistent with those of Magnetic Resonance Imaging (MRI), demonstrating the feasibility of the hand-held impulse-radar detector for malignant breast tumors.
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microwave imaging using CMOS Integrated Circuits with rotating 4 4 antenna array on a breast phantom
International Journal of Antennas and Propagation, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts.
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Microwave Imaging Using CMOS Integrated Circuits with Rotating 4 × 4 Antenna Array on a Breast Phantom
Hindawi Limited, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts
Chengcheng Yen - One of the best experts on this subject based on the ideXlab platform.
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investigation and design of on chip power rail esd clamp Circuits without suffering latchup like failure during system level esd test
IEEE Journal of Solid-state Circuits, 2008Co-Authors: Mingdou Ker, Chengcheng YenAbstract:On-chip power-rail electrostatic discharge (ESD) protection circuit designed with active ESD detection function is the key role to significantly improve ESD robustness of CMOS Integrated Circuits (ICs). Four power-rail ESD clamp Circuits with different ESD-transient detection Circuits were fabricated in a 0.18-mum CMOS process and tested to compare their system-level ESD susceptibility, which are named as power-rail ESD clamp Circuits with typical RC-based detection, PMOS feedback, NMOS+PMOS feedback, and cascaded PMOS feedback in this work. During the system-level ESD test, where the ICs in a system have been powered up, the feedback loop used in the power-rail ESD clamp Circuits provides the lock function to keep the ESD-clamping NMOS in a ldquolatch-onrdquo state. The latch-on ESD-clamping NMOS, which is often drawn with a larger device dimension to sustain high ESD level, conducts a huge current between the power lines to perform a latchup-like failure after the system-level ESD test. A modified power-rail ESD clamp circuit is proposed to solve this problem. The proposed power-rail ESD clamp circuit can provide high enough chip-level ESD robustness, and without suffering the latchup-like failure during the system-level ESD test.
-
on chip transient detection circuit for system level esd protection in CMOS Integrated Circuits to meet electromagnetic compatibility regulation
IEEE Transactions on Electromagnetic Compatibility, 2008Co-Authors: Mingdou Ker, Chengcheng Yen, Pichia ShihAbstract:A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. The circuit performance to detect different positive and negative fast electrical transients has been investigated by the HSPICE simulator and verified in a silicon chip. The experimental results in a 0.13-m CMOS Integrated circuit (IC) have confirmed that the proposed on-chip transient detection circuit can be used to detect fast electrical transients during the system-level ESD events. The proposed transient detection circuit can be further combined with the power-on reset circuit to improve the immunity of the CMOS IC products against system-level ESD stress.
Hiromasa Watanabe - One of the best experts on this subject based on the ideXlab platform.
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microwave imaging using CMOS Integrated Circuits with rotating 4 4 antenna array on a breast phantom
International Journal of Antennas and Propagation, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts.
-
Microwave Imaging Using CMOS Integrated Circuits with Rotating 4 × 4 Antenna Array on a Breast Phantom
Hindawi Limited, 2017Co-Authors: Hang Song, Afreen Azhari, Xia Xiao, Eiji Suematsu, Hiromasa Watanabe, Takamaro KikkawaAbstract:A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS) Integrated Circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic Circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T) switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling Circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts
-
a radar based breast cancer detection system using CMOS Integrated Circuits
IEEE Access, 2015Co-Authors: Hang Song, Afreen Azhari, Eiji Suematsu, Hiromasa Watanabe, Hayato Kono, Yuji Seo, Junichi Somei, Yuichi Watarai, Toshihiko Ota, Yoshinori HiramatsuAbstract:An ultrawideband (UWB) radar-based breast cancer detection system, which is composed of complementary metal–oxide–semiconductor Integrated Circuits, is presented. This system includes Gaussian monocycle pulse (GMP) generation Circuits, switching (SW) matrix Circuits, equivalent-time sampling Circuits, and a compact UWB antenna array. During the detection process, the GMP signal with the center frequency of 6 GHz is first generated and transmitted with a repetition frequency of 100 MHz. The GMP signal is sent to a selected transmitter antenna by the SW matrix module, and the reflected signal is captured by the receiver antennas. Next, the high-speed equivalent-time sampling Circuits are employed to retrieve the reflected GMP signal. A confocal algorithm is used to reconstruct the breast image. The total size for the prototype module is $45~\textrm {cm} \times 30~\textrm {cm} \times 14.5$ cm in length, width, and height, respectively, which is dramatically smaller than the conventional detection systems. Using our proposed system, we demonstrate a successful detection of 1-cm cancer target in the breast phantom.