The Experts below are selected from a list of 258 Experts worldwide ranked by ideXlab platform

M. Schroter - One of the best experts on this subject based on the ideXlab platform.

  • methods for determining the Collector series Resistance in sige hbts a review and evaluation across different technologies
    IEEE Transactions on Electron Devices, 2018
    Co-Authors: Andreas Pawlak, Julia Krause, M. Schroter
    Abstract:

    Many methods have been proposed for the experimental determination of the Collector Resistance in bipolar junction transistors and HBTs. In this paper, the most widely used methods are reviewed and applied to SiGe HBTs with a large variety of device sizes fabricated in different technologies and generations, including high-speed and high-voltage transistors. First, the accuracy of those methods, which are based on an extraction from single-transistor characteristics, is evaluated from simulated data using a sophisticated compact model and, where applicable, also device simulation. This approach allows the origin of observed inaccuracies or failures of certain methods to be identified. Second, the test structure-based methods are reviewed, and third, all methods were applied to experimental data. This paper and its results provide insight into each method’s accuracy; its application limits with respect to a technology, a device size, and an operating range as well as its requirements in terms of equipment and extraction effort.

  • An Evaluation of Extraction Methods for the External Collector Resistance for InP DHBTs
    2015 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2015
    Co-Authors: T. Nardmann, M. Schroter
    Abstract:

    The external Collector Resistance, while less important for the DC characteristics of a device, influences the RF behavior and associated figures-of-merit such as the power gain. From a modeling point of view, a badly chosen value for rCx often leads to wrong values for time constants or maximum junction capacitance values. Various methods have been published in the past that attempt to determine rCx as accurately and independently of other extraction steps as possible. However, a given method is often based on assumptions that are not valid for all technologies. This paper compares the most suitable methods specifically for InP DHBTs, using measured and simulated data for three different process technologies and relying on compact models for a fair comparison in terms of accuracy.

Andreas Pawlak - One of the best experts on this subject based on the ideXlab platform.

  • methods for determining the Collector series Resistance in sige hbts a review and evaluation across different technologies
    IEEE Transactions on Electron Devices, 2018
    Co-Authors: Andreas Pawlak, Julia Krause, M. Schroter
    Abstract:

    Many methods have been proposed for the experimental determination of the Collector Resistance in bipolar junction transistors and HBTs. In this paper, the most widely used methods are reviewed and applied to SiGe HBTs with a large variety of device sizes fabricated in different technologies and generations, including high-speed and high-voltage transistors. First, the accuracy of those methods, which are based on an extraction from single-transistor characteristics, is evaluated from simulated data using a sophisticated compact model and, where applicable, also device simulation. This approach allows the origin of observed inaccuracies or failures of certain methods to be identified. Second, the test structure-based methods are reviewed, and third, all methods were applied to experimental data. This paper and its results provide insight into each method’s accuracy; its application limits with respect to a technology, a device size, and an operating range as well as its requirements in terms of equipment and extraction effort.

  • Evaluation of the impact of the external Collector Resistance on results from parameter scaling for heterojunction bipolar transistors
    2017 IEEE Bipolar BiCMOS Circuits and Technology Meeting (BCTM), 2017
    Co-Authors: Andreas Pawlak, Michael Schroter
    Abstract:

    It is demonstrated that the external Collector Resistance, representing the voltage drop from the Collector terminal to the internal Collector node, and the corresponding time constant can have a large impact on the extraction of geometry scalable compact model parameters for bipolar transistors. Furthermore, the accuracy of two widely used extraction methods is evaluated based on data obtained from 2D numerical device simulation and a compact model for transistors with different emitter widths.

  • Why is there no internal Collector Resistance in HICUM
    2016 IEEE Bipolar BiCMOS Circuits and Technology Meeting (BCTM), 2016
    Co-Authors: Michael Schroter, S. Lehmann, Andreas Pawlak
    Abstract:

    The internal (or epi-) Collector region in a bipolar (hetero-)junction transistor strongly determines the bias dependent terminal behavior. Most compact transistor model attempt to capture the current-voltage behavior of the epi-Collector by a special equivalent circuit element (and associated analytical formulations) in addition to the usual transfer current source representing just the base region. This paper provides (i) theoretical proof that a separate representation of the epi-Collector region in an equivalent circuit is neither required nor necessarily advantageous in terms of accuracy and (ii) a physics-based guide on how to model the epi-Collector consistently if a separate description is still desired. The theoretical results are validated by numerical device simulation.

  • A simple and accurate method for extracting the emitter and thermal Resistance of BJTs and HBTs
    2014 IEEE Bipolar BiCMOS Circuits and Technology Meeting (BCTM), 2014
    Co-Authors: Andreas Pawlak, S. Lehmann, Michael Schroter
    Abstract:

    A simple yet accurate extraction method for the emitter and thermal Resistance of bipolar transis­tors is presented. Only DC measurements taken on a thermally controlled wafer prober are required. The knowledge of the Collector Resistance is preferable, but not mandatory. The method yields excellent results when applied to advanced HBT technologies.

Jagadesh M. Kumar - One of the best experts on this subject based on the ideXlab platform.

  • A new lateral PNM Schottky Collector bipolar transistor (SCBT) on SOI for nonsaturating VLSI logic design
    IEEE Transactions on Electron Devices, 2002
    Co-Authors: Jagadesh M. Kumar
    Abstract:

    The novel characteristics of a new lateral PNM Schottky Collector bipolar transistor (SCBT) on silicon-on-insulator (SOI) are explored using two-dimensional (2D) simulation. The Collector-base junction of the proposed lateral PNM transistor consists of a Schottky junction between n-base (N) and metal (M). The characteristics of this structure are compared with that of lateral PNP transistors on SOI. We demonstrate that the proposed structure has a superior performance in terms of reduced Collector Resistance, high current gain, negligible base widening, and very low reverse recovery time compared to the compatible lateral PNP transistors. A simple fabrication procedure is also suggested providing the incentive for experimental verification.

Tsunenobu Kimoto - One of the best experts on this subject based on the ideXlab platform.

  • demonstration of conductivity modulation in sic bipolar junction transistors with reduced base spreading Resistance
    IEEE Transactions on Electron Devices, 2019
    Co-Authors: Satoshi Asada, Jun Suda, Tsunenobu Kimoto
    Abstract:

    SiC bipolar junction transistors (BJTs) were fabricated based on the design criterion proposed in our previous study, which quantitatively proved the importance of decreasing a base spreading Resistance. To reduce the base spreading Resistance, Al+-implantation was performed in the parasitic base region. No negative influences due to the implantation damage on the current gain were confirmed when the implantation is performed sufficiently apart from the emitter mesa sidewall, the distance of which is longer than ${3}~\mu \text{m}$ . Since the fabricated BJTs satisfied the design criterion, clear conductivity modulation was achieved, resulting in a reduced Collector-Resistance, that is, 50% of the unipolar Resistance. In addition, we experimentally demonstrated that the conductivity modulation in SiC BJTs could be enhanced by decreasing the base spreading Resistance.

Antonio Rubio - One of the best experts on this subject based on the ideXlab platform.

  • Substrate coupling evaluation in BiCMOS technology
    IEEE Journal of Solid-State Circuits, 1997
    Co-Authors: J.m. Casalta, Xavier Aragones, Antonio Rubio
    Abstract:

    The magnitude of switching noise coupled through common substrate in BiCMOS technology is analyzed. Noise dependence on Collector Resistance and buried layer doping of the noisy bipolar junction transistor (BJT) is obtained by means of simulation. It is observed that trends are different depending on bipolar transistor biasing: in common-Collector, a low Collector Resistance is desired, while in common-emitter biasing, large values of Rc make the transistor less noisy. A test chip is fabricated in 3-/spl mu/m BiCMOS technology to measure the substrate coupling produced by different BICMOS inverter gates. These experimental measurements show that noise increases with transistor size and Collector Resistance. Dependence on distance and speed of signal are also obtained, together with the effect of a guard ring.