The Experts below are selected from a list of 4284 Experts worldwide ranked by ideXlab platform

Michael A E Andersen - One of the best experts on this subject based on the ideXlab platform.

  • carrier distortion in hysteretic self oscillating class d audio power amplifiers analysis and optimization
    IEEE Transactions on Power Electronics, 2009
    Co-Authors: M C W Hoyerby, Michael A E Andersen
    Abstract:

    An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers-carrier distortion-is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between Input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic Comparator Input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1-0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the Input of a hysteretic Comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into 8 Omega or 80 W into 4Omega from a plusmn34 V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance.

Hongjune Park - One of the best experts on this subject based on the ideXlab platform.

  • 5 5 a quadrature relaxation oscillator with a process induced frequency error compensation loop
    International Solid-State Circuits Conference, 2017
    Co-Authors: Kyoungsik Moon, Hongjune Park
    Abstract:

    With the emergence of wearable and implantable technologies, there has been growing demand on development of key enabling circuits for ultra-low-power sensor interface SoCs. As a reference-frequency generation block for clock management of the overall system, the relaxation oscillator has been widely adopted since it can provide a controllable and well-defined untrimmed frequency with low-cost circuits. In the past decade, the major goal in the design of the relaxation oscillators has been the improvement of phase-noise figure-of-merit (FOM) closer to the fundamental limit of 169dBc/Hz [1]. There have been feedback approaches to internally generate reference voltages for comparison, hence compensating the Comparator circuit delay [2–4]. Since the delay compensation relies on the feedback operation, power consumption by analog circuits to meet the required bandwidth of the feedback loop eventually limits FOM. Recently, a swing-boosted differential scheme was proposed to reduce the effect of Comparator noise by boosting the signal slope at the Comparator Input, demonstrating an FOM of over 160dBc/Hz [5]. However, the boosted voltage swing can increase stress on the Input transistors of the Comparator. In addition, a high-speed Comparator is also needed to reduce the effect of the circuit delay on the output frequency. While most of previous works achieved good FOMs with MHz oscillators, implementation of low-frequency relaxation oscillators presents additional challenges since it requires excessive area for RC and power consumption by analog circuits with leakage not scaled down along with the output frequency.

M C W Hoyerby - One of the best experts on this subject based on the ideXlab platform.

  • carrier distortion in hysteretic self oscillating class d audio power amplifiers analysis and optimization
    IEEE Transactions on Power Electronics, 2009
    Co-Authors: M C W Hoyerby, Michael A E Andersen
    Abstract:

    An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers-carrier distortion-is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between Input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic Comparator Input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1-0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the Input of a hysteretic Comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into 8 Omega or 80 W into 4Omega from a plusmn34 V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance.

Gong Xinyu - One of the best experts on this subject based on the ideXlab platform.

  • An offset auto-calibration technique with cost-effective implementation for Comparator and operational amplifier
    Iowa State University Digital Repository, 2019
    Co-Authors: Gong Xinyu
    Abstract:

    Comparators are one of the most fundamental building blocks in all electronic systems involving analog and digital information. A Comparator’s performance, or the accuracy of its output, is determined by the Comparator’s offset voltage, which includes random offset and systematic offset. To guarantee the overall performance of an entire electronic system, offset-trimming techniques are often necessary to reduce inaccuracy. This study analyzes the offset errors in a representative Comparator structure and describes an auto-calibration technique to systematically and significantly reducing the offset. The auto-calibration technique involves trimming of the Comparator Input transistor pair. Various trimming-switch structures are considered and compared, such as constant-sized drain switch (CDS), constant-sized gate switch (CGS), constant-sized source switch (CSS), binary-weighted source switch (BSS), and constant size split-source switch (SSS). The Comparator and the offset auto-calibration circuits are designed using the GlobalFoundry 0.13μm process. Then an offset trimming algorithm, which is written on MATLAB, is applied to these circuits. Afterwards, the results are collected and analyzed. A comparison of linearity and trimming range (TR) achieved with different trimming switch structures is performed to demonstrate advantages and disadvantages of each switch scheme. The results are also plotted in a histogram to show the normal distribution of each scheme. Finally, offset cancellation technique is implemented in an operational amplifier (Op Amp) circuit with further analysis and comparison to prove the methodology

Kyoungsik Moon - One of the best experts on this subject based on the ideXlab platform.

  • 5 5 a quadrature relaxation oscillator with a process induced frequency error compensation loop
    International Solid-State Circuits Conference, 2017
    Co-Authors: Kyoungsik Moon, Hongjune Park
    Abstract:

    With the emergence of wearable and implantable technologies, there has been growing demand on development of key enabling circuits for ultra-low-power sensor interface SoCs. As a reference-frequency generation block for clock management of the overall system, the relaxation oscillator has been widely adopted since it can provide a controllable and well-defined untrimmed frequency with low-cost circuits. In the past decade, the major goal in the design of the relaxation oscillators has been the improvement of phase-noise figure-of-merit (FOM) closer to the fundamental limit of 169dBc/Hz [1]. There have been feedback approaches to internally generate reference voltages for comparison, hence compensating the Comparator circuit delay [2–4]. Since the delay compensation relies on the feedback operation, power consumption by analog circuits to meet the required bandwidth of the feedback loop eventually limits FOM. Recently, a swing-boosted differential scheme was proposed to reduce the effect of Comparator noise by boosting the signal slope at the Comparator Input, demonstrating an FOM of over 160dBc/Hz [5]. However, the boosted voltage swing can increase stress on the Input transistors of the Comparator. In addition, a high-speed Comparator is also needed to reduce the effect of the circuit delay on the output frequency. While most of previous works achieved good FOMs with MHz oscillators, implementation of low-frequency relaxation oscillators presents additional challenges since it requires excessive area for RC and power consumption by analog circuits with leakage not scaled down along with the output frequency.