The Experts below are selected from a list of 22710 Experts worldwide ranked by ideXlab platform
Incheol Park - One of the best experts on this subject based on the ideXlab platform.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
International Symposium on Circuits and Systems, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of 400 × 250 sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
IEEE Transactions on Circuits and Systems I-regular Papers, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of $400\times250$ sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
Byeong Yong Kong - One of the best experts on this subject based on the ideXlab platform.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
International Symposium on Circuits and Systems, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of 400 × 250 sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
IEEE Transactions on Circuits and Systems I-regular Papers, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of $400\times250$ sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
Bruce Lewis - One of the best experts on this subject based on the ideXlab platform.
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an overview of the sae architecture analysis design language aadl standard a basis for model based architecture driven embedded systems engineering
IFIP World Computer Congress TC 2, 2004Co-Authors: Peter H Feiler, Steve Vestal, Bruce Lewis, Edward ColbertAbstract:Architecture Description Languages provide significant opportunity for the incorporation of formal methods and engineering models into the analysis of software and system architectures. A standard is being developed for embedded real-time safety critical systems which will support the use of various formal approaches to analyze the impact of the composition of systems from hardware and software and which will allow the generation of system glue code with the performance qualities predicted. The SAE AADL standard (International Society for Automotive Engineers (SAE) Architecture Analysis & Design Language) is based on the MetaH language developed under DARPA and US Army funding and on the model driven architectural based approach demonstrated with this technology over the last 12 years. The SAE AADL standard is aimed at supporting avionics, space, automotive, robotics and other real-time Concurrent Processing domains including safety critical applications.
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architecture based model driven software and system development for real time embedded systems
Lecture Notes in Computer Science, 2004Co-Authors: Bruce LewisAbstract:Architecture Description Languages provide significant opportunity for the incorporation of formal methods and engineering models into the analysis of software and system architectures. A standard is being developed for embedded real-time safety critical systems which will support the use of various formal approaches to analyze the impact of the composition of systems from hardware and software and which will allow the generation of system glue code with the performance qualities predicted. The standard, the Avionics Architecture Description Language (AADL), is based on the MetaH language developed under DARPA and US Army funding and on the model driven architectural based approach demonstrated with this technology over the last 8 years. The AADL standard will include a UML profile useful for avionics, space, automotive, robotics and other real-time Concurrent Processing domains including safety critical applications. The paper provides an overview of the concepts supported in MetaH and the AADL as examples of the architecture based model driven paradigm and notes several new model based approaches becoming available.
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the sae avionics architecture description language aadl standard a basis for model based architecture driven embedded systems engineering
2003Co-Authors: Peter H Feiler, Bruce Lewis, Steve VestalAbstract:Abstract : Architecture Description Languages provide significant opportunity for the incorporation of formal methods and engineering models into the analysis of software and system architectures. A standard is being developed for embedded real-time safety critical systems which will support the use of various formal approaches to analyze the impact of the composition of systems from hardware and software and which will allow the generation of system glue code with the performance qualities predicted. The standard the Avionics Architecture Description Language (AADL), is based on the MetaH language developed under DARPA and US Army funding and on the model driven architectural based approach demonstrated with this technology over the last 12 years. The AADL standard will include a UML profile useful for avionics, space, automotive, robotics and other real-time Concurrent Processing domains including safety critical applications.
Jooseung Lee - One of the best experts on this subject based on the ideXlab platform.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
International Symposium on Circuits and Systems, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of 400 × 250 sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
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a low latency multi touch detector based on Concurrent Processing of redesigned overlap split and connected component analysis
IEEE Transactions on Circuits and Systems I-regular Papers, 2020Co-Authors: Byeong Yong Kong, Jooseung Lee, Incheol ParkAbstract:A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented in this paper. Two respective processors for the overlap split and the connected component analysis (CCA) are the key components in a multi-touch detector. Exploiting the simplicity of typical intensity maps in practice, the two processors are first redesigned under a principle that every pixel is processed only once in a raster-scan order. More specifically, the concept of valley point is introduced, and a simple yet effective overlap-split scheme called valley-point division (VPD) is newly developed based on the concept. In addition, equivalent labels in the CCA are handled on the fly instead of being kept to be processed later, and the logics and memories for corner cases that never occur in practice are unloaded. Enabled by the redesign, subsequently, the two processors are integrated into one to Concurrently conduct both the VPD and the CCA during the same raster scan. As a result, the proposed detector completes the whole detection procedure with a single raster scan of a map, and is exempted from a large memory required to hold an entire map. Implementation results in a 65-nm CMOS for a large panel of $400\times250$ sensors demonstrate that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
Edward L. Keller - One of the best experts on this subject based on the ideXlab platform.
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superior colliculus activity related to Concurrent Processing of saccade goals in a visual search task
Journal of Neurophysiology, 2002Co-Authors: Robert M Mcpeek, Edward L. KellerAbstract:Saccades are typically separated by inter-saccadic fixation intervals (ISFIs) of ≥125 ms. During this time, the saccadic system selects a goal and completes the preparatory processes required prior to executing the subsequent movement. However, in tasks in which competing stimuli are presented, two sequentially executed movements to different goals can be separated by much shorter ISFIs. This suggests that the saccadic system is capable of completing many of the preparatory requirements for a second saccade Concurrently with the execution of an initial movement. We recorded single neurons in the superior colliculus (SC) during rapid saccade sequences made by rhesus monkeys performing a search task. We found that during the execution of an initial saccade, activity related to the goal of a quickly following second saccade can be simultaneously maintained in the SC motor map. This activity appears to signal the selection or increased salience of the second saccade goal even before the initial saccade has ended. For movements separated by normal ISFIs (≥125 ms), we did not observe activity related to Concurrent Processing, presumably because for these longer ISFI responses, the goal of the second saccade is not selected until after the end of the first saccade. These results indicate that, at the time of an initial saccade, the SC does not necessarily act as a strict winner-take-all network. Rather it appears that the salience of a second visual goal can be simultaneously maintained in the SC. This provides evidence that selection or preparatory activity related to the goal of a second saccade can overlap temporally with activity related to an initial saccade and indicates that such Concurrent Processing is present even in a structure which is fairly close to the motor output.
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superior colliculus activity related to Concurrent Processing of saccade goals in a visual search task
Journal of Neurophysiology, 2002Co-Authors: Robert M Mcpeek, Edward L. KellerAbstract:Saccades are typically separated by inter-saccadic fixation intervals (ISFIs) of ≥125 ms. During this time, the saccadic system selects a goal and completes the preparatory processes required prior...