The Experts below are selected from a list of 12030 Experts worldwide ranked by ideXlab platform
Eric R. Fossum - One of the best experts on this subject based on the ideXlab platform.
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MWSCAS - A time-resolved CMOS image sensor with high Conversion-Gain pixels and pipelined ADCs
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a CMOS image sensor with high Conversion-Gain pixels and column-shared pipelined ADCs for Fluorescence-lifetime imaging microscopy (FLIM). Pixel Conversion Gain of 121 uV/e-is achieved by creating a distal floating diffusion from transfer gate and reset transistor gate without any process modification. 32-channel 10-bit on-chip column-shared pipelined ADCs with sampling rate up to 5MS/s are designed using area-efficient ring amplifiers for the sensor readout. The ring amplifiers are designed based on actively-biased technique which reduces the area further by 40%. This image sensor chip is fabricated in a standard 180nm CMOS image sensor (CIS) process.
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High Conversion-Gain Pinned-Photodiode Pump-Gate Pixels in 180-nm CMOS Process
IEEE Journal of the Electron Devices Society, 2017Co-Authors: Song Chen, Donald B. Hondongwa, Eric R. FossumAbstract:This paper presents the design and characterization of high Conversion-Gain pixels in a 180-nm CMOS image sensor process. By reducing overlapping capacitance between a floating diffusion and transfer gate, output-referred pixel Conversion Gain as high as 118uV/eand read noise as low as 1.8erms are experimentally achieved without significant lag. A dark current of 38 pA/cm2 is measured at 60°C. Comparison between the proposed devices and a baseline pixel regarding device structure and characterization results is also presented.
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High Conversion-Gain pixels in a standard CMOS image sensor process
2017 IEEE Photonics Conference (IPC), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a new technique to achieve high pixel Conversion Gain (CG) in a standard 0.18 um CMOS image sensor process. CG of 121 uV/e- and read noise of 3.2 erms are measured in the prototype sensor.
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A time-resolved CMOS image sensor with high Conversion-Gain pixels and pipelined ADCs
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a CMOS image sensor with high Conversion-Gain pixels and column-shared pipelined ADCs for Fluorescence-lifetime imaging microscopy (FLIM). Pixel Conversion Gain of 121 uV/e-is achieved by creating a distal floating diffusion from transfer gate and reset transistor gate without any process modification. 32-channel 10-bit on-chip column-shared pipelined ADCs with sampling rate up to 5MS/s are designed using area-efficient ring amplifiers for the sensor readout. The ring amplifiers are designed based on actively-biased technique which reduces the area further by 40%. This image sensor chip is fabricated in a standard 180nm CMOS image sensor (CIS) process.
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Determining Conversion Gain and Read Noise Using a Photon-Counting Histogram Method for Deep Sub-Electron Read Noise Image Sensors
IEEE Journal of the Electron Devices Society, 2016Co-Authors: Dakota A. Starkey, Eric R. FossumAbstract:A new method for characterizing deep sub-electron read noise image sensors is reported. This method, based on the photon-counting histogram, can provide easy, independent and simultaneous measurements of the quanta exposure, Conversion Gain, and read noise. This new method provides a more accurate measure of Conversion Gain and read noise over conventional characterization techniques for image sensors with read noise from 0.15-0.40e- rms.
Khalil Yousef - One of the best experts on this subject based on the ideXlab platform.
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A High Conversion Gain Wideband Mixer Design for UWB Applications
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019Co-Authors: Tao He, Guoxing Wang, Khalil YousefAbstract:A CMOS mixer with wideband input impedance matching and high Conversion Gain is presented in this paper. Dual RLC circuits are utilized with Gilbert mixer for wideband input matching. Capacitive feedback, and inductive series and shunt peaking techniques, are used to implement the RF port matching network. Inductive peaking is also adopted to widen the 3-dB Conversion Gain bandwidth. Active load with AC resistive blocking is employed to boost the mixer Conversion Gain. The proposed circuit is designed, simulated and implemented in XFAB XH018 process with VDD of 1.8V. It achieves a very good RF matching over a band of 5.6-14.6GHz, with a Conversion Gain of 25.0-28.2dB over the desired band of frequency.
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ISCAS - A High Conversion Gain Wideband Mixer Design for UWB Applications
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019Co-Authors: Tao He, Guoxing Wang, Khalil YousefAbstract:A CMOS mixer with wideband input impedance matching and high Conversion Gain is presented in this paper. Dual RLC circuits are utilized with Gilbert mixer for wideband input matching. Capacitive feedback, and inductive series and shunt peaking techniques, are used to implement the RF port matching network. Inductive peaking is also adopted to widen the 3-dB Conversion Gain bandwidth. Active load with AC resistive blocking is employed to boost the mixer Conversion Gain. The proposed circuit is designed, simulated and implemented in XFAB XH018 process with VDD of 1.8V. It achieves a very good RF matching over a band of 5.6–14.6GHz, with a Conversion Gain of 25.0–28.2dB over the desired band of frequency.
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A High FoM Down Conversion Mixer with a Boosted Conversion Gain for IEEE 802.11b and IEEE 802.15.4 Standards
2019 7th International Japan-Africa Conference on Electronics Communications and Computations (JAC-ECC), 2019Co-Authors: Khalil YousefAbstract:This paper presents a CMOS mixer with excellent input matching and high Conversion Gain @ 2.4 GHz. Inductive source degeneration is used for RF port input matching. This mixer utilizes inductive shunt peaking for Conversion Gain boosting. Active loads having drain-gate AC resistive blocking devices are employed for further enhancement of IF output power. The proposed mixer is designed, simulated and implemented in TSMC 0.18 μm CMOS process. This mixer layout occupies an active area of 0.293 mm2. Its input matching network is tuned to 2.4 GHz. It achieves a Conversion Gain of 31.88 dB while driving a 3.43 mA from a 1.8V supply. It has a FoM of 13.321.
Song Chen - One of the best experts on this subject based on the ideXlab platform.
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MWSCAS - A time-resolved CMOS image sensor with high Conversion-Gain pixels and pipelined ADCs
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a CMOS image sensor with high Conversion-Gain pixels and column-shared pipelined ADCs for Fluorescence-lifetime imaging microscopy (FLIM). Pixel Conversion Gain of 121 uV/e-is achieved by creating a distal floating diffusion from transfer gate and reset transistor gate without any process modification. 32-channel 10-bit on-chip column-shared pipelined ADCs with sampling rate up to 5MS/s are designed using area-efficient ring amplifiers for the sensor readout. The ring amplifiers are designed based on actively-biased technique which reduces the area further by 40%. This image sensor chip is fabricated in a standard 180nm CMOS image sensor (CIS) process.
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High Conversion-Gain Pinned-Photodiode Pump-Gate Pixels in 180-nm CMOS Process
IEEE Journal of the Electron Devices Society, 2017Co-Authors: Song Chen, Donald B. Hondongwa, Eric R. FossumAbstract:This paper presents the design and characterization of high Conversion-Gain pixels in a 180-nm CMOS image sensor process. By reducing overlapping capacitance between a floating diffusion and transfer gate, output-referred pixel Conversion Gain as high as 118uV/eand read noise as low as 1.8erms are experimentally achieved without significant lag. A dark current of 38 pA/cm2 is measured at 60°C. Comparison between the proposed devices and a baseline pixel regarding device structure and characterization results is also presented.
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High Conversion-Gain pixels in a standard CMOS image sensor process
2017 IEEE Photonics Conference (IPC), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a new technique to achieve high pixel Conversion Gain (CG) in a standard 0.18 um CMOS image sensor process. CG of 121 uV/e- and read noise of 3.2 erms are measured in the prototype sensor.
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A time-resolved CMOS image sensor with high Conversion-Gain pixels and pipelined ADCs
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017Co-Authors: Song Chen, Eric R. FossumAbstract:This paper presents a CMOS image sensor with high Conversion-Gain pixels and column-shared pipelined ADCs for Fluorescence-lifetime imaging microscopy (FLIM). Pixel Conversion Gain of 121 uV/e-is achieved by creating a distal floating diffusion from transfer gate and reset transistor gate without any process modification. 32-channel 10-bit on-chip column-shared pipelined ADCs with sampling rate up to 5MS/s are designed using area-efficient ring amplifiers for the sensor readout. The ring amplifiers are designed based on actively-biased technique which reduces the area further by 40%. This image sensor chip is fabricated in a standard 180nm CMOS image sensor (CIS) process.
Xiaozhong Liao - One of the best experts on this subject based on the ideXlab platform.
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Hybrid-Bridge-Based DAB Converter With Voltage Match Control for Wide Voltage Conversion Gain Application
IEEE Transactions on Power Electronics, 2018Co-Authors: Guo Xu, Yaxiong Xu, Xiaozhong LiaoAbstract:This paper proposes a voltage match (VM) control for hybrid-bridge-based dual active bridge (DAB) converter in wide voltage Conversion Gain applications. With the addition of an auxiliary half-bridge circuit, the topology becomes an integration of a half-bridge and a full-bridge DAB converter. Unlike other pulse width modulation generation method for DAB converters, this converter utilizes four-level voltage at one port of the transformer to obtain matched voltage waveforms within the range of twice the minimum Conversion Gain. Wide Conversion Gain, decoupling of the two power control variables and wide zero-voltage switching (ZVS) ranges can be achieved with the proposed VM control. Full load ranges of ZVS for the six main power switches can be achieved and the two auxiliary switches can also operate in a wide ZVS range. In addition, the power control is done only using two control variables and its implementation is very simple, only needing a divider and a conventional voltage regulator. These characteristics and benefits of the proposed control are verified by experimental results from a 1-kw converter prototype.
Guo Xu - One of the best experts on this subject based on the ideXlab platform.
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Hybrid-Bridge-Based DAB Converter with Wide Voltage Conversion Gain
High-Frequency Isolated Bidirectional Dual Active Bridge DC–DC Converters with Wide Voltage Gain, 2018Co-Authors: Guo XuAbstract:This chapter proposes a voltage match (VM) control for hybrid-bridge-based dual active bridge (DAB) converter in wide voltage Conversion Gain applications. With the addition of an auxiliary half-bridge circuit, the topology becomes an integration of a half-bridge and a full-bridge DAB converter. Unlike other PWM generation method for DAB converters, this converter utilizes four-level voltage at one port of the transformer to obtain matched voltage waveforms within the range of twice the minimum Conversion Gain. Wide Conversion Gain, decoupling of the two power control variables, and wide zero-voltage switching (ZVS) ranges can be achieved with the proposed voltage match control. Full load ranges of ZVS for the six main power switches can be achieved, and the two auxiliary switches can also operate in a wide ZVS range. In addition, the power control is done only using two control variables and its implementation is very simple, only needing a divider and a conventional voltage regulator. These characteristics and benefits of the proposed control are verified by experimental results from a 1 kW converter prototype.
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Hybrid-Bridge-Based DAB Converter With Voltage Match Control for Wide Voltage Conversion Gain Application
IEEE Transactions on Power Electronics, 2018Co-Authors: Guo Xu, Yaxiong Xu, Xiaozhong LiaoAbstract:This paper proposes a voltage match (VM) control for hybrid-bridge-based dual active bridge (DAB) converter in wide voltage Conversion Gain applications. With the addition of an auxiliary half-bridge circuit, the topology becomes an integration of a half-bridge and a full-bridge DAB converter. Unlike other pulse width modulation generation method for DAB converters, this converter utilizes four-level voltage at one port of the transformer to obtain matched voltage waveforms within the range of twice the minimum Conversion Gain. Wide Conversion Gain, decoupling of the two power control variables and wide zero-voltage switching (ZVS) ranges can be achieved with the proposed VM control. Full load ranges of ZVS for the six main power switches can be achieved and the two auxiliary switches can also operate in a wide ZVS range. In addition, the power control is done only using two control variables and its implementation is very simple, only needing a divider and a conventional voltage regulator. These characteristics and benefits of the proposed control are verified by experimental results from a 1-kw converter prototype.