The Experts below are selected from a list of 261 Experts worldwide ranked by ideXlab platform
Giampaolo Buticchi - One of the best experts on this subject based on the ideXlab platform.
-
Internal Current Return Path for Ground Leakage Current Mitigation in Current Source Inverters
IEEE Access, 2019Co-Authors: Emilio Lorenzani, Giovanni Migliazza, Fabio Immovilli, Chris Gerada, He Zhang, Giampaolo ButicchiAbstract:This paper analyzes in detail the effect of a simple solution for ground leakage Current mitigation applicable to transformerless three-phase Current source inverter (CSI). The circuit modification solution is assessed for both traditional CSI topology and for CSI with an additional seventh switch, in literature named CSI7 (or H7), in particular with the splitting of the dc input inductance. In the present work, the solution is applied to grid-connected converters for string photovoltaic applications: scope of the circuit modification is to provide an internal Return Path from the wye connected capacitors of the output CL filter. This additional Return Path is able to significantly reduce the ground leakage Current without adversely affecting THD. The performance of the proposed solution is assessed by the numerical simulations in case of a string of photovoltaic (PV) modules and the different behavior of CSI and CSI7 topologies is thoroughly investigated. Furthermore, the definition of $V_{cmZC}$ is assessed by applying it to the common mode equivalent circuits for CSI7 with additional Return Path and their validation by means of a two-step simulation. The simulation results and experimental validation shows good agreement and confirm that the proposed solution is able to strongly reduce the ground leakage Current.
R P Dunne - One of the best experts on this subject based on the ideXlab platform.
-
when are transmission line effects important for on chip interconnections
IEEE Transactions on Microwave Theory and Techniques, 1997Co-Authors: A Deutsch, Gerard V Kopcsay, P J Restle, H Smith, G A Katopis, Wiren D Becker, Paul W Coteus, C W Surovic, B J Rubin, R P DunneAbstract:Short, medium, and long on-chip interconnections having linewidths of 0.45-52 /spl mu/m are analyzed in a five-metal-layer structure. We study capacitive coupling for short lines, inductive coupling for medium-length lines, inductance and resistance of the Current Return Path in the power buses, and line resistive losses for the global wiring. Design guidelines and technology changes are proposed to achieve minimum delay and contain crosstalk for local and global wiring. Conditional expressions are given to determine when transmission-line effects are important for accurate delay and crosstalk prediction.
M. Mondal - One of the best experts on this subject based on the ideXlab platform.
-
the impact of common mode Currents on signal integrity and emi in high speed differential data links
International Symposium on Electromagnetic Compatibility, 2008Co-Authors: Samuel Connor, Bruce Archambeault, M. MondalAbstract:The high-speed, differential signals in todaypsilas multi-board systems often carry significant amounts of common mode Current. Neglecting the common mode Currents can produce unrealistic signal integrity and electromagnetic simulation results. A couple cases will be shown that illustrate the impact of common mode Currents and mode conversion on the signal integrity of a link Path. Effective and accurate methods for quantifying the amount of common mode Current, the amount of inductance in the common mode Current Return Path, and the impact of the common mode noise on the differential signal are proposed to ensure better design practices.
-
the impact of common mode Currents on signal integrity and emi in high speed differential data links
International Symposium on Electromagnetic Compatibility, 2008Co-Authors: Samuel Connor, Bruce Archambeault, M. MondalAbstract:The high-speed, differential signals in todaypsilas multi-board systems often carry significant amounts of common mode Current. Neglecting the common mode Currents can produce unrealistic signal integrity and electromagnetic simulation results. A couple cases will be shown that illustrate the impact of common mode Currents and mode conversion on the signal integrity of a link Path. Effective and accurate methods for quantifying the amount of common mode Current, the amount of inductance in the common mode Current Return Path, and the impact of the common mode noise on the differential signal are proposed to ensure better design practices.
-
Electrical Analysis of Multi-board PCB Systems with Differential Signaling Considering Non-ideal Common Ground Connection
2007 IEEE Electrical Performance of Electronic Packaging, 2007Co-Authors: M. Mondal, Bhyrav M. Mutnury, Pravin Patel, Samuel Connor, Bruce Archambeault, Moises CasesAbstract:Non-uniform Current Return Path in multi-board systems induces significant common mode noise in high speed differential signals. The effect of the common mode noise on electrical signals considering inductance of inter-board connectors is described in this paper using measurement and modeling results. An effective and accurate method for modeling the common mode noise is proposed to ensure better design practices.
Emilio Lorenzani - One of the best experts on this subject based on the ideXlab platform.
-
Internal Current Return Path for Ground Leakage Current Mitigation in Current Source Inverters
IEEE Access, 2019Co-Authors: Emilio Lorenzani, Giovanni Migliazza, Fabio Immovilli, Chris Gerada, He Zhang, Giampaolo ButicchiAbstract:This paper analyzes in detail the effect of a simple solution for ground leakage Current mitigation applicable to transformerless three-phase Current source inverter (CSI). The circuit modification solution is assessed for both traditional CSI topology and for CSI with an additional seventh switch, in literature named CSI7 (or H7), in particular with the splitting of the dc input inductance. In the present work, the solution is applied to grid-connected converters for string photovoltaic applications: scope of the circuit modification is to provide an internal Return Path from the wye connected capacitors of the output CL filter. This additional Return Path is able to significantly reduce the ground leakage Current without adversely affecting THD. The performance of the proposed solution is assessed by the numerical simulations in case of a string of photovoltaic (PV) modules and the different behavior of CSI and CSI7 topologies is thoroughly investigated. Furthermore, the definition of $V_{cmZC}$ is assessed by applying it to the common mode equivalent circuits for CSI7 with additional Return Path and their validation by means of a two-step simulation. The simulation results and experimental validation shows good agreement and confirm that the proposed solution is able to strongly reduce the ground leakage Current.
A Deutsch - One of the best experts on this subject based on the ideXlab platform.
-
when are transmission line effects important for on chip interconnections
IEEE Transactions on Microwave Theory and Techniques, 1997Co-Authors: A Deutsch, Gerard V Kopcsay, P J Restle, H Smith, G A Katopis, Wiren D Becker, Paul W Coteus, C W Surovic, B J Rubin, R P DunneAbstract:Short, medium, and long on-chip interconnections having linewidths of 0.45-52 /spl mu/m are analyzed in a five-metal-layer structure. We study capacitive coupling for short lines, inductive coupling for medium-length lines, inductance and resistance of the Current Return Path in the power buses, and line resistive losses for the global wiring. Design guidelines and technology changes are proposed to achieve minimum delay and contain crosstalk for local and global wiring. Conditional expressions are given to determine when transmission-line effects are important for accurate delay and crosstalk prediction.
