The Experts below are selected from a list of 327 Experts worldwide ranked by ideXlab platform
Kazuyuki Aihara - One of the best experts on this subject based on the ideXlab platform.
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time domain digital to analog converter for spiking neural network hardware
Circuits Systems and Signal Processing, 2020Co-Authors: Seiji Uenohara, Kazuyuki AiharaAbstract:We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit in mixed-signal spiking neural networks. We refer to this circuit as a “time-domain DAC (TDAC)”. It produces weights for converting a digital input code into voltage using one current waveform. Therefore, the TDAC is more compact than a conventional DAC consisting of many current sources and resistors. Moreover, a TDAC with leak resistance reproduces biologically plausible synaptic responses expressed as alpha functions or dual exponential equations. We also present numerical analysis results for a TDAC and circuit simulation results for a circuit designed using the TSMC 40 nm CMOS process.
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time domain digital to analog converter for spiking neural network hardware
arXiv: Signal Processing, 2020Co-Authors: Seiji Uenohara, Kazuyuki AiharaAbstract:We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit of mixed-signal spiking neural networks. We named this circuit "time-domain DAC (TDAC)". This produces weights for converting a digital input code into voltage using one current waveform. Therefore, a TDAC is more compact than a conventional DAC that comprises many current sources and resistors. Moreover, a TDAC with leak resistance reproduces biological plausible synaptic responses that are expressed as alpha functions or dual exponential equations. We will show numerical analysis results of a TDAC and circuit simulation results of a circuit designed by the TSMC 40 nm CMOS process.
Seiji Uenohara - One of the best experts on this subject based on the ideXlab platform.
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time domain digital to analog converter for spiking neural network hardware
Circuits Systems and Signal Processing, 2020Co-Authors: Seiji Uenohara, Kazuyuki AiharaAbstract:We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit in mixed-signal spiking neural networks. We refer to this circuit as a “time-domain DAC (TDAC)”. It produces weights for converting a digital input code into voltage using one current waveform. Therefore, the TDAC is more compact than a conventional DAC consisting of many current sources and resistors. Moreover, a TDAC with leak resistance reproduces biologically plausible synaptic responses expressed as alpha functions or dual exponential equations. We also present numerical analysis results for a TDAC and circuit simulation results for a circuit designed using the TSMC 40 nm CMOS process.
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time domain digital to analog converter for spiking neural network hardware
arXiv: Signal Processing, 2020Co-Authors: Seiji Uenohara, Kazuyuki AiharaAbstract:We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit of mixed-signal spiking neural networks. We named this circuit "time-domain DAC (TDAC)". This produces weights for converting a digital input code into voltage using one current waveform. Therefore, a TDAC is more compact than a conventional DAC that comprises many current sources and resistors. Moreover, a TDAC with leak resistance reproduces biological plausible synaptic responses that are expressed as alpha functions or dual exponential equations. We will show numerical analysis results of a TDAC and circuit simulation results of a circuit designed by the TSMC 40 nm CMOS process.
Hsiehhung Hsieh - One of the best experts on this subject based on the ideXlab platform.
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an amorphous silicon operational amplifier and its application to a 4 bit digital to analog converter
IEEE Journal of Solid-state Circuits, 2010Co-Authors: Yichuan Tarn, Hsiehhung HsiehAbstract:A circuit topology suitable for the implementation of operational amplifiers (OPAMPs) in an amorphous-silicon (a-Si) thin-film-transistor (TFT) technology is presented in this paper. Due to the use of a positive feedback in the input differential pair, the gain of the OPAMP is effectively boosted, facilitating analog circuit designs for system-on-panel (SoP) applications. Based on the proposed technique, a 4-bit digital-to-analog converter (DAC) prototype, which consists of a resistor string and a unity-gain buffer, is developed. The DAC is implemented by using an 8-?m a-Si NTFT process. Operated at a supply voltage of 25 V, the fabricated circuit consumes a dc power of 3.68 mW. For an output voltage range from 9.5 to 12.5 V, the measurement results indicate a differential non-linearity (DNL) of ±0.216 LSB and an integral non-linearity (INL) of ±0.667 LSB. With a settling time less than 1.1 ms, the DAC circuit can operate at a maximum conversion rate of 0.9 kS/s.
Hoi Ying Iris Cheung - One of the best experts on this subject based on the ideXlab platform.
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Energy Savings Assessment for digital-to-analog converter Boxes
Lawrence Berkeley National Laboratory, 2011Co-Authors: Hoi Ying Iris CheungAbstract:E RNEST O RLANDO L AWRENCE B ERKELEY N ATIONAL L ABORATORY Energy Savings Assessment for Digital- to-Analog converter Boxes Hoi Ying (Iris) Cheung, Alan Meier, Richard Brown Environmental Energy Technologies Division March 24, 2011 The work described in this document was partially funded by the U.S. Department of Energy under Contract No. DEAC02-05CH11231 and the Environmental Protection Agency IAG under Contract No. DW8992236901. This work was also published as Energy Policy 39 (2011) 1312–1317.
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Energy savings assessment for digital-to-analog converter boxes
Energy Policy, 2011Co-Authors: Hoi Ying Iris Cheung, Alan Meier, Richard E. BrownAbstract:The Digital Television (DTV) converter Box Coupon Program was administered by the U.S. government to subsidize purchases of digital-to-analog converter boxes, with up to two $40 coupons for each eligible household. In order to qualify as Coupon Eligible converter Boxes (CECBs), these devices had to meet a number of minimum performance specifications, including energy efficiency standards. The Energy Star Program also established voluntary energy efficiency specifications that are more stringent than the CECB requirements. In this study, we measured the power and energy consumptions for a sample of 12 CECBs (including 6 Energy Star labeled models) in-use in homes and estimated aggregate energy savings produced by the energy efficiency policies. Based on the 35 million coupons redeemed through the end of the program, our analysis indicates that between 2500 and 3700 GWh per year are saved as a result of the energy efficiency policies implemented on digital-to-analog converter boxes. The energy savings generated are equivalent to the annual electricity use of 280,000 average US homes.
Hiroyuki Uenohara - One of the best experts on this subject based on the ideXlab platform.
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40Gbps, 3-bit operation of a semiconductor optical digital-to-analog converter
2009Co-Authors: Kengo Sawada, Hiroyuki UenoharaAbstract:We demonstrate 40Gbps, 3-bit-operation of a semiconductor optical digital-to-analog converter consisting of MMI couplers and delay lines. We achieved output with 7-level amplitude with fixed phase successfully for the first time.
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Investigation of Operation Tolerance of a Semiconductor Optical digital-to-analog converter on Phase and Intensity Fluctuation
COIN-ACOFT 2007 - Joint International Conference on the Optical Internet and the 32nd Australian Conference on Optical Fibre Technology, 2007Co-Authors: Kengo Sawada, Hiroyuki UenoharaAbstract:We estimated the effect of chirping of a semiconductor integrated optical digital-to-analog converter by simulations and experiments. Its operation tolerance on phase and intensity fluctuation was obtained from calculation of BER together with previous results.
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First demonstration of a semiconductor-integrated optical digital-to-analog converter
31st European Conference on Optical Communications (ECOC 2005), 2005Co-Authors: Hiroyuki Uenohara, R. KurosawaAbstract:Semiconductor-integrated optical digital-to-analog converter was realized for the first time. Two-bits four-level analog signals were generated and the phase error of about ±0.095% was observed. (2 pages)