The Experts below are selected from a list of 282 Experts worldwide ranked by ideXlab platform
Oleg A. Mukhanov - One of the best experts on this subject based on the ideXlab platform.
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Cryocooled wideband digital channelizing radio-frequency receiver based on low-pass ADC
Superconductor Science and Technology, 2007Co-Authors: I.v. Vernik, Deepnarayan Gupta, D.e. Kirichenko, V. V. Dotsenko, R. Miller, R.j. Webber, Pavel V. Shevchenko, Andrei Talalaevskii, Oleg A. MukhanovAbstract:We have demonstrated a digital receiver performing Direct Digitization of radio-frequency signals over a wide frequency range from kilohertz to gigahertz. The complete system, consisting of a cryopackaged superconductor all-digital receiver (ADR) chip followed by room-temperature interface electronics and a field programmable gate array (FPGA) based post-processing module, has been developed. The ADR chip comprises a low-pass analog-to-digital converter (ADC) delta modulator with phase modulation–demodulation architecture together with digital in-phase and quadrature mixer and a pair of digital decimation filters. The chip is fabricated using a 4. 5k A cm −2 process and is cryopackaged using a commercial-off-the-shelf cryocooler. Experimental results in HF, VHF, UHF and L bands and their analysis, proving consistent operation of the cryopackaged ADR chip up to 24.32 GHz clock frequency, are presented and discussed.
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digital channelizing radio frequency receiver
IEEE Transactions on Applied Superconductivity, 2007Co-Authors: Deepnarayan Gupta, D.e. Kirichenko, I.v. Vernik, Pavel V. Shevchenko, Andrei Talalaevskii, T V Filippov, A F Kirichenko, A Sahu, S Sarwana, Oleg A. MukhanovAbstract:HYPRES is developing a class of digital receivers featuring Direct Digitization at radio frequency (RF). Such a receiver consists of a wideband analog-to-digital converter (ADC) modulator and multiple digital channelizer units to extract different frequency bands-of-interest within the broad digitized spectrum. The single-bit oversampled data, from either a lowpass delta or bandpass delta-sigma modulator, are applied to one or more channelizers, each comprising digital in-phase and quadrature mixers and a pair of digital decimation filters. We perform channelization in two steps, the first at full ADC sampling clock frequency with rapid single flux quantum (RSFQ) digital circuits and the second at reduced (decimated) clock frequency with commercial field programmable gate array (FPGA) chips at room temperature. We have demonstrated lowpass and bandpass digital receivers by integrating an ADC modulator and a channelizer unit on the same chip at clock frequencies up to 20 GHz. These 1-cm2 single-chip digital-RF receivers contain over 10,000 Josephson junctions. The channelizing receiver approach can be extended to include multiple ADC modulators and multiple channelizer units on a multi-chip module.
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Cryocooled Wideband Digital Channelizing RF Receiver Based on Low-Pass ADC
2007Co-Authors: I.v. Vernik, Deepnarayan Gupta, D.e. Kirichenko, V. V. Dotsenko, R. Miller, R.j. Webber, Pavel V. Shevchenko, Andrei Talalaevskii, Oleg A. MukhanovAbstract:We have demonstrated a digital receiver performing Direct Digitization of radio frequency signals over a wide frequency range from kilohertz to gigahertz. The complete system, consisting of a cryopackaged superconductor All-Digital Receiver (ADR) chip followed by room-temperature interface electronics and a field programmable gate array (FPGA) based post-processing module, has been developed. The ADR chip comprises a low-pass delta modulator with phase modulation- demodulation architecture together with digital in-phase and quadrature mixer and a pair of digital decimation filters. The chip is fabricated using a 4.5 kA/cm 2 process and is cryopackaged using a commercial-off-the-shelf cryocooler. Experimental results in HF, VHF, UHF and L bands and their analysis proving consistent operation of the cryopackaged ADR chip up to 24.32 GHz clock frequency, are presented and discussed. To our knowledge this is the fastest digital receiver demonstrated to date.
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Superconductor digital RF development for software radio
IEEE Communications Magazine, 2001Co-Authors: D.k. Brock, Oleg A. Mukhanov, J. RosaAbstract:We review a new "Direct Digitization" approach for "digital RF" architectures for software radio. Although Direct Digitization usually implies the simultaneous Digitization of all channels in a particular band at a downconverted IF, we use this term to refer exclusively to the Direct Digitization of all bands, from near DC to RF. Furthermore, we present results on band selection and Digitization of RF signals Directly at the carrier frequency with high resolution. These novel approaches are enabled by a superconductor analog-to-digital converter technology using an ultra-fast IC logic known as Rapid Single Flux Quantum (RSFQ) logic, with performance capable of enabling envisioned software radios.
J. Rosa - One of the best experts on this subject based on the ideXlab platform.
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Superconductor digital RF development for software radio
IEEE Communications Magazine, 2001Co-Authors: D.k. Brock, Oleg A. Mukhanov, J. RosaAbstract:We review a new "Direct Digitization" approach for "digital RF" architectures for software radio. Although Direct Digitization usually implies the simultaneous Digitization of all channels in a particular band at a downconverted IF, we use this term to refer exclusively to the Direct Digitization of all bands, from near DC to RF. Furthermore, we present results on band selection and Digitization of RF signals Directly at the carrier frequency with high resolution. These novel approaches are enabled by a superconductor analog-to-digital converter technology using an ultra-fast IC logic known as Rapid Single Flux Quantum (RSFQ) logic, with performance capable of enabling envisioned software radios.
Jean-michel Nebus - One of the best experts on this subject based on the ideXlab platform.
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4-Channel, time-domain measurement system using track and hold amplifier for the characterization and linearization of high-power amplifiers
International Journal of Microwave and Wireless Technologies, 2011Co-Authors: Sajjad Ahmed, Tibault Reveyrand, Guillaume Neveux, Denis Barataud, Mohammad Saad El Dine, Jean-michel NebusAbstract:We propose in this paper a 4-channel time-domain test bench for the characterization and linearity enhancement of microwave power amplifiers (PAs). The proposed time-domain measurement system utilizes four track and hold amplifiers (THAs) for Direct subsampling of radiofrequency (RF) signals. The use of wideband THAs to replace samplers or mixers enables reducing analog IF circuit complexity. It permits Direct Digitization of RF signals like CW, two-tone and pulsed modulated signals, bringing more flexibility in the receiver's performance by enhancing the dynamic range and bandwidth. This test bench is capable of completely extracting the phase, amplitude, and transfer characteristics of non-linear devices excited with CW or modulated RF signals. In this work, two-tone transfer characteristics of a 50 W GaN HEMT Nitronex PA were extracted and processed for applying digital pre-distortion linearization to enhance linearity performance. Time-domain envelope and carrier waveforms (voltage and current) along with third-order inter-modulation distortion (IMD) products with and without digital pre-distortion scheme are also presented.
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Time-domain Measurement System Using Track & Hold Amplifier Applied to Pulsed RF Characterization of High Power GaN Devices
2011Co-Authors: Sajjad Ahmed, Mohamad Saad El Dine, Tibault Reveyrand, Guillaume Neveux, Denis Barataud, Jean-michel NebusAbstract:This paper proposes a time-domain test bench for the pulsed characterization of a high Power GaN Amplifier. Our findings are based on a Track and Hold Amplifier for the down-conversion of RF spectra using the sub harmonic sampling principle. The use of wideband THA to replace samplers or mixers enables reducing component density in an analog domain. It permits Direct Digitization of entire pulsed RF spectrum, bringing more flexibility in the receiver's performance by enhancing the bandwidth.
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Time-domain measurement system using Track & Hold Amplifier applied to pulsed RF characterization of high power GaN devices
2011 IEEE MTT-S International Microwave Symposium, 2011Co-Authors: Sajjad Ahmed, Mohamad Saad El Dine, Tibault Reveyrand, Guillaume Neveux, Denis Barataud, Jean-michel NebusAbstract:We propose in this paper a time-domain test bench for the pulsed characterization of a high Power GaN Amplifier. Our findings are based on a Track and Hold Amplifier for the down-conversion of RF spectra using the sub harmonic sampling principle. The use of wideband THA to replace samplers or mixers enables reducing component density in an analog domain. It permits Direct Digitization of entire pulsed RF spectrum, bringing more flexibility in the receiver's performance by enhancing the dynamics and bandwidth. This test bench is capable of completely extracting the phase, amplitude and pulse profile of the RF signal. Power characteristics, phase and amplitude information for multiple bursts of pulses of a 50 W GaN HEMT Nitronex (NPTB00050B) power amplifier have been measured using the proposed calibrated measurement system. The low frequency memory effects (thermal and trapping) of high power GaN amplifier were also measured.
Deepnarayan Gupta - One of the best experts on this subject based on the ideXlab platform.
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Improved High-Speed Data Recorder for Superconducting Digital-RF Receivers
IEEE Transactions on Applied Superconductivity, 2014Co-Authors: Alf E. Lehmann, D.e. Kirichenko, Deepnarayan GuptaAbstract:Abstract — A superconducting digital-RF receiver with high ingest-rate data recording capability has been developed. The data recorder unit uses standard PC components with state-of-the-art solid-state drives (SSDs) and interfaces with the superconductor analog-to-digital converter (ADC) through a commercial FPGA board. High-speed data ingest rates exceeding 3.2 GBps have been demonstrated successfully with single-bit ADCs clocked up to 27.52 GHz. A continuous recording of 2.5 TB has been achieved using a bank of 12 SSDs. A new graphical user interface featuring single button operation and automatic file naming as well as convenient configuration setting has been developed. Keywords — ADC, digital recording, digital receiver, Direct Digitization, field programmable gate arrays, digital radio I. I NTRODUCTION Multi-function and modular digital-RF receiver systems that offer data processing and distribution entirely in the digital domain are beneficial for military and commercial radio frequency (RF) applications [1]. Dynamically changing bandwidth requirements can be best supported with flexible multi-channel receiver architectures using Direct Digitization. This architecture also has the advantage of eliminating the need for analog intermediate frequencies Signal Analysis(IF) Data Recorder (p)along with most analog RF distribution and processing. Digital -RF receiver systems featuring superconductor analogto-digital converters (ADCs) can be clocked at tens of Gigahertz and are a perfectly suitable to cover a wide range of applications. Rapid single flux quantum (RSFQ) integrated circuits with niobium (Nb) Josephson junctions (JJs) are particularly attractive for Direct Digitization and digital processing of mixed RF signals [2]. Fig. 1 depicts a multi-band digital-RF receiver showing different functions that may be part of a single receiver terminal. For simplicity, each RF spectrum segment is shown as applied to a single ADC. Each ADC can also feed multiple data processing back end chains through the programmable digital switch matrix. All digital back end processing modules can be band-independent and/or programmable. Either the processed or the unprocessed data streams could be passed to one or more data recorder units for simultaneous data collection or data logging. The initial development of the high-speed data recording for superconducting digital-RF receivers was presented previously and near-continuous data recording with only 88 ms of lost data out of 17 minutes was successfully demonstrated [3]. In this paper, we present a substantially improved high-speed data recorder unit with time continuous data recording capabilities for long data acquisitions.
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Microwave receivers with Direct Digitization
2009 IEEE MTT-S International Microwave Symposium Digest, 2009Co-Authors: Dmitri E. Kirichenko, Timur V. Filippov, Deepnarayan GuptaAbstract:Superconductor analog-to-digital converters (ADCs) and ultrafast digital circuitry enable processing of microwave signals entirely in the digital domain. We have designed and demonstrated a wide variety of continuous-time bandpass delta-sigma modulators using Josephson junction comparators. Featuring sampling frequencies up to 30 GHz, single-chip digital receivers have been demonstrated by connecting a rapid single flux quantum (RSFQ) digital circuitry with these ADCs. These receiver chips, cooled to 4 K by cryogen-free refrigerators, have been used with room-temperature digital processors to demonstrate reception of microwave signals for X-band satellite communications and Link-16 data links. To date, the highest frequency of Direct Digitization is 21 GHz for satellite communication. We report recent advances in ADC design to obtain higher dynamic range.
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Progress in the Development of Cryocooled Digital Channelizing RF Receivers
IEEE Transactions on Applied Superconductivity, 2009Co-Authors: I.v. Vernik, D.e. Kirichenko, V. V. Dotsenko, R. Miller, R.j. Webber, Pavel V. Shevchenko, Deepnarayan GuptaAbstract:HYPRES is developing a class of digital receivers featuring Direct Digitization at radio frequency. The complete system, consisting of a cryopackaged Nb superconductor all-digital receiver (ADR) chip followed by room-temperature interface electronics and a field-programmable gate array (FPGA) based post-processing module, has been developed. Depending on the targeted application the ADR chip comprised either a low-pass delta with phase modulation-demodulation architecture or X-band band-pass sigma-delta modulators together with digital in-phase and quadrature mixer and a pair of digital decimation filters. The chips were fabricated using a 4.5-kA/cm2 HYPRES process and were cryopackaged using a commercial-off-the-shelf cryocooler. Recently, with significant improvements in chip cryopackage, room-temperature electronics and FPGA programming we were able to achieve stable operation of a low-pass ADR at 28.16 GHz and X-band ADR at 30.72 GHz clock frequencies. Experimental results are presented and discussed.
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Cryocooled wideband digital channelizing radio-frequency receiver based on low-pass ADC
Superconductor Science and Technology, 2007Co-Authors: I.v. Vernik, Deepnarayan Gupta, D.e. Kirichenko, V. V. Dotsenko, R. Miller, R.j. Webber, Pavel V. Shevchenko, Andrei Talalaevskii, Oleg A. MukhanovAbstract:We have demonstrated a digital receiver performing Direct Digitization of radio-frequency signals over a wide frequency range from kilohertz to gigahertz. The complete system, consisting of a cryopackaged superconductor all-digital receiver (ADR) chip followed by room-temperature interface electronics and a field programmable gate array (FPGA) based post-processing module, has been developed. The ADR chip comprises a low-pass analog-to-digital converter (ADC) delta modulator with phase modulation–demodulation architecture together with digital in-phase and quadrature mixer and a pair of digital decimation filters. The chip is fabricated using a 4. 5k A cm −2 process and is cryopackaged using a commercial-off-the-shelf cryocooler. Experimental results in HF, VHF, UHF and L bands and their analysis, proving consistent operation of the cryopackaged ADR chip up to 24.32 GHz clock frequency, are presented and discussed.
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digital channelizing radio frequency receiver
IEEE Transactions on Applied Superconductivity, 2007Co-Authors: Deepnarayan Gupta, D.e. Kirichenko, I.v. Vernik, Pavel V. Shevchenko, Andrei Talalaevskii, T V Filippov, A F Kirichenko, A Sahu, S Sarwana, Oleg A. MukhanovAbstract:HYPRES is developing a class of digital receivers featuring Direct Digitization at radio frequency (RF). Such a receiver consists of a wideband analog-to-digital converter (ADC) modulator and multiple digital channelizer units to extract different frequency bands-of-interest within the broad digitized spectrum. The single-bit oversampled data, from either a lowpass delta or bandpass delta-sigma modulator, are applied to one or more channelizers, each comprising digital in-phase and quadrature mixers and a pair of digital decimation filters. We perform channelization in two steps, the first at full ADC sampling clock frequency with rapid single flux quantum (RSFQ) digital circuits and the second at reduced (decimated) clock frequency with commercial field programmable gate array (FPGA) chips at room temperature. We have demonstrated lowpass and bandpass digital receivers by integrating an ADC modulator and a channelizer unit on the same chip at clock frequencies up to 20 GHz. These 1-cm2 single-chip digital-RF receivers contain over 10,000 Josephson junctions. The channelizing receiver approach can be extended to include multiple ADC modulators and multiple channelizer units on a multi-chip module.
D.k. Brock - One of the best experts on this subject based on the ideXlab platform.
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Superconductor digital RF development for software radio
IEEE Communications Magazine, 2001Co-Authors: D.k. Brock, Oleg A. Mukhanov, J. RosaAbstract:We review a new "Direct Digitization" approach for "digital RF" architectures for software radio. Although Direct Digitization usually implies the simultaneous Digitization of all channels in a particular band at a downconverted IF, we use this term to refer exclusively to the Direct Digitization of all bands, from near DC to RF. Furthermore, we present results on band selection and Digitization of RF signals Directly at the carrier frequency with high resolution. These novel approaches are enabled by a superconductor analog-to-digital converter technology using an ultra-fast IC logic known as Rapid Single Flux Quantum (RSFQ) logic, with performance capable of enabling envisioned software radios.