The Experts below are selected from a list of 42 Experts worldwide ranked by ideXlab platform
Koichi Seno - One of the best experts on this subject based on the ideXlab platform.
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floppy Disk drive control apparatus capable of ensuring seek operation using a stepping motor having a low torque
2001Co-Authors: Masaki Kato, Yoshihito Otomo, Hiroyuki Hayasaka, Koichi SenoAbstract:In an FDD control apparatus for controlling a floppy Disk drive for driving a floppy Disk loaded in the floppy Disk drive, an FDD control part including a floppy Disk Controller (FDC) is disposed in an FDD side in lieu of a host side (a SET side). The host side (SET side) is loaded with a USB connector connected to the FDD control part. The FDD control part includes a flash ROM for storing a program for adjusting a step timing of a stepping motor.
Hisao Tateishi - One of the best experts on this subject based on the ideXlab platform.
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floppy Disk Controller allowed to detect status change of floppy Disk driver in standby mode
1994Co-Authors: Hisao TateishiAbstract:A floppy Disk Controller enters into a standby mode to reduce electric power consumption, and includes a standby Controller which causes a floppy Disk driver unit to report a status change to a recovery Controller during the standby mode to recover the floppy Disk Controller to an active mode, thereby indicating the correct status of the floppy Disk driver unit at all times.
Bane Vasic - One of the best experts on this subject based on the ideXlab platform.
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signal processing and coding techniques for 2 d magnetic recording an overview
Proceedings of the IEEE, 2018Co-Authors: Shayan Srinivasa Garani, Lara Dolecek, J R Barry, Frederic Sala, Bane VasicAbstract:Two-dimensional magnetic recording (TDMR) is an emerging storage technology that aims to achieve areal densities on the order of 10 Tb/in2, mainly driven by innovative channels engineering with minimal changes to existing head/media designs within a systems framework. Significant additive areal density gains can be achieved by using TDMR over bit patterned media (BPM) and energy-assisted magnetic recording (EAMR). In TDMR, the sectors are inherently 2-D with reduced track pitch and bit widths, leading to severe 2-D intersymbol interference (ISI). This necessitates the development of powerful 2-D signal processing and coding algorithms for mitigating 2-D ISI, timing artifacts, jitter, and electronics noise resulting from irregular media grain positions and read-head electronics. The algorithms have to be eventually realized within a read/write channel architecture as a part of a system-on-chip (SoC) within the Disk Controller system. In this work, we provide a wide overview of TDMR technology, channel models and capacity, signal processing algorithms (detection and timing recovery), and error-correcting codes attuned to 2-D channels. The innovations and advances described not only make TDMR a promising future technology, but may serve a broader engineering audience as well.
Yang Jinxin - One of the best experts on this subject based on the ideXlab platform.
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method for preventing data from being damaged by floppy Disk Controller
2002Co-Authors: Yang JinxinAbstract:A method for preventing flopply Disk Controller from destroying data features that before the byte data are written to or read from floppy Disk in DMA mode, if the maximal interval time from sending DMA request signal (DREQ) to disabling it is greater than a particular value is judged to determine if the data are lost or destroyed during transmission. The result is reported to computer for further processing.
Rita M Obrien - One of the best experts on this subject based on the ideXlab platform.
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sytem and method for merging Disk change data from a floppy Disk Controller with data relating to an ide drive Controller
1994Co-Authors: Rita M ObrienAbstract:A system is disclosed for merging data from two separate registers at different locations in a computer system. A floppy drive Controller is provided as part of a companion chip located separately from an IDE drive Controller. Both Controllers include a data register with the same address to make the system compatible with prior BIOS programs. The register in the floppy Controller includes a DSK CHG bit as bit D7 of a direct input register (DIR), which is obtained from the DSK CHG# signal from the floppy drive. In the present invention, the DSK CHG# signal from the floppy drive is connected directly to the bus interface unit (BIU) of the integrated processor. The processor merges this signal with data bits D0-D6 of the IDE Controller by determining the location of the IDE Controller from the Address Control Register (ACR), which is determined during system initialization. The floppy drive Controller also is programmed during system initialization not to respond to an access to address value 3F7h by programming a configuration register in the Controller. The BIU determines whether it should merge the data or whether the IDE Controller will merge the data by checking the status of a MERGE bit in the ISACFG register, which also is configured during system initialization.