The Experts below are selected from a list of 297 Experts worldwide ranked by ideXlab platform
T Kamiyama - One of the best experts on this subject based on the ideXlab platform.
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an algaas gaas hetero source bipolar mode static induction transistor hbsit with low Forward Voltage Drop and high current gain
International Symposium on Power Semiconductor Devices and IC's, 1994Co-Authors: K Nonaka, Y Ishikawa, S Yokoyama, T KamiyamaAbstract:A new 550 V AlGaAs/GaAs Hetero source Bipolar mode Static Induction Transistor (HBSIT) has recently been developed and fabricated. The GaAs HBSIT is considered to be superior to conventional Silicon power devices in on-state characteristics. For an example, Forward Voltage Drop of 0.3 V can be obtained at current gain of 150 and drain current density of 100 A/cm/sup 2/.
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An AlGaAs/GaAs hetero source bipolar mode static induction transistor (HBSIT) with low Forward Voltage Drop and high current gain
Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics, 1994Co-Authors: K Nonaka, Y Ishikawa, S Yokoyama, T KamiyamaAbstract:A new 550 V AlGaAs/GaAs Hetero source Bipolar mode Static Induction Transistor (HBSIT) has recently been developed and fabricated. The GaAs HBSIT is considered to be superior to conventional Silicon power devices in on-state characteristics. For an example, Forward Voltage Drop of 0.3 V can be obtained at current gain of 150 and drain current density of 100 A/cm/sup 2/.
Jincheng Zhou - One of the best experts on this subject based on the ideXlab platform.
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High-Voltage Electron Injection Enhanced TC-LIGBT on 1.5- $\mu \text{m}$ -Thin SOI Layer for Reducing the Forward Voltage Drop
IEEE Transactions on Electron Devices, 2016Co-Authors: Zhuo Yang, Hui Yu, Jincheng ZhouAbstract:In this paper, a new high-Voltage electron injection enhanced tridimensional channel lateral insulated gate bipolar transistor (EIETC-LIGBT) on 1.5- $\mu \text{m}$ -thin silicon-on-insulator (SOI) layer is proposed to reduce the Forward Voltage Drop. Based on the previous TC-LIGBT we have proposed, an extra floating p-layer is added at the emitter side of the proposed EIETC-LIGBT. The region locating between the separated p-body cells and the floating p-layer is the high doped n-type electron injection efficiency modulation (EIEM) region. Above the EIEM region, several virtual polygate structures connected to the emitter are fabricated between the separated p-body cells and the floating p-layer. The highly doped EIEM region can help the proposed structure to reduce the Forward Voltage Drop by increasing the electron injection efficiency. The virtual gate structures are contributed to the Forward-biased safe operating area of the proposed structure. By optimizing the doping of the EIEM region and the width of the virtual gate structures, an EIETC-LIGBT with the Forward Voltage Drop of 3.4 V at $V_{\mathrm {{GE}}}= 10$ V and $J_{\mathrm {{CE}}}= 100$ A/cm $^{\mathrm {{2}}}$ can be achieved, which has an improvement of 17% compared with the previous TC-LIGBT structure on the same thin SOI layer without sacrificing the current capability.
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high Voltage electron injection enhanced tc ligbt on 1 5 mu text m thin soi layer for reducing the Forward Voltage Drop
IEEE Transactions on Electron Devices, 2016Co-Authors: Zhuo Yang, Hui Yu, Jincheng ZhouAbstract:In this paper, a new high-Voltage electron injection enhanced tridimensional channel lateral insulated gate bipolar transistor (EIETC-LIGBT) on 1.5- $\mu \text{m}$ -thin silicon-on-insulator (SOI) layer is proposed to reduce the Forward Voltage Drop. Based on the previous TC-LIGBT we have proposed, an extra floating p-layer is added at the emitter side of the proposed EIETC-LIGBT. The region locating between the separated p-body cells and the floating p-layer is the high doped n-type electron injection efficiency modulation (EIEM) region. Above the EIEM region, several virtual polygate structures connected to the emitter are fabricated between the separated p-body cells and the floating p-layer. The highly doped EIEM region can help the proposed structure to reduce the Forward Voltage Drop by increasing the electron injection efficiency. The virtual gate structures are contributed to the Forward-biased safe operating area of the proposed structure. By optimizing the doping of the EIEM region and the width of the virtual gate structures, an EIETC-LIGBT with the Forward Voltage Drop of 3.4 V at $V_{\mathrm {{GE}}}= 10$ V and $J_{\mathrm {{CE}}}= 100$ A/cm $^{\mathrm {{2}}}$ can be achieved, which has an improvement of 17% compared with the previous TC-LIGBT structure on the same thin SOI layer without sacrificing the current capability.
K Nonaka - One of the best experts on this subject based on the ideXlab platform.
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an algaas gaas hetero source bipolar mode static induction transistor hbsit with low Forward Voltage Drop and high current gain
International Symposium on Power Semiconductor Devices and IC's, 1994Co-Authors: K Nonaka, Y Ishikawa, S Yokoyama, T KamiyamaAbstract:A new 550 V AlGaAs/GaAs Hetero source Bipolar mode Static Induction Transistor (HBSIT) has recently been developed and fabricated. The GaAs HBSIT is considered to be superior to conventional Silicon power devices in on-state characteristics. For an example, Forward Voltage Drop of 0.3 V can be obtained at current gain of 150 and drain current density of 100 A/cm/sup 2/.
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An AlGaAs/GaAs hetero source bipolar mode static induction transistor (HBSIT) with low Forward Voltage Drop and high current gain
Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics, 1994Co-Authors: K Nonaka, Y Ishikawa, S Yokoyama, T KamiyamaAbstract:A new 550 V AlGaAs/GaAs Hetero source Bipolar mode Static Induction Transistor (HBSIT) has recently been developed and fabricated. The GaAs HBSIT is considered to be superior to conventional Silicon power devices in on-state characteristics. For an example, Forward Voltage Drop of 0.3 V can be obtained at current gain of 150 and drain current density of 100 A/cm/sup 2/.
Zhuo Yang - One of the best experts on this subject based on the ideXlab platform.
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High-Voltage Electron Injection Enhanced TC-LIGBT on 1.5- $\mu \text{m}$ -Thin SOI Layer for Reducing the Forward Voltage Drop
IEEE Transactions on Electron Devices, 2016Co-Authors: Zhuo Yang, Hui Yu, Jincheng ZhouAbstract:In this paper, a new high-Voltage electron injection enhanced tridimensional channel lateral insulated gate bipolar transistor (EIETC-LIGBT) on 1.5- $\mu \text{m}$ -thin silicon-on-insulator (SOI) layer is proposed to reduce the Forward Voltage Drop. Based on the previous TC-LIGBT we have proposed, an extra floating p-layer is added at the emitter side of the proposed EIETC-LIGBT. The region locating between the separated p-body cells and the floating p-layer is the high doped n-type electron injection efficiency modulation (EIEM) region. Above the EIEM region, several virtual polygate structures connected to the emitter are fabricated between the separated p-body cells and the floating p-layer. The highly doped EIEM region can help the proposed structure to reduce the Forward Voltage Drop by increasing the electron injection efficiency. The virtual gate structures are contributed to the Forward-biased safe operating area of the proposed structure. By optimizing the doping of the EIEM region and the width of the virtual gate structures, an EIETC-LIGBT with the Forward Voltage Drop of 3.4 V at $V_{\mathrm {{GE}}}= 10$ V and $J_{\mathrm {{CE}}}= 100$ A/cm $^{\mathrm {{2}}}$ can be achieved, which has an improvement of 17% compared with the previous TC-LIGBT structure on the same thin SOI layer without sacrificing the current capability.
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high Voltage electron injection enhanced tc ligbt on 1 5 mu text m thin soi layer for reducing the Forward Voltage Drop
IEEE Transactions on Electron Devices, 2016Co-Authors: Zhuo Yang, Hui Yu, Jincheng ZhouAbstract:In this paper, a new high-Voltage electron injection enhanced tridimensional channel lateral insulated gate bipolar transistor (EIETC-LIGBT) on 1.5- $\mu \text{m}$ -thin silicon-on-insulator (SOI) layer is proposed to reduce the Forward Voltage Drop. Based on the previous TC-LIGBT we have proposed, an extra floating p-layer is added at the emitter side of the proposed EIETC-LIGBT. The region locating between the separated p-body cells and the floating p-layer is the high doped n-type electron injection efficiency modulation (EIEM) region. Above the EIEM region, several virtual polygate structures connected to the emitter are fabricated between the separated p-body cells and the floating p-layer. The highly doped EIEM region can help the proposed structure to reduce the Forward Voltage Drop by increasing the electron injection efficiency. The virtual gate structures are contributed to the Forward-biased safe operating area of the proposed structure. By optimizing the doping of the EIEM region and the width of the virtual gate structures, an EIETC-LIGBT with the Forward Voltage Drop of 3.4 V at $V_{\mathrm {{GE}}}= 10$ V and $J_{\mathrm {{CE}}}= 100$ A/cm $^{\mathrm {{2}}}$ can be achieved, which has an improvement of 17% compared with the previous TC-LIGBT structure on the same thin SOI layer without sacrificing the current capability.
Yuji Suzuki - One of the best experts on this subject based on the ideXlab platform.
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Fast‐switching‐speed, low‐Forward‐Voltage‐Drop static induction (SI) thyristor
Electrical Engineering in Japan, 1996Co-Authors: Mitsuhide Maeda, Takuji Keno, Yuji SuzukiAbstract:A static induction (SI) thyristor using a normally-off planar-gate structure in a low power class has been developed to be used as a power switching device in a three-phase inverter circuit. A 600 V-15 A class SI thyristor with very fast switching time (tgt, tgq) and low Forward Voltage Drop (VTM) was designed and created. This design was performed with a reasonable wafer structure (n−/n/p+), an n− base carrier concentration and thickness, and a gate structure (gate diffusion length and gate-gate pitch). Microscopic processing was used to obtain this SI thyristor. The performance trade-off between turn-off time and Forward Voltage Drop is controlled by a lifetime control process using proton irradiation that results in a very fast switching time with tgt of 500 ns and tgq of 500 ns with VTM of 1.5 V (at IT= 18 A). At a current level of IT = 18 A, the current density in the active area becomes 200 A/cm2, which indicates that the performance of the SI thyristor is superior to that of conventional IGBTs and MOSFETs.
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fast switching speed low Forward Voltage Drop static induction si thyristor
Electrical Engineering in Japan, 1996Co-Authors: Mitsuhide Maeda, Takuji Keno, Yuji SuzukiAbstract:A static induction (SI) thyristor using a normally-off planar-gate structure in a low power class has been developed to be used as a power switching device in a three-phase inverter circuit. A 600 V-15 A class SI thyristor with very fast switching time (tgt, tgq) and low Forward Voltage Drop (VTM) was designed and created. This design was performed with a reasonable wafer structure (n−/n/p+), an n− base carrier concentration and thickness, and a gate structure (gate diffusion length and gate-gate pitch). Microscopic processing was used to obtain this SI thyristor. The performance trade-off between turn-off time and Forward Voltage Drop is controlled by a lifetime control process using proton irradiation that results in a very fast switching time with tgt of 500 ns and tgq of 500 ns with VTM of 1.5 V (at IT= 18 A). At a current level of IT = 18 A, the current density in the active area becomes 200 A/cm2, which indicates that the performance of the SI thyristor is superior to that of conventional IGBTs and MOSFETs.
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fast switching speed low Forward Voltage Drop static induction si thyristor
Ieej Transactions on Industry Applications, 1995Co-Authors: Mitsuhide Maeda, Takuji Keno, Yuji SuzukiAbstract:An SI thyristor using a normally-off planar-gate structure in a low power class has been developed for the use as a power switching device in a three-phase inverter circuit. A 600V-15A class SI thyristor with very fast switching time (tgt, tgq) and low Forward Voltage Drop (VTM) was designed and fabricated. This design was performed with a reasonable wafer structure (n-/n/p+), an n- base carrier concentration and thickness, and a gate structure (gate diffusion length and gate pitch). Microscopic processing was used to obtain this SI thyristor. The performance trade-off between turn-off time and Forward Voltage Drop is controlled by a life time control process using proton irradiation which results in a very fast switching time with tgt of 500ns and tgq of 500ns with VTM of 1.5V (at IT=18A). At the current level of IT=18A, the current density in the active area becomes 200A/cm2 which indicates that the performance of the SI thyristor is superior to that of conventional IGBTs and MOSFETs.