The Experts below are selected from a list of 9018 Experts worldwide ranked by ideXlab platform

Xuewei Piao - One of the best experts on this subject based on the ideXlab platform.

  • Anchor-Chain: A Seamless Producer Mobility Support Scheme in NDN
    2017 IEEE 85th Vehicular Technology Conference (VTC Spring), 2017
    Co-Authors: Yizhe Zheng, Xuewei Piao
    Abstract:

    Named Data Networking (NDN) has natural advantages in the consumer mobility support for its design characteristics, while the producer mobility support was left unspecified. Some producer mobility support schemes have been proposed in recent years, which better solved the huge overhead caused by the route aggregation in normal NDN, yet critical issues like long handover latency and high packet loss rate still remain. In this paper, we improved and optimized a quite popular method anchor-based solution by setting multi-level anchor nodes strategically based on the network topology hierarchy, which we called Anchor-Chain, and the Interest packet forwarded to the producer would pass through it. After the producer moved, the newly generated Anchor-Chain would reuse the previous Forwarding Path as far as possible to guide more Interests to the new location of producer and reduce the Interest packets drop rate. Besides, we introduce a mobility preprocess mechanism that takes the advantage of connectionless and multi-Path Forwarding in NDN to establish the future Interest Forwarding Path in advance, which assists the producer performs "seamless" handover. By numerical analysis, our approach can reduce the handover latency and improve the response ratio compared with the main current solutions.

  • VTC Spring - Anchor-Chain: A Seamless Producer Mobility Support Scheme in NDN
    2017 IEEE 85th Vehicular Technology Conference (VTC Spring), 2017
    Co-Authors: Yizhe Zheng, Xuewei Piao
    Abstract:

    Named Data Networking (NDN) has natural advantages in the consumer mobility support for its design characteristics, while the producer mobility support was left unspecified. Some producer mobility support schemes have been proposed in recent years, which better solved the huge overhead caused by the route aggregation in normal NDN, yet critical issues like long handover latency and high packet loss rate still remain. In this paper, we improved and optimized a quite popular method anchor-based solution by setting multi-level anchor nodes strategically based on the network topology hierarchy, which we called Anchor-Chain, and the Interest packet forwarded to the producer would pass through it. After the producer moved, the newly generated Anchor-Chain would reuse the previous Forwarding Path as far as possible to guide more Interests to the new location of producer and reduce the Interest packets drop rate. Besides, we introduce a mobility preprocess mechanism that takes the advantage of connectionless and multi-Path Forwarding in NDN to establish the future Interest Forwarding Path in advance, which assists the producer performs "seamless" handover. By numerical analysis, our approach can reduce the handover latency and improve the response ratio compared with the main current solutions.

Antonia Zhai - One of the best experts on this subject based on the ideXlab platform.

  • Compiler and hardware support for reducing the synchronization of speculative threads
    ACM Transactions on Architecture and Code Optimization, 2008
    Co-Authors: Antonia Zhai, Christopher B Colohan, J. Gregory Steffan, Todd C Mowry
    Abstract:

    Thread-level speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. In this article, we focus on one important limitation of program performance under TLS, which stalls as a result of synchronizing and Forwarding scalar values between speculative threads that would otherwise cause frequent data dependences and, hence, failed speculation. Using SPECint benchmarks that have been automatically transformed by our compiler to exploit TLS, we present, evaluate in detail, and compare both compiler and hardware techniques for improving the communication of scalar values. We find that through our dataflow algorithms for three increasingly aggressive instruction scheduling techniques, the compiler can drastically reduce the critical Forwarding Path introduced by the synchronization and Forwarding of scalar values. We also show that hardware techniques for reducing synchronization can be complementary to compiler scheduling, but that the additional performance benefits are minimal and are generally not worth the cost.

  • exploiting speculative thread level parallelism in data compression applications
    Languages and Compilers for Parallel Computing, 2006
    Co-Authors: Shengyue Wang, Antonia Zhai
    Abstract:

    Although hardware support for Thread-Level Speculation (TLS) can ease the compiler's tasks in creating parallel programs by allowing the compiler to create potentially dependent parallel threads, advanced compiler optimization techniques must be developed and judiciously applied to achieve the desired performance. In this paper, we take a close examination on two data compression benchmarks, GZIP and BZIP2, propose, implement and evaluate new compiler optimization techniques to eliminate performance bottlenecks in their parallel execution and improve their performance. The proposed techniques (i) remove the critical Forwarding Path created by synchronizing memory-resident values; (ii) identify and categorize reduction-like variables whose intermediate results are used within loops, and propose code transformation to remove the inter-thread data dependences caused by these variables; and (iii) transform the program to eliminate stalls caused by variations in thread size. While no previous work has reported significant performance improvement on parallelizing these two benchmarks, we are able to achieve up to 36% performance improvement for GZIP and 37% for BZIP2.

  • LCPC - Exploiting speculative thread-level parallelism in data compression applications
    Languages and Compilers for Parallel Computing, 2006
    Co-Authors: Shengyue Wang, Antonia Zhai
    Abstract:

    Although hardware support for Thread-Level Speculation (TLS) can ease the compiler's tasks in creating parallel programs by allowing the compiler to create potentially dependent parallel threads, advanced compiler optimization techniques must be developed and judiciously applied to achieve the desired performance. In this paper, we take a close examination on two data compression benchmarks, GZIP and BZIP2, propose, implement and evaluate new compiler optimization techniques to eliminate performance bottlenecks in their parallel execution and improve their performance. The proposed techniques (i) remove the critical Forwarding Path created by synchronizing memory-resident values; (ii) identify and categorize reduction-like variables whose intermediate results are used within loops, and propose code transformation to remove the inter-thread data dependences caused by these variables; and (iii) transform the program to eliminate stalls caused by variations in thread size. While no previous work has reported significant performance improvement on parallelizing these two benchmarks, we are able to achieve up to 36% performance improvement for GZIP and 37% for BZIP2.

  • compiler optimization of scalar value communication between speculative threads
    Architectural Support for Programming Languages and Operating Systems, 2002
    Co-Authors: Antonia Zhai, Christopher B Colohan, Gregory J Steffan, Todd C Mowry
    Abstract:

    While there have been many recent proposals for hardware that supports Thread-Level Speculation (TLS), there has been relatively little work on compiler optimizations to fully exploit this potential for parallelizing programs optimistically. In this paper, we focus on one important limitation of program performance under TLS, which is stalls due to Forwarding scalar values between threads that would otherwise cause frequent data dependences. We present and evaluate dataflow algorithms for three increasingly-aggressive instruction scheduling techniques that reduce the critical Forwarding Path introduced by the synchronization associated with this data Forwarding. In addition, we contrast our compiler techniques with related hardware-only approaches. With our most aggressive compiler and hardware techniques, we improve performance under TLS by 6.2-28.5% for 6 of 14 applications, and by at least 2.7% for half of the other applications.

  • ASPLOS - Compiler optimization of scalar value communication between speculative threads
    Tenth international conference on architectural support for programming languages and operating systems on Proceedings of the 10th international confe, 2002
    Co-Authors: Antonia Zhai, Christopher B Colohan, J. Gregory Steffan, Todd C Mowry
    Abstract:

    While there have been many recent proposals for hardware that supports Thread-Level Speculation (TLS), there has been relatively little work on compiler optimizations to fully exploit this potential for parallelizing programs optimistically. In this paper, we focus on one important limitation of program performance under TLS, which is stalls due to Forwarding scalar values between threads that would otherwise cause frequent data dependences. We present and evaluate dataflow algorithms for three increasingly-aggressive instruction scheduling techniques that reduce the critical Forwarding Path introduced by the synchronization associated with this data Forwarding. In addition, we contrast our compiler techniques with related hardware-only approaches. With our most aggressive compiler and hardware techniques, we improve performance under TLS by 6.2-28.5% for 6 of 14 applications, and by at least 2.7% for half of the other applications.

Yizhe Zheng - One of the best experts on this subject based on the ideXlab platform.

  • Anchor-Chain: A Seamless Producer Mobility Support Scheme in NDN
    2017 IEEE 85th Vehicular Technology Conference (VTC Spring), 2017
    Co-Authors: Yizhe Zheng, Xuewei Piao
    Abstract:

    Named Data Networking (NDN) has natural advantages in the consumer mobility support for its design characteristics, while the producer mobility support was left unspecified. Some producer mobility support schemes have been proposed in recent years, which better solved the huge overhead caused by the route aggregation in normal NDN, yet critical issues like long handover latency and high packet loss rate still remain. In this paper, we improved and optimized a quite popular method anchor-based solution by setting multi-level anchor nodes strategically based on the network topology hierarchy, which we called Anchor-Chain, and the Interest packet forwarded to the producer would pass through it. After the producer moved, the newly generated Anchor-Chain would reuse the previous Forwarding Path as far as possible to guide more Interests to the new location of producer and reduce the Interest packets drop rate. Besides, we introduce a mobility preprocess mechanism that takes the advantage of connectionless and multi-Path Forwarding in NDN to establish the future Interest Forwarding Path in advance, which assists the producer performs "seamless" handover. By numerical analysis, our approach can reduce the handover latency and improve the response ratio compared with the main current solutions.

  • VTC Spring - Anchor-Chain: A Seamless Producer Mobility Support Scheme in NDN
    2017 IEEE 85th Vehicular Technology Conference (VTC Spring), 2017
    Co-Authors: Yizhe Zheng, Xuewei Piao
    Abstract:

    Named Data Networking (NDN) has natural advantages in the consumer mobility support for its design characteristics, while the producer mobility support was left unspecified. Some producer mobility support schemes have been proposed in recent years, which better solved the huge overhead caused by the route aggregation in normal NDN, yet critical issues like long handover latency and high packet loss rate still remain. In this paper, we improved and optimized a quite popular method anchor-based solution by setting multi-level anchor nodes strategically based on the network topology hierarchy, which we called Anchor-Chain, and the Interest packet forwarded to the producer would pass through it. After the producer moved, the newly generated Anchor-Chain would reuse the previous Forwarding Path as far as possible to guide more Interests to the new location of producer and reduce the Interest packets drop rate. Besides, we introduce a mobility preprocess mechanism that takes the advantage of connectionless and multi-Path Forwarding in NDN to establish the future Interest Forwarding Path in advance, which assists the producer performs "seamless" handover. By numerical analysis, our approach can reduce the handover latency and improve the response ratio compared with the main current solutions.

Todd C Mowry - One of the best experts on this subject based on the ideXlab platform.

  • Compiler and hardware support for reducing the synchronization of speculative threads
    ACM Transactions on Architecture and Code Optimization, 2008
    Co-Authors: Antonia Zhai, Christopher B Colohan, J. Gregory Steffan, Todd C Mowry
    Abstract:

    Thread-level speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. In this article, we focus on one important limitation of program performance under TLS, which stalls as a result of synchronizing and Forwarding scalar values between speculative threads that would otherwise cause frequent data dependences and, hence, failed speculation. Using SPECint benchmarks that have been automatically transformed by our compiler to exploit TLS, we present, evaluate in detail, and compare both compiler and hardware techniques for improving the communication of scalar values. We find that through our dataflow algorithms for three increasingly aggressive instruction scheduling techniques, the compiler can drastically reduce the critical Forwarding Path introduced by the synchronization and Forwarding of scalar values. We also show that hardware techniques for reducing synchronization can be complementary to compiler scheduling, but that the additional performance benefits are minimal and are generally not worth the cost.

  • compiler optimization of scalar value communication between speculative threads
    Architectural Support for Programming Languages and Operating Systems, 2002
    Co-Authors: Antonia Zhai, Christopher B Colohan, Gregory J Steffan, Todd C Mowry
    Abstract:

    While there have been many recent proposals for hardware that supports Thread-Level Speculation (TLS), there has been relatively little work on compiler optimizations to fully exploit this potential for parallelizing programs optimistically. In this paper, we focus on one important limitation of program performance under TLS, which is stalls due to Forwarding scalar values between threads that would otherwise cause frequent data dependences. We present and evaluate dataflow algorithms for three increasingly-aggressive instruction scheduling techniques that reduce the critical Forwarding Path introduced by the synchronization associated with this data Forwarding. In addition, we contrast our compiler techniques with related hardware-only approaches. With our most aggressive compiler and hardware techniques, we improve performance under TLS by 6.2-28.5% for 6 of 14 applications, and by at least 2.7% for half of the other applications.

  • ASPLOS - Compiler optimization of scalar value communication between speculative threads
    Tenth international conference on architectural support for programming languages and operating systems on Proceedings of the 10th international confe, 2002
    Co-Authors: Antonia Zhai, Christopher B Colohan, J. Gregory Steffan, Todd C Mowry
    Abstract:

    While there have been many recent proposals for hardware that supports Thread-Level Speculation (TLS), there has been relatively little work on compiler optimizations to fully exploit this potential for parallelizing programs optimistically. In this paper, we focus on one important limitation of program performance under TLS, which is stalls due to Forwarding scalar values between threads that would otherwise cause frequent data dependences. We present and evaluate dataflow algorithms for three increasingly-aggressive instruction scheduling techniques that reduce the critical Forwarding Path introduced by the synchronization associated with this data Forwarding. In addition, we contrast our compiler techniques with related hardware-only approaches. With our most aggressive compiler and hardware techniques, we improve performance under TLS by 6.2-28.5% for 6 of 14 applications, and by at least 2.7% for half of the other applications.

S.k. Bodhe - One of the best experts on this subject based on the ideXlab platform.

  • Indirect Path Setup: A New Approach for Handoff in HAWAII
    15th International Conference on Advanced Computing and Communications (ADCOM 2007), 2007
    Co-Authors: F.m. Abduljalil, S.k. Bodhe
    Abstract:

    In the next generation wireless access technologies which are defined to be a pure IP based wireless networks; there are two types of IP mobility management: IP macro-mobility management (intra- domain), and IP micro-mobility management (inter- domain). HAWAII protocol is one of the prominent protocols for IP micro-mobility management. It supports two approaches of Path setup handoff schemes: Forwarding Path Setup schemes and Non- Forwarding Path Setup schemes. In this paper, we proposed a new approach for fast Path setup handoff in HAWAII. The proposed approach is implemented and evaluated using network simulator ns-2. Then, the performance of the proposed approach is compared against the two HAWAII Path setup handoff schemes. The simulation results show that the number of packet loss is reduced to zero and the handoff delay and service disruption are reduced to minimum. The UDP and TCP performance are significantly improved in comparison with other HA WAII Path setup schemes. The proposed approach can efficiently support realtime and non-real time applications.