The Experts below are selected from a list of 38772 Experts worldwide ranked by ideXlab platform
Dervis Karaboga - One of the best experts on this subject based on the ideXlab platform.
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routing in wireless sensor networks using an ant colony optimization aco router chip
Sensors, 2009Co-Authors: Selcuk Okdem, Dervis KarabogaAbstract:Wireless Sensor Networks consisting of nodes with limited power are deployed to gather useful information from the field. In WSNs it is critical to collect the information in an energy efficient manner. Ant Colony Optimization, a swarm intelligence based optimization technique, is widely used in network routing. A novel routing approach using an Ant Colony Optimization algorithm is proposed for Wireless Sensor Networks consisting of stable nodes. Illustrative examples, detailed descriptions and comparative performance test results of the proposed approach are included. The approach is also implemented to a small sized Hardware Component as a router chip. Simulation results show that proposed algorithm provides promising solutions allowing node designers to efficiently operate routing tasks.
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routing in wireless sensor networks using ant colony optimization
Adaptive Hardware and Systems, 2006Co-Authors: Selcuk Okdem, Dervis KarabogaAbstract:This paper introduces a new approach to routing operations in wireless sensor networks (WSNs). We have developed a routing scheme and adapted ant colony optimization (ACO) algorithm to this scheme to get a dynamic and reliable routing protocol. We have also implemented our approach to a small sized Hardware Component as a router chip to propose sensor node designers an easy handling of WSN routing operations. The chip is tested and its performance results are obtained by using Proteus simulation program. The ACO approach and its Hardware implementation seem to provide a promising solution for node designers to operate routing tasks easily and effectively.
Selcuk Okdem - One of the best experts on this subject based on the ideXlab platform.
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routing in wireless sensor networks using an ant colony optimization aco router chip
Sensors, 2009Co-Authors: Selcuk Okdem, Dervis KarabogaAbstract:Wireless Sensor Networks consisting of nodes with limited power are deployed to gather useful information from the field. In WSNs it is critical to collect the information in an energy efficient manner. Ant Colony Optimization, a swarm intelligence based optimization technique, is widely used in network routing. A novel routing approach using an Ant Colony Optimization algorithm is proposed for Wireless Sensor Networks consisting of stable nodes. Illustrative examples, detailed descriptions and comparative performance test results of the proposed approach are included. The approach is also implemented to a small sized Hardware Component as a router chip. Simulation results show that proposed algorithm provides promising solutions allowing node designers to efficiently operate routing tasks.
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routing in wireless sensor networks using ant colony optimization
Adaptive Hardware and Systems, 2006Co-Authors: Selcuk Okdem, Dervis KarabogaAbstract:This paper introduces a new approach to routing operations in wireless sensor networks (WSNs). We have developed a routing scheme and adapted ant colony optimization (ACO) algorithm to this scheme to get a dynamic and reliable routing protocol. We have also implemented our approach to a small sized Hardware Component as a router chip to propose sensor node designers an easy handling of WSN routing operations. The chip is tested and its performance results are obtained by using Proteus simulation program. The ACO approach and its Hardware implementation seem to provide a promising solution for node designers to operate routing tasks easily and effectively.
Duru, Dilek Goksel - One of the best experts on this subject based on the ideXlab platform.
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Kablosuz EEG Ölçümlerine Dayalı Beyin Bilgisayar Arayüzü Tasarımı ve Uygulaması: Pilot Çalışma
'Institute of Electrical and Electronics Engineers (IEEE)', 2015Co-Authors: Ilgin Sena, Duru, Dilek GokselAbstract:Medical Technologies National Conference (TIPTEKNO) --OCT 15-18, 2015 -- Bodrum, TURKEYWOS: 000380505200064Brain computer interface (BCI), is a direct communication pathway between brain signals and an external device which often serves to support cognitive and emotional motor functions. The implementation and design of a human computer interface (HCI) based on opened-closed eye movements and arousal - valence measurements are aimed. The goal is to develop a system that working with wireless EEG headset and Arduino board as electronic device or data acquisition based on eye movements and arousal levels. It is a multidisciplinary research area, where computer science, behavioral sciences and several other fields of study are intersecting. The HCI system aimed in this study, it will be useful in rehabilitation research and treatment, and enhance daily life quality of the disabled people. The concept of the study is being used Arduino test kit and wireless EEG sensors. After the adjustment of the Hardware Components, an embedded code is implemented for the data transmission between the sensor and the Arduino board. Also serial port of the computers is adjusted to listen the transmitted data in order to visualize the sensed movements. This data is projected on a Hardware Component such as a led or diode
Tatsuo Nakajima - One of the best experts on this subject based on the ideXlab platform.
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Hardware assisted reliability enhancement for embedded multi core virtualization design
International Symposium on Object Component Service-Oriented Real-Time Distributed Computing, 2011Co-Authors: Tsung Han Lin, Chen-yi Lee, Hiromasa Shimada, Hitoshi Mitake, Yuki Kinebuchi, Alexandre Courbot, Takushi Morita, Tatsuo NakajimaAbstract:In this paper, we propose a virtualization architecture for the multi-core embedded system to provide more system reliability and security while maintaining the same performance without introducing additional special Hardware supports or having to implement complex protection mechanism in the virtualization layer. Virtualization has been widely used in embedded systems, especially in consumer electronics, albeit itself is not a new technique, because there are various needs for both GPOS (General Purpose Operating System) and RTOS (Real Time Operating System). The surge of the multi-core platform in the embedded system also helps the consolidation of the virtualization system for its better performance and lower power consumption. Embedded virtualization design usually uses two kinds of approaches. The first one is to use the traditional VMM, but it is too complicated for use in the embedded environment if there is no additional special Hardware support. The other is the use of the micro kernel which imposes a modular design. The guest systems, however, would suffer from considerable amount of modifications because the micro kernel lets the guest systems to run in user space. For some RTOSes and theirs applications originally running in kernel space, it makes this approach more difficult to work because a lot of privileged instructions are used in those codes. To achieve better reliability and keep the virtualization layer design light weighted, a common Hardware Component adopted in the multi-core embedded processors is used in this work. In the most embedded platforms, vendors provide additional on-chip local memory for each physical core and these local memory areas are private only to their cores. By taking this memory architecture's advantage, we can mitigate above-mentioned problems at once. We choose to re-map the virtualization layer's program called SPUMONE, which it runs all its guest systems in kernel space, on the local memory. By doing so, it can provide additional reliability and security for the entire system because the SPUMONE's design in a multi-core platform has each instance being installed on a separated processor core which is different from the traditional virtualization layer design and the content of each SPUMONE is inaccessible to each others. We also achieve this goal without bringing any overhead to the overall performance.
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Hardware-assisted reliability enhancement for embedded multi-core virtualization design
Proceedings - 1st International Workshop on Cyber-Physical Systems Networks and Applications CPSNA 2011 Workshop Held During RTCSA 2011, 2011Co-Authors: Tsung Han Lin, Chen-yi Lee, Hiromasa Shimada, Hitoshi Mitake, Yuki Kinebuchi, Tatsuo NakajimaAbstract:In this paper, we propose a virtualization architecture for the multi-core embedded system to provide more sys-tem reliability and security while maintaining the same performance without introducing additional special Hardware supports or having to implement complex protection mechanism in the virtualization layer. Embedded virtualization design usually uses two kinds of approaches, traditional VMM and microkernel approaches, but both of them suffer from performance or engineering cost problems. To achieve better reliability and keep the virtualization layer design light weighted, a common Hardware Component called local memory adopted in the multi-core embedded processors is used in this work. By taking this memory ar-chitecture's advantage, we can mitigate above-mentioned problems at once. We choose to re-map the virtualizationlayer's program called SPUMONE, which it runs all its guest systems in kernel space, on the local memory. By doing so, it can provide additional reliability and security for the entire system because the SPUMONE's design in a multi-core platform has each instance being installed on a separated processor core, which is different from the traditional virtualization layer design, and therefore the content of each SPUMONE in the local memory is inaccessible to each others.
Duru D.g. - One of the best experts on this subject based on the ideXlab platform.
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Design and implementation of brain computer interface based on wireless EEG measurements: A pilot study [Kablosuz EEG Ölçümlerine Dayali Beyin Bilgisayar Arayüzü Tasarimi ve Uygulamasi: Pilot Çalişma]
'Institute of Electrical and Electronics Engineers (IEEE)', 2016Co-Authors: Ilgin S., Duru D.g.Abstract:Medical Technologies National Conference, TIPTEKNO 2015 -- 15 October 2015 through 18 October 2015 --Brain computer interface (BCI), is a direct communication pathway between brain signals and an external device which often serves to support cognitive and emotional motor functions. The implementation and design of a human computer interface (HCI) based on opened-closed eye movements and arousal - valence measurements are aimed. The goal is to develop a system that working with wireless EEG headset and Arduino board as electronic device or data acquisition based on eye movements and arousal levels. It is a multidisciplinary research area, where computer science, behavioral sciences and several other fields of study are intersecting. The HCI system aimed in this study, it will be useful in rehabilitation research and treatment, and enhance daily life quality of the disabled people. The concept of the study is being used Arduino test kit and wireless EEG sensors. After the adjustment of the Hardware Components, an embedded code is implemented for the data transmission between the sensor and the Arduino board. Also serial port of the computers is adjusted to listen the transmitted data in order to visualize the sensed movements. This data is projected on a Hardware Component such as a led or diode. © 2015 IEEE
