The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform

Rolf Ernst - One of the best experts on this subject based on the ideXlab platform.

  • a recursive approach to end to end path latency computation in Heterogeneous Multiprocessor systems
    International Conference on Hardware Software Codesign and System Synthesis, 2009
    Co-Authors: Simon Schliecker, Rolf Ernst
    Abstract:

    This paper proposes a method for the derivation of end-to-end delays of applications that involve processing on multiple components in a Heterogeneous Multiprocessor system. The rocedure precisely captures the pipelined and parallel processing of multiple events along an application path by accurately capturing the resource timing and avoiding the pay-bursts-only-once problem. Both time-triggered and event-triggered task activation schemes with arbitrary event patterns are supported. In contrast to previous work, complex application topologies are allowed: The approach considers path forking and merging, as well as functional cycles and non-functional cyclic dependencies. The basis for the proposed method is an iterative compositional performance analysis, that allows computing event models in such systems. Based on the event models and local performance abstractions we propose a recursive approach to the derivation of the worst-case latency.

  • providing accurate event models for the analysis of Heterogeneous Multiprocessor systems
    International Conference on Hardware Software Codesign and System Synthesis, 2008
    Co-Authors: Simon Schliecker, Jonas Rox, Matthias Ivers, Rolf Ernst
    Abstract:

    This paper proposes a new method for deriving quantitative event information for compositional Multiprocessor performance analysis. This procedure brakes down the complexity into the analysis of individual components (tasks mapped to resources) and the propagation of the timing information with the help of event models. This paper improves previous methods to derive event models in a Multiprocessor system by providing tighter bounds and allowing arbitrarily shaped event models. The procedure is based on a a simple yet expressive resource model called the multiple event busy time which can be derived on the basis of classical scheduling theory -- it can therefore be provided for a large domain of scheduling policies. Our experiments show that overestimation by previous methods can be reduced significantly.

  • scheduling analysis integration for Heterogeneous Multiprocessor soc
    Real-Time Systems Symposium, 2003
    Co-Authors: Kai Richter, R Racu, Rolf Ernst
    Abstract:

    Today, only very few techniques out of the host of work on formal performance and timing analysis have been adopted in MpSoC (Multiprocessor system-on-chip) design. One of the key reasons is a mismatch between the scheduling models assumed in most formal approaches and the Heterogeneous world of MpSoC scheduling techniques and communication patterns. This heterogeneity results from IP reuse and a plug-and-play design style, required to effectively reach the necessary design productivity. A second problem is the model complexity. While complex, specialized models can find their way into industry niches, their broad acceptance is extremely doubtful. In this paper, we review the existing scheduling analysis techniques with respect to these key requirements and derive a good compromise between model simplicity on the one hand, and applicability to MpSoC design on the other hand. The approach represents system-level scheduling analysis as a flow-analysis problem for event streams that can be configured to reuse the existing local scheduling analysis techniques. We define transformations between few key event stream models to meet the interfacing requirements of the compositional design style. An example demonstrates the application of the approach, as well as the worthiness of the results.

Brian L. Evans - One of the best experts on this subject based on the ideXlab platform.

  • Communication-aware Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems
    Journal of Signal Processing Systems, 2012
    Co-Authors: Jing Lin, Andreas Gerstlauer, Brian L. Evans
    Abstract:

    Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, we address the problem of multi-objective mapping of SDF graphs onto Heterogeneous Multiprocessor platforms, where we account for the overhead of bus-based inter-processor communication. The primary contributions include (1) an integer linear programming (ILP) model that globally optimizes throughput, latency and cost; (2) low-complexity two-stage heuristics based on a combination of an evolutionary algorithm with an ILP to generate either a single sub-optimal mapping solution or a Pareto front for design space optimization. In our simulations, the proposed heuristic shows up to 12x run-time efficiency compared to the global ILP while maintaining a 10^ − 6 optimality gap in throughput.

  • Heterogeneous Multiprocessor mapping for real time streaming systems
    International Conference on Acoustics Speech and Signal Processing, 2011
    Co-Authors: Jing Lin, Andreas Gerstlauer, Akshaya Srivatsa, Brian L. Evans
    Abstract:

    Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, we address the problem of multi-objective mapping of SDF graphs onto Heterogeneous multi-processor platforms. The primary contributions include (1) an integer linear programming (ILP) model that globally optimizes throughput, latency and cost; (2) a low-complexity two-stage heuristic based on a combination of an evolutionary algorithm with an ILP to generate either a single sub-optimal mapping solution or a Pareto front for design space optimization. In our simulations, the proposed heuristic shows a 10−6 gap from the ILP optimal solution, with up to 12x better run-time efficiency.

S Viswanathan - One of the best experts on this subject based on the ideXlab platform.

Arijit Mondal - One of the best experts on this subject based on the ideXlab platform.

  • reliability aware energy optimized scheduling of non preemptive periodic real time tasks on Heterogeneous Multiprocessor system
    IEEE Transactions on Parallel and Distributed Systems, 2020
    Co-Authors: Niraj Kumar, Jaishree Mayank, Arijit Mondal
    Abstract:

    Higher reliability and lower energy consumption are conflicting, yet among the most important design objectives for the real-time systems. Moreover, in the domain of real-time systems, non-preemptive scheduling is relatively unexplored with objectives such as reliability and energy. Thus we propose an active replication based framework to schedule a set of periodic real-time tasks in the non-preemptive Heterogeneous environment such that the given reliability and timing constraints are satisfied whereas the energy consumption is minimized. First, we formulate the problem as a constraint optimization problem that provides an optimal solution; however, it does not scale well. Thus, we also propose heuristics which apply reservation of processors and reallocation of jobs, to compute suboptimal solution efficiently in terms of energy consumption as well as schedulability. Heuristics make use of the interplay of task-level reliability target, reliability of replicas, number of replicas, reliability of tasks, and energy consumption. We perform an experimental study on the test cases generated by extending UUnisort algorithm [1] and observe the effect of various simulation parameters on energy consumption and schedulability.

Jing Lin - One of the best experts on this subject based on the ideXlab platform.

  • Communication-aware Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems
    Journal of Signal Processing Systems, 2012
    Co-Authors: Jing Lin, Andreas Gerstlauer, Brian L. Evans
    Abstract:

    Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, we address the problem of multi-objective mapping of SDF graphs onto Heterogeneous Multiprocessor platforms, where we account for the overhead of bus-based inter-processor communication. The primary contributions include (1) an integer linear programming (ILP) model that globally optimizes throughput, latency and cost; (2) low-complexity two-stage heuristics based on a combination of an evolutionary algorithm with an ILP to generate either a single sub-optimal mapping solution or a Pareto front for design space optimization. In our simulations, the proposed heuristic shows up to 12x run-time efficiency compared to the global ILP while maintaining a 10^ − 6 optimality gap in throughput.

  • Heterogeneous Multiprocessor mapping for real time streaming systems
    International Conference on Acoustics Speech and Signal Processing, 2011
    Co-Authors: Jing Lin, Andreas Gerstlauer, Akshaya Srivatsa, Brian L. Evans
    Abstract:

    Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, we address the problem of multi-objective mapping of SDF graphs onto Heterogeneous multi-processor platforms. The primary contributions include (1) an integer linear programming (ILP) model that globally optimizes throughput, latency and cost; (2) a low-complexity two-stage heuristic based on a combination of an evolutionary algorithm with an ILP to generate either a single sub-optimal mapping solution or a Pareto front for design space optimization. In our simulations, the proposed heuristic shows a 10−6 gap from the ILP optimal solution, with up to 12x better run-time efficiency.