The Experts below are selected from a list of 2406 Experts worldwide ranked by ideXlab platform

Pohung Chen - One of the best experts on this subject based on the ideXlab platform.

  • an 80 mv startup dual mode boost converter by charge pumped pulse generator and threshold voltage tuned oscillator with Hot Carrier Injection
    IEEE Journal of Solid-state Circuits, 2012
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Takayasu Sakurai
    Abstract:

    This paper presents an 80 mV startup-voltage dual-mode boost converter for energy harvesting applications. The charge-pumped pulse generator enables a startup operation of the boost converter from the input voltage of 80 mV. The threshold voltage tuned oscillator for the clock generator of the boost converter compensates for the die-to-die process variation by a Hot Carrier Injection (HCI), thereby reducing the minimum operation voltage (VDDMIN) of the clock generator by 45% with a trimming time of 10 minutes. The proposed step-up converter achieves the lowest startup voltage without using a mechanical switch or a large transformer.

  • a 1 v input switched capacitor voltage converter with voltage reference free pulse density modulation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Xin Zhang, Takayasu Sakurai, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot-Carrier Injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μA-10 mA output current range.

  • a 80 mv input fast startup dual mode boost converter with charge pumped pulse generator for energy harvesting
    Asian Solid-State Circuits Conference, 2011
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Yoshikatsu Ryu, Takayasu Sakurai
    Abstract:

    A low startup-voltage and fast startup dual-mode boost converter for energy harvesting applications is developed in 65-nm CMOS. Comparing with the previous work [6], the startup-time, the minimum startup voltage, and the program time are greatly improved. (1) A startup by the boost converter instead of a charge pump reduced the startup-time to 4.8ms which is 1/56 of [6] and the shortest to date. (2) The proposed sub-1nW charge-pumped pulse generator (CPPG) enabled the lowest startup voltage of 80mV to date without mechanical switch. (3) The proposed threshold-voltage-tuned oscillator with Hot-Carrier Injection (HCI) for CPPG to compensate for the die-to-die process variations reduced the program time to 3min which is 1/20 of [6], thereby reducing the test cost.

  • a voltage reference free pulse density modulation vrf pdm 1 v input switched capacitor 1 2 voltage converter with output voltage trimming by Hot Carrier Injection and periodic activation scheme
    Symposium on VLSI Circuits, 2011
    Co-Authors: Xin Zhang, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V input, 0.45-V output switched-capacitor (SC) 2∶1 voltage converter is developed in 65-nm CMOS. A proposed voltage-reference-free pulse density modulation (VRF-PDM) increased the efficiency from 17% to 73% at 50-µA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot Carrier Injection to a comparator and a periodic activation scheme of the SC converter are also proposed to solve the problems attributed to VRF-PDM.

Makoto Takamiya - One of the best experts on this subject based on the ideXlab platform.

  • an 80 mv startup dual mode boost converter by charge pumped pulse generator and threshold voltage tuned oscillator with Hot Carrier Injection
    IEEE Journal of Solid-state Circuits, 2012
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Takayasu Sakurai
    Abstract:

    This paper presents an 80 mV startup-voltage dual-mode boost converter for energy harvesting applications. The charge-pumped pulse generator enables a startup operation of the boost converter from the input voltage of 80 mV. The threshold voltage tuned oscillator for the clock generator of the boost converter compensates for the die-to-die process variation by a Hot Carrier Injection (HCI), thereby reducing the minimum operation voltage (VDDMIN) of the clock generator by 45% with a trimming time of 10 minutes. The proposed step-up converter achieves the lowest startup voltage without using a mechanical switch or a large transformer.

  • a 1 v input switched capacitor voltage converter with voltage reference free pulse density modulation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Xin Zhang, Takayasu Sakurai, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot-Carrier Injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μA-10 mA output current range.

  • a 80 mv input fast startup dual mode boost converter with charge pumped pulse generator for energy harvesting
    Asian Solid-State Circuits Conference, 2011
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Yoshikatsu Ryu, Takayasu Sakurai
    Abstract:

    A low startup-voltage and fast startup dual-mode boost converter for energy harvesting applications is developed in 65-nm CMOS. Comparing with the previous work [6], the startup-time, the minimum startup voltage, and the program time are greatly improved. (1) A startup by the boost converter instead of a charge pump reduced the startup-time to 4.8ms which is 1/56 of [6] and the shortest to date. (2) The proposed sub-1nW charge-pumped pulse generator (CPPG) enabled the lowest startup voltage of 80mV to date without mechanical switch. (3) The proposed threshold-voltage-tuned oscillator with Hot-Carrier Injection (HCI) for CPPG to compensate for the die-to-die process variations reduced the program time to 3min which is 1/20 of [6], thereby reducing the test cost.

  • a voltage reference free pulse density modulation vrf pdm 1 v input switched capacitor 1 2 voltage converter with output voltage trimming by Hot Carrier Injection and periodic activation scheme
    Symposium on VLSI Circuits, 2011
    Co-Authors: Xin Zhang, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V input, 0.45-V output switched-capacitor (SC) 2∶1 voltage converter is developed in 65-nm CMOS. A proposed voltage-reference-free pulse density modulation (VRF-PDM) increased the efficiency from 17% to 73% at 50-µA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot Carrier Injection to a comparator and a periodic activation scheme of the SC converter are also proposed to solve the problems attributed to VRF-PDM.

Takayasu Sakurai - One of the best experts on this subject based on the ideXlab platform.

  • an 80 mv startup dual mode boost converter by charge pumped pulse generator and threshold voltage tuned oscillator with Hot Carrier Injection
    IEEE Journal of Solid-state Circuits, 2012
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Takayasu Sakurai
    Abstract:

    This paper presents an 80 mV startup-voltage dual-mode boost converter for energy harvesting applications. The charge-pumped pulse generator enables a startup operation of the boost converter from the input voltage of 80 mV. The threshold voltage tuned oscillator for the clock generator of the boost converter compensates for the die-to-die process variation by a Hot Carrier Injection (HCI), thereby reducing the minimum operation voltage (VDDMIN) of the clock generator by 45% with a trimming time of 10 minutes. The proposed step-up converter achieves the lowest startup voltage without using a mechanical switch or a large transformer.

  • a 1 v input switched capacitor voltage converter with voltage reference free pulse density modulation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Xin Zhang, Takayasu Sakurai, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot-Carrier Injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μA-10 mA output current range.

  • a 80 mv input fast startup dual mode boost converter with charge pumped pulse generator for energy harvesting
    Asian Solid-State Circuits Conference, 2011
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Yoshikatsu Ryu, Takayasu Sakurai
    Abstract:

    A low startup-voltage and fast startup dual-mode boost converter for energy harvesting applications is developed in 65-nm CMOS. Comparing with the previous work [6], the startup-time, the minimum startup voltage, and the program time are greatly improved. (1) A startup by the boost converter instead of a charge pump reduced the startup-time to 4.8ms which is 1/56 of [6] and the shortest to date. (2) The proposed sub-1nW charge-pumped pulse generator (CPPG) enabled the lowest startup voltage of 80mV to date without mechanical switch. (3) The proposed threshold-voltage-tuned oscillator with Hot-Carrier Injection (HCI) for CPPG to compensate for the die-to-die process variations reduced the program time to 3min which is 1/20 of [6], thereby reducing the test cost.

Xin Zhang - One of the best experts on this subject based on the ideXlab platform.

  • an 80 mv startup dual mode boost converter by charge pumped pulse generator and threshold voltage tuned oscillator with Hot Carrier Injection
    IEEE Journal of Solid-state Circuits, 2012
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Takayasu Sakurai
    Abstract:

    This paper presents an 80 mV startup-voltage dual-mode boost converter for energy harvesting applications. The charge-pumped pulse generator enables a startup operation of the boost converter from the input voltage of 80 mV. The threshold voltage tuned oscillator for the clock generator of the boost converter compensates for the die-to-die process variation by a Hot Carrier Injection (HCI), thereby reducing the minimum operation voltage (VDDMIN) of the clock generator by 45% with a trimming time of 10 minutes. The proposed step-up converter achieves the lowest startup voltage without using a mechanical switch or a large transformer.

  • a 1 v input switched capacitor voltage converter with voltage reference free pulse density modulation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Xin Zhang, Takayasu Sakurai, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot-Carrier Injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μA-10 mA output current range.

  • a 80 mv input fast startup dual mode boost converter with charge pumped pulse generator for energy harvesting
    Asian Solid-State Circuits Conference, 2011
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Yoshikatsu Ryu, Takayasu Sakurai
    Abstract:

    A low startup-voltage and fast startup dual-mode boost converter for energy harvesting applications is developed in 65-nm CMOS. Comparing with the previous work [6], the startup-time, the minimum startup voltage, and the program time are greatly improved. (1) A startup by the boost converter instead of a charge pump reduced the startup-time to 4.8ms which is 1/56 of [6] and the shortest to date. (2) The proposed sub-1nW charge-pumped pulse generator (CPPG) enabled the lowest startup voltage of 80mV to date without mechanical switch. (3) The proposed threshold-voltage-tuned oscillator with Hot-Carrier Injection (HCI) for CPPG to compensate for the die-to-die process variations reduced the program time to 3min which is 1/20 of [6], thereby reducing the test cost.

  • a voltage reference free pulse density modulation vrf pdm 1 v input switched capacitor 1 2 voltage converter with output voltage trimming by Hot Carrier Injection and periodic activation scheme
    Symposium on VLSI Circuits, 2011
    Co-Authors: Xin Zhang, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V input, 0.45-V output switched-capacitor (SC) 2∶1 voltage converter is developed in 65-nm CMOS. A proposed voltage-reference-free pulse density modulation (VRF-PDM) increased the efficiency from 17% to 73% at 50-µA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot Carrier Injection to a comparator and a periodic activation scheme of the SC converter are also proposed to solve the problems attributed to VRF-PDM.

  • post silicon clock deskew employing Hot Carrier Injection trimming with on chip skew monitoring and auto stressing scheme for sub near threshold digital circuits
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2011
    Co-Authors: Xin Zhang, Katsuyuki Ikeuchi, A Muramatsu, A Kawasumi, M Takamiya, M Nomura, Hirofumi Shinohara, Takeshi Sakurai
    Abstract:

    Clock skew is a major cause of severe timing yield degradation for sub-/near-threshold digital circuits. We report for the first time on employing Hot-Carrier Injection (HCI) for post silicon clock-deskew trimming. An HCI trimmed clock buffer, which can be individually selected and stressed to adjust the clock edge, is proposed. In addition, it can be used in conjunction with on-chip skew monitoring circuits to achieve auto-stressing. Our approach is proven to be effective through a representative 1.1-mm × 0.8-mm clock tree in a 40-nm high-k complimentary metal-oxide-semiconductor process. On average, it reduces the clock skew by eight times at 0.4 V Vdd. No significant recovery is noticed two weeks after trimming.

Koichi Ishida - One of the best experts on this subject based on the ideXlab platform.

  • an 80 mv startup dual mode boost converter by charge pumped pulse generator and threshold voltage tuned oscillator with Hot Carrier Injection
    IEEE Journal of Solid-state Circuits, 2012
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Takayasu Sakurai
    Abstract:

    This paper presents an 80 mV startup-voltage dual-mode boost converter for energy harvesting applications. The charge-pumped pulse generator enables a startup operation of the boost converter from the input voltage of 80 mV. The threshold voltage tuned oscillator for the clock generator of the boost converter compensates for the die-to-die process variation by a Hot Carrier Injection (HCI), thereby reducing the minimum operation voltage (VDDMIN) of the clock generator by 45% with a trimming time of 10 minutes. The proposed step-up converter achieves the lowest startup voltage without using a mechanical switch or a large transformer.

  • a 1 v input switched capacitor voltage converter with voltage reference free pulse density modulation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Xin Zhang, Takayasu Sakurai, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot-Carrier Injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μA-10 mA output current range.

  • a 80 mv input fast startup dual mode boost converter with charge pumped pulse generator for energy harvesting
    Asian Solid-State Circuits Conference, 2011
    Co-Authors: Pohung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Makoto Takamiya, Yoshikatsu Ryu, Takayasu Sakurai
    Abstract:

    A low startup-voltage and fast startup dual-mode boost converter for energy harvesting applications is developed in 65-nm CMOS. Comparing with the previous work [6], the startup-time, the minimum startup voltage, and the program time are greatly improved. (1) A startup by the boost converter instead of a charge pump reduced the startup-time to 4.8ms which is 1/56 of [6] and the shortest to date. (2) The proposed sub-1nW charge-pumped pulse generator (CPPG) enabled the lowest startup voltage of 80mV to date without mechanical switch. (3) The proposed threshold-voltage-tuned oscillator with Hot-Carrier Injection (HCI) for CPPG to compensate for the die-to-die process variations reduced the program time to 3min which is 1/20 of [6], thereby reducing the test cost.

  • a voltage reference free pulse density modulation vrf pdm 1 v input switched capacitor 1 2 voltage converter with output voltage trimming by Hot Carrier Injection and periodic activation scheme
    Symposium on VLSI Circuits, 2011
    Co-Authors: Xin Zhang, Pohung Chen, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Kazunori Watanabe, Makoto Takamiya
    Abstract:

    A 1-V input, 0.45-V output switched-capacitor (SC) 2∶1 voltage converter is developed in 65-nm CMOS. A proposed voltage-reference-free pulse density modulation (VRF-PDM) increased the efficiency from 17% to 73% at 50-µA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the Hot Carrier Injection to a comparator and a periodic activation scheme of the SC converter are also proposed to solve the problems attributed to VRF-PDM.