The Experts below are selected from a list of 171777 Experts worldwide ranked by ideXlab platform
Yogesh Singh Chauhan - One of the best experts on this subject based on the ideXlab platform.
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asm gan Industry Standard model for gan rf and power devices part 1 dc cv and rf model
IEEE Transactions on Electron Devices, 2019Co-Authors: Sourabh Khandelwal, Yogesh Singh Chauhan, T A Fjeldly, Sudip Ghosh, Ahtisham Pampori, Dhawal Mahajan, Raghvendra Dangi, Sheikh Aamir AhsanAbstract:We present the latest developments in Advance SPICE Model for GaN (ASM GaN) HEMTs in this paper. The ASM GaN model has been recently selected as an Industry-Standard compact model for GaN radio frequency (RF) and power devices. The core surface-potential calculation and the modeling of real device effects in this model are presented. We discuss the details of the nonlinear access region model and enhancement in this model to include a physical dependence on barrier thickness. We also present the novel model feature of configurable field-plate modeling and discuss the extraction procedure for the same. New results with the ASM GaN model on high-frequency and enhancement-mode GaN power devices are also presented.
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analysis and modeling of zero threshold voltage native devices with Industry Standard bsim6 model
Japanese Journal of Applied Physics, 2017Co-Authors: Chetan Gupta, Harshit Agarwal, Yenkai Lin, Akira Ito, Yogesh Singh ChauhanAbstract:In this paper, we present the modeling of zero-threshold voltage (V TH) bulk MOSFET, also called native devices, using enhanced BSIM6 model. Devices under study show abnormally high leakage current in weak inversion, leading to degraded subthreshold slope. The reasons for such abnormal behavior are identified using technology computer-aided design (TCAD) simulations. Since the zero-V TH transistors have quite low doping, the depletion layer from drain may extend upto the source (at some non-zero value of V DS) which leads to punch-through phenomenon. This source–drain leakage current adds with the main channel current, causing the unexpected current characteristics in these devices. TCAD simulations show that, as we increase the channel length (L eff) and channel doping (N SUB), the source–drain leakage due to punch-through decreases. We propose a model to capture the source–drain leakage in these devices. The model incorporates gate, drain, body biases and channel length as well as channel doping dependency too. The proposed model is validated with the measured data of production level device over various conditions of biases and channel lengths.
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thermal resistance modeling in fdsoi transistors with Industry Standard model bsim img
Microelectronics Journal, 2016Co-Authors: Pragya Kushwaha, Sourabh Khandelwal, Harshit Agarwal, Bala K Krishna, J P Duarte, Yogesh Singh ChauhanAbstract:The channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. The proposed model is implemented in the independent multi-gate model (BSIM-IMG) for FDSOI transistors. Graphical abstractThe channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. We also validate the radio-frequency (RF) model with measured high frequency data. The proposed model is implemented in the independent multigate model (BSIM-IMG) for FDSOI transistors.Display Omitted HighlightsGeometrical scaling of thermal resistance in FDSOI transistor has been analyzed.A new behavioral model for thermal resistance scaling has been proposed.The model is validated against experimental and Technology Computer Aided Design (TCAD) data.The BSIM-IMG model is validated on the measured RF characteristics for wide bias and frequency ranges.
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rf modeling of fdsoi transistors using Industry Standard bsim img model
IEEE Transactions on Microwave Theory and Techniques, 2016Co-Authors: Pragya Kushwaha, Juan Pablo Duarte, Sourabh Khandelwal, Yogesh Singh ChauhanAbstract:In this paper, RF modeling and step-by-step parameter extraction methodology of the BSIM-IMG model are discussed with experimental data. BSIM-IMG is the latest Industry Standard surface potential based model for fully depleted silicon-on-insulator (FDSOI) transistors. The impact of gate, substrate, and thermal networks is demonstrated with S-parameter data, which enable the BSIM-IMG model to capture RF behavior of the FDSOI transistor. The model is validated over a wide range of biases and frequencies and excellent agreement with the experimental data is obtained.
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new Industry Standard finfet compact model for future technology nodes
Symposium on VLSI Technology, 2015Co-Authors: Sourabh Khandelwal, Juan Pablo Duarte, Aditya Sankar Medury, Yogesh Singh ChauhanAbstract:A new production ready compact model for future FinFETs is presented. This single unified model can model FinFETs with realistic fin shapes including rectangle, triangle, circle and any shape in between. New mobility models support Ge p-FinFETs and InGaAs n-FinFETs. A new quantum effects model enables accurate modeling of III–V FinFETs. Special attention is paid to shape agnostic short-channel effect model for aggressive Lg scaling and body bias model for FinFETs on bulk substrates. With its accuracy verified with experimental data and TCAD, this computationally efficient model is an ideal turn-key solution for simulation and design of future heterogeneous circuits.
Sourabh Khandelwal - One of the best experts on this subject based on the ideXlab platform.
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asm gan Industry Standard model for gan rf and power devices part 1 dc cv and rf model
IEEE Transactions on Electron Devices, 2019Co-Authors: Sourabh Khandelwal, Yogesh Singh Chauhan, T A Fjeldly, Sudip Ghosh, Ahtisham Pampori, Dhawal Mahajan, Raghvendra Dangi, Sheikh Aamir AhsanAbstract:We present the latest developments in Advance SPICE Model for GaN (ASM GaN) HEMTs in this paper. The ASM GaN model has been recently selected as an Industry-Standard compact model for GaN radio frequency (RF) and power devices. The core surface-potential calculation and the modeling of real device effects in this model are presented. We discuss the details of the nonlinear access region model and enhancement in this model to include a physical dependence on barrier thickness. We also present the novel model feature of configurable field-plate modeling and discuss the extraction procedure for the same. New results with the ASM GaN model on high-frequency and enhancement-mode GaN power devices are also presented.
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thermal resistance modeling in fdsoi transistors with Industry Standard model bsim img
Microelectronics Journal, 2016Co-Authors: Pragya Kushwaha, Sourabh Khandelwal, Harshit Agarwal, Bala K Krishna, J P Duarte, Yogesh Singh ChauhanAbstract:The channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. The proposed model is implemented in the independent multi-gate model (BSIM-IMG) for FDSOI transistors. Graphical abstractThe channel in Fully Depleted Silicon On Insulator (FDSOI) transistors is completely isolated from the substrate via buried oxide (BOX) and from the sides by shallow trench isolations, which results in high thermal resistance (Rth). Further, Rth increases with reduction in channel length (Lg). In this paper, we have proposed a compact model for the geometry and temperature dependence of Rth in FDSOI transistors. The model is validated against experimental and Technology Computer Aided Design (TCAD) data. We also validate the radio-frequency (RF) model with measured high frequency data. The proposed model is implemented in the independent multigate model (BSIM-IMG) for FDSOI transistors.Display Omitted HighlightsGeometrical scaling of thermal resistance in FDSOI transistor has been analyzed.A new behavioral model for thermal resistance scaling has been proposed.The model is validated against experimental and Technology Computer Aided Design (TCAD) data.The BSIM-IMG model is validated on the measured RF characteristics for wide bias and frequency ranges.
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rf modeling of fdsoi transistors using Industry Standard bsim img model
IEEE Transactions on Microwave Theory and Techniques, 2016Co-Authors: Pragya Kushwaha, Juan Pablo Duarte, Sourabh Khandelwal, Yogesh Singh ChauhanAbstract:In this paper, RF modeling and step-by-step parameter extraction methodology of the BSIM-IMG model are discussed with experimental data. BSIM-IMG is the latest Industry Standard surface potential based model for fully depleted silicon-on-insulator (FDSOI) transistors. The impact of gate, substrate, and thermal networks is demonstrated with S-parameter data, which enable the BSIM-IMG model to capture RF behavior of the FDSOI transistor. The model is validated over a wide range of biases and frequencies and excellent agreement with the experimental data is obtained.
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new Industry Standard finfet compact model for future technology nodes
Symposium on VLSI Technology, 2015Co-Authors: Sourabh Khandelwal, Juan Pablo Duarte, Aditya Sankar Medury, Yogesh Singh ChauhanAbstract:A new production ready compact model for future FinFETs is presented. This single unified model can model FinFETs with realistic fin shapes including rectangle, triangle, circle and any shape in between. New mobility models support Ge p-FinFETs and InGaAs n-FinFETs. A new quantum effects model enables accurate modeling of III–V FinFETs. Special attention is paid to shape agnostic short-channel effect model for aggressive Lg scaling and body bias model for FinFETs on bulk substrates. With its accuracy verified with experimental data and TCAD, this computationally efficient model is an ideal turn-key solution for simulation and design of future heterogeneous circuits.
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FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard
FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard, 2015Co-Authors: Yogesh Singh Chauhan, Navid Paydavosi, Juan Pablo Duarte, Sourabh Khandelwal, Sriramkumar Vanugopalan, Darsen D. Lu, Ali M. Niknejad, Chenming HuAbstract:This book is the first to explain FinFET modeling for IC simulation and the Industry Standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved Industry Standard. The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters. With this book you will learn: • Why you should use FinFET • The physics and operation of FinFET • Details of the FinFET Standard model (BSIM-CMG) • Parameter extraction in BSIM-CMG • FinFET circuit design and simulation • Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM Standard model, providing an experts' insight into the specifications of the Standard • The first book on the Industry-Standard FinFET model - BSIM-CMG.
Raghunath Nambiar - One of the best experts on this subject based on the ideXlab platform.
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Analysis of TPCx-IoT: The First Industry Standard Benchmark for IoT Gateway Systems
2018 IEEE 34th International Conference on Data Engineering (ICDE), 2018Co-Authors: Meikel Poess, Raghunath Nambiar, Karthik Kulkarni, Chinmayi Narasimhadevara, Tilmann Rabl, Hans-arno JacobsenAbstract:By 2020 it is estimated that 20 billion devices will be connected to the Internet. While the initial hype around this Internet of Things (IoT) stems from consumer use cases, the number of devices and data from enterprise use cases is significant in terms of market share. With companies being challenged to choose the right digital infrastructure from different providers, there is an pressing need to objectively measure the hardware, operating system, data storage, and data management systems that can ingest, persist, and process the massive amounts of data arriving from sensors (edge devices). The Transaction Processing Performance Council (TPC) recently released the first Industry Standard benchmark for measuring the performance of gateway systems, TPCx-IoT. In this paper, we provide a detailed description of TPCx-IoT, mention design decisions behind key elements of this benchmark, and experimentally analyze how TPCx-IoT measures the performance of IoT gateway systems.
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introducing tpcx hs the first Industry Standard for benchmarking big data systems
Technology Conference on Performance Evaluation and Benchmarking, 2014Co-Authors: Raghunath Nambiar, Meikel Poess, Akon Dey, Paul Cao, Tariq Magdonismail, Da Qi Ren, Andrew BondAbstract:The designation Big Data has become a mainstream buzz phrase across many industries as well as research circles. Today many companies are making performance claims that are not easily verifiable and comparable in the absence of a neutral Industry benchmark. Instead one of the test suites used to compare performance of Hadoop based Big Data systems is the TeraSort. While it nicely defines the data set and tasks to measure Big Data Hadoop systems it lacks a formal specification and enforcement rules that enable the comparison of results across systems. In this paper we introduce TPCx-HS, the Industry’s first Industry Standard benchmark, designed to stress both hardware and software that is based on Apache HDFS API compatible distributions. TPCx-HS extends the workload defined in TeraSort with formal rules for implementation, execution, metric, result verification, publication and pricing. It can be used to asses a broad range of system topologies and implementation methodologies of Big Data Hadoop systems in a technically rigorous and directly comparable and vendor-neutral manner.
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discussion of bigbench a proposed Industry Standard performance benchmark for big data
Technology Conference on Performance Evaluation and Benchmarking, 2014Co-Authors: Chaitan Baru, Hans-arno Jacobsen, Milind A Bhandarkar, Carlo Curino, Manuel Danisch, Michael Frank, Bhaskar Gowda, Huang Jie, Dileep Kumar, Raghunath NambiarAbstract:Enterprises perceive a huge opportunity in mining information that can be found in big data. New storage systems and processing paradigms are allowing for ever larger data sets to be collected and analyzed. The high demand for data analytics and rapid development in technologies has led to a sizable ecosystem of big data processing systems. However, the lack of established, Standardized benchmarks makes it difficult for users to choose the appropriate systems that suit their requirements. To address this problem, we have developed the BigBench benchmark specification. BigBench is the first end-to-end big data analytics benchmark suite. In this paper, we present the BigBench benchmark and analyze the workload from technical as well as business point of view. We characterize the queries in the workload along different dimensions, according to their functional characteristics, and also analyze their runtime behavior. Finally, we evaluate the suitability and relevance of the workload from the point of view of enterprise applications, and discuss potential extensions to the proposed specification in order to cover typical big data processing use cases.
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TPCTC - Shaping the landscape of Industry Standard benchmarks: contributions of the transaction processing performance council (TPC)
Topics in Performance Evaluation Measurement and Characterization, 2012Co-Authors: Raghunath Nambiar, Nicholas Wakou, Andrew Masland, Peter Thawley, Matthew Lanken, Forrest Carman, Michael MajdalanyAbstract:Established in 1988, the Transaction Processing Performance Council (TPC) has had a significant impact on the computing Industry's use of Industry-Standard benchmarks. These benchmarks are widely adapted by systems and software vendors to illustrate performance competitiveness for their existing products, and to improve and monitor the performance of their products under development. Many buyers use TPC benchmark results as points of comparison when purchasing new computing systems and evaluating new technologies. In this paper, the authors look at the contributions of the Transaction Processing Performance Council in shaping the landscape of Industry Standard benchmarks --- from defining the fundamentals like performance, price for performance, and energy efficiency, to creating Standards for independently auditing and reporting various aspects of the systems under test.
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shaping the landscape of Industry Standard benchmarks contributions of the transaction processing performance council tpc
TPC Technology Conference, 2011Co-Authors: Raghunath Nambiar, Nicholas Wakou, Andrew Masland, Peter Thawley, Matthew Lanken, Forrest Carman, Michael MajdalanyAbstract:Established in 1988, the Transaction Processing Performance Council (TPC) has had a significant impact on the computing Industry's use of Industry-Standard benchmarks. These benchmarks are widely adapted by systems and software vendors to illustrate performance competitiveness for their existing products, and to improve and monitor the performance of their products under development. Many buyers use TPC benchmark results as points of comparison when purchasing new computing systems and evaluating new technologies. In this paper, the authors look at the contributions of the Transaction Processing Performance Council in shaping the landscape of Industry Standard benchmarks --- from defining the fundamentals like performance, price for performance, and energy efficiency, to creating Standards for independently auditing and reporting various aspects of the systems under test.
Juan Pablo Duarte - One of the best experts on this subject based on the ideXlab platform.
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compact modeling source to drain tunneling in sub 10 nm gaa finfet with Industry Standard model
IEEE Transactions on Electron Devices, 2017Co-Authors: Yenkai Lin, Juan Pablo Duarte, Pragya Kushwaha, Harshit Agarwal, Huanlin Chang, Angada B Sachid, Sayeef SalahuddinAbstract:We present a compact model for source-to-drain tunneling current in sub-10-nm gate-all-around FinFET, where tunneling current becomes nonnegligible. Wentzel–Kramers–Brillouin method with a quadratic potential energy profile is used to analytically capture the dependence on biases in the tunneling probability expression and simplify the equation. The calculated tunneling probability increases with smaller effective mass and with increasing bias. We at first use the Gaussian quadrature method to integrate Landauer’s equation for tunneling current computation without further approximations. To boost simulation speed, some approximations are made. The simplified equation shows a good accuracy and has more flexibility for compact model purpose. The model is implemented into Industry Standard Berkeley Short-channel IGFET Model-common multi-gate model for future technology node, and is validated by the full-band atomistic quantum transport simulation data.
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rf modeling of fdsoi transistors using Industry Standard bsim img model
IEEE Transactions on Microwave Theory and Techniques, 2016Co-Authors: Pragya Kushwaha, Juan Pablo Duarte, Sourabh Khandelwal, Yogesh Singh ChauhanAbstract:In this paper, RF modeling and step-by-step parameter extraction methodology of the BSIM-IMG model are discussed with experimental data. BSIM-IMG is the latest Industry Standard surface potential based model for fully depleted silicon-on-insulator (FDSOI) transistors. The impact of gate, substrate, and thermal networks is demonstrated with S-parameter data, which enable the BSIM-IMG model to capture RF behavior of the FDSOI transistor. The model is validated over a wide range of biases and frequencies and excellent agreement with the experimental data is obtained.
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new Industry Standard finfet compact model for future technology nodes
Symposium on VLSI Technology, 2015Co-Authors: Sourabh Khandelwal, Juan Pablo Duarte, Aditya Sankar Medury, Yogesh Singh ChauhanAbstract:A new production ready compact model for future FinFETs is presented. This single unified model can model FinFETs with realistic fin shapes including rectangle, triangle, circle and any shape in between. New mobility models support Ge p-FinFETs and InGaAs n-FinFETs. A new quantum effects model enables accurate modeling of III–V FinFETs. Special attention is paid to shape agnostic short-channel effect model for aggressive Lg scaling and body bias model for FinFETs on bulk substrates. With its accuracy verified with experimental data and TCAD, this computationally efficient model is an ideal turn-key solution for simulation and design of future heterogeneous circuits.
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FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard
FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard, 2015Co-Authors: Yogesh Singh Chauhan, Navid Paydavosi, Juan Pablo Duarte, Sourabh Khandelwal, Sriramkumar Vanugopalan, Darsen D. Lu, Ali M. Niknejad, Chenming HuAbstract:This book is the first to explain FinFET modeling for IC simulation and the Industry Standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved Industry Standard. The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters. With this book you will learn: • Why you should use FinFET • The physics and operation of FinFET • Details of the FinFET Standard model (BSIM-CMG) • Parameter extraction in BSIM-CMG • FinFET circuit design and simulation • Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM Standard model, providing an experts' insight into the specifications of the Standard • The first book on the Industry-Standard FinFET model - BSIM-CMG.
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modeling 20 nm germanium finfet with the Industry Standard finfet model
IEEE Electron Device Letters, 2014Co-Authors: Sourabh Khandelwal, Juan Pablo Duarte, Yogesh Singh ChauhanAbstract:In this letter, we present modeling results for germanium p-type FinFETs using the Industry Standard Berkeley Spice Common Multi-gate Field Effect Transistor (BSIM-CMG) model. The effect of perpendicular electrical field on hole mobility in germanium FinFETs is found to be different from silicon FinFETs. We present an updated Ge mobility equation to account for this difference. With this single update, BSIM-CMG agrees very well with the measured I-V data of Ge FinFETs with a gate-length from 130 to 20 nm. We conclude that a production quality Standard model is available for simulation of circuits employing p-type Ge FinFET.
Meikel Poess - One of the best experts on this subject based on the ideXlab platform.
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Analysis of TPCx-IoT: The First Industry Standard Benchmark for IoT Gateway Systems
2018 IEEE 34th International Conference on Data Engineering (ICDE), 2018Co-Authors: Meikel Poess, Raghunath Nambiar, Karthik Kulkarni, Chinmayi Narasimhadevara, Tilmann Rabl, Hans-arno JacobsenAbstract:By 2020 it is estimated that 20 billion devices will be connected to the Internet. While the initial hype around this Internet of Things (IoT) stems from consumer use cases, the number of devices and data from enterprise use cases is significant in terms of market share. With companies being challenged to choose the right digital infrastructure from different providers, there is an pressing need to objectively measure the hardware, operating system, data storage, and data management systems that can ingest, persist, and process the massive amounts of data arriving from sensors (edge devices). The Transaction Processing Performance Council (TPC) recently released the first Industry Standard benchmark for measuring the performance of gateway systems, TPCx-IoT. In this paper, we provide a detailed description of TPCx-IoT, mention design decisions behind key elements of this benchmark, and experimentally analyze how TPCx-IoT measures the performance of IoT gateway systems.
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introducing tpcx hs the first Industry Standard for benchmarking big data systems
Technology Conference on Performance Evaluation and Benchmarking, 2014Co-Authors: Raghunath Nambiar, Meikel Poess, Akon Dey, Paul Cao, Tariq Magdonismail, Da Qi Ren, Andrew BondAbstract:The designation Big Data has become a mainstream buzz phrase across many industries as well as research circles. Today many companies are making performance claims that are not easily verifiable and comparable in the absence of a neutral Industry benchmark. Instead one of the test suites used to compare performance of Hadoop based Big Data systems is the TeraSort. While it nicely defines the data set and tasks to measure Big Data Hadoop systems it lacks a formal specification and enforcement rules that enable the comparison of results across systems. In this paper we introduce TPCx-HS, the Industry’s first Industry Standard benchmark, designed to stress both hardware and software that is based on Apache HDFS API compatible distributions. TPCx-HS extends the workload defined in TeraSort with formal rules for implementation, execution, metric, result verification, publication and pricing. It can be used to asses a broad range of system topologies and implementation methodologies of Big Data Hadoop systems in a technically rigorous and directly comparable and vendor-neutral manner.
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WBDB - TPC's Benchmark Development Model: Making the First Industry Standard Benchmark on Big Data a Success
Specifying Big Data Benchmarks, 2014Co-Authors: Meikel PoessAbstract:There are many questions to answer and hurdles to overcome before an idea for a benchmark becomes an Industry Standard. After all technical challenges are solved and a prototype benchmark is created, the question arises on how to turn the prototype into an Industry Standard benchmark that has broad acceptance in the Industry, is credible and sustainable over an extended period of time. The Transaction Processing Performance Council is one of the most recognized Industry Standard consortia for developing and maintaining Industry Standard benchmarks. Its philosophy and strict rules have assured acceptance, credibility and sustainability of its benchmarks for the last two decades. In this paper the author shows how the TPC model for developing and maintaining benchmarks can be applied to creating the first Industry Standard benchmark on Big Data.
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bigbench towards an Industry Standard benchmark for big data analytics
International Conference on Management of Data, 2013Co-Authors: Ahmad Ghazal, Meikel Poess, Tilmann Rabl, Minqing Hu, Francois Raab, Alain Crolotte, Hans-arno JacobsenAbstract:There is a tremendous interest in big data by academia, Industry and a large user base. Several commercial and open source providers unleashed a variety of products to support big data storage and processing. As these products mature, there is a need to evaluate and compare the performance of these systems. In this paper, we present BigBench, an end-to-end big data benchmark proposal. The underlying business model of BigBench is a product retailer. The proposal covers a data model and synthetic data generator that addresses the variety, velocity and volume aspects of big data systems containing structured, semi-structured and unstructured data. The structured part of the BigBench data model is adopted from the TPC-DS benchmark, which is enriched with semi-structured and unstructured data components. The semi-structured part captures registered and guest user clicks on the retailer's website. The unstructured data captures product reviews submitted online. The data generator designed for BigBench provides scalable volumes of raw data based on a scale factor. The BigBench workload is designed around a set of queries against the data model. From a business prospective, the queries cover the different categories of big data analytics proposed by McKinsey. From a technical prospective, the queries are designed to span three different dimensions based on data sources, query processing types and analytic techniques. We illustrate the feasibility of BigBench by implementing it on the Teradata Aster Database. The test includes generating and loading a 200 Gigabyte BigBench data set and testing the workload by executing the BigBench queries (written using Teradata Aster SQL-MR) and reporting their response times.
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A Review of System Benchmark Standards and a Look Ahead Towards an Industry Standard for Benchmarking Big Data Workloads
Big Data Management Technologies and Applications, 1Co-Authors: Raghunath Nambiar, Meikel PoessAbstract:Industry Standard benchmarks have played, and continue to play, a crucial role in the advancement of the computing Industry. Demands for them have existed since buyers were first confronted with the choice between purchasing one system over another. Over the years, Industry Standard benchmarks have proven critical to both buyers and vendors: buyers use benchmark results when evaluating new systems in terms of performance, price/performance, and energy efficiency; while vendors use benchmarks to demonstrate competitiveness of their products and to monitor release-to-release progress of their products under development. Historically, we have seen that Industry Standard benchmarks enable healthy competition that results in product improvements and the evolution of brand new technologies. Over the past quarter-century, Industry Standard bodies like the Transaction Processing Performance Council (TPC) and the Standard Performance Evaluation Corporation (SPEC) have developed several Industry Standards for performance benchmarking, which have been a significant driving force behind the development of faster, less expensive, and/or more energy efficient system configurations. The world has been in the midst of an extraordinary information explosion over the past decade, punctuated by rapid growth in the use of the Internet and the number of connected devices worldwide. Today, we’re seeing a rate of change faster than at any point throughout history, and both enterprise application data and machine generated data, known as Big Data, continue to grow exponentially, challenging Industry experts and researchers to develop new innovative techniques to evaluate and benchmark hardware and software technologies and products. This chapter looks into techniques to measure the effectiveness of hardware and software platforms dealing with big data.
