The Experts below are selected from a list of 8271 Experts worldwide ranked by ideXlab platform
Jianhui Zhang - One of the best experts on this subject based on the ideXlab platform.
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Implantation-Free 4H-SiC Bipolar Junction Transistors With Double Base Epilayers
IEEE Electron Device Letters, 2008Co-Authors: Jianhui Zhang, Xueqing Li, Petre Alexandrov, Terry Burke, Jian H. ZhaoAbstract:This letter reports the first 4H-SiC power bipolar Junction Transistor (BJT) with double base epilayers which is completely free of ion implantation and hence of implantation-induced crystal damages and high-temperature activation annealing-induced surface roughness. Based on this novel design and implantation-free process, a 4H-SiC BJT was fabricated to reach an open base collector-to-emitter blocking voltage of over 1300 V, with a common-emitter current gain up to 31. Improvements on reliability have also been observed, including less forward voltage drift (< 2%) and no significant degradation on current gain in the active region.
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demonstration of first 9 2 kv 4h sic bipolar Junction Transistor
Electronics Letters, 2004Co-Authors: Jianhui Zhang, J H Zhao, P Alexandrov, T BurkeAbstract:The first demonstration is reported of a high-voltage (9.2 kV) 4H-SiC bipolar Junction Transistor (BJT) based on a 50 µm, 7×1014 cm−3 doped drift layer, achieving an emitter current density of 150 A/cm2 at VCEO=5 V, suggesting a specific on-resistance (RSP_ON) of 33 mΩ cm2 without considering current spreading or 49 mΩ cm2 if current spreading is considered. The result far exceeds the previous 4H-SiC BJT record of 3.2 kV with RSP_ON=78 mΩ cm2.
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a high current gain 4h sic npn power bipolar Junction Transistor
IEEE Electron Device Letters, 2003Co-Authors: Jianhui Zhang, P Alexandrov, L Fursin, J H ZhaoAbstract:This work reports the development of high power 4H-SiC bipolar Junction Transistors (BJTs) by using reduced implantation dose for p+ base contact region and annealing in nitric oxide of base-to-emitter Junction passivation oxide for 2 hours at 1150/spl deg/C. The Transistor blocks larger than 480 V and conducts 2.1 A (J/sub c/=239 A/cm/sup 2/) at V/sub ce/=3.4 V, corresponding to a specific on-resistance (R/sub sp on/) of 14 m/spl Omega/cm/sup 2/, based on a drift layer design of 12 /spl mu/m doped to 6/spl times/10/sup 15/cm/sup -3/. Current gain /spl beta//spl ges/35 has been achieved for collector current densities ranging from J/sub c/=40 A/cm/sup 2/ to 239 A/cm/sup 2/ (I/sub c/=2.1 A) with a peak current gain of 38 at J/sub c/=114 A/cm/sup 2/.
Kanika Nadda - One of the best experts on this subject based on the ideXlab platform.
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bipolar charge plasma Transistor a novel three terminal device
IEEE Transactions on Electron Devices, 2012Co-Authors: Mamidala Jagadesh Kumar, Kanika NaddaAbstract:A distinctive approach for forming a lateral bipolar charge-plasma Transistor (BCPT) is explored using 2-D simulations. Different metal work-function electrodes are used to induce n- and p-type charge-plasma layers on undoped silicon-on-insulator (SOI) to form the emitter, base, and collector regions of a lateral n-p-n Transistor. Electrical characteristics of the proposed device are simulated and compared with that of a conventionally doped lateral bipolar Junction Transistor (BJT) with identical dimensions. Our simulation results demonstrate that the BCPT concept will help us realize a superior bipolar Transistor in terms of a high current gain, as compared with a conventional BJT. This BCPT concept is suitable in overcoming doping issues such as dopant activation and high-thermal budgets, which are serious issues in ultrathin SOI structures.
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bipolar charge plasma Transistor a novel three terminal device
IEEE Transactions on Electron Devices, 2012Co-Authors: Mirgender Kumar, Kanika NaddaAbstract:A distinctive approach for forming a lateral bipolar charge-plasma Transistor (BCPT) is explored using 2-D simulations. Different metal work-function electrodes are used to induce n- and p-type charge-plasma layers on undoped silicon-on-insulator (SOI) to form the emitter, base, and collector regions of a lateral n-p-n Transistor. Electrical characteristics of the proposed device are simulated and compared with that of a conventionally doped lateral bipolar Junction Transistor (BJT) with identical dimensions. Our simulation results demonstrate that the BCPT concept will help us realize a superior bipolar Transistor in terms of a high current gain, as compared with a conventional BJT. This BCPT concept is suitable in overcoming doping issues such as dopant activation and high-thermal budgets, which are serious issues in ultrathin SOI structures.
Anant K Agarwal - One of the best experts on this subject based on the ideXlab platform.
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theoretical and experimental analyses of safe operating area soa of 1200 v 4h sic bjt
IEEE Transactions on Electron Devices, 2008Co-Authors: Yan Gao, Alex Q. Huang, Anant K Agarwal, Qingchun ZhangAbstract:The safe operating area (SOA) of 1200-V SiC bipolar Junction Transistor (BJT) is investigated by experiments and simulations. The SiC BJT is free of the second breakdown even under the turn-off power density of 3.7 MW/cm2. The theoretical boundary of reverse-biased SOA caused by the false turn-on is obtained by simulations. The short-circuit capability of the 1200-V SiC BJT is also investigated theoretically and experimentally. Self-heating is considered by the nonisothermal simulation, and 1800-K maximum local temperature is the simulated critical temperature of device failure. The surface condition is very critical for short-circuit capability. From simulations, when the interface trap density increases, the critical temperature decreases. This is believed to be the reason why the experimental results show much shorter short-circuit withstand time than the simulation showed.
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comparison of static and switching characteristics of 1200 v 4h sic bjt and 1200 v si igbt
IEEE Industry Applications Society Annual Meeting, 2006Co-Authors: Yan Gao, Alex Q. Huang, Sumi Krishnaswami, Jim Richmond, Anant K AgarwalAbstract:In this paper, static and switching characteristics of a 1200 V 4H-silicon carbide (SiC) bipolar Junction Transistor (BJT) at a bus voltage of 600 V are reported for the first time. Comparison was made between the SiC BJT and a 1200 V Si insulated gate bipolar Transistor (IGBT). The experimental data show that the SiC BJT has much smaller conduction and switching losses than the Si IGBT. The SiC BJT also shows an extremely large reverse bias safe operation area, and no second breakdown was observed. This removes one of the most unattractive aspects of the BJT. The results prove that, unlike Si BJTs, BJTs in 4H-SiC are good competitors for Si IGBTs.
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1000 V, 30 A SiC Bipolar Junction Transistors and Integrated Darlington Pairs
Materials Science Forum, 2005Co-Authors: Sumi Krishnaswami, Anant K Agarwal, Craig Capell, Jim Richmond, Sei Hyung Ryu, John W. Palmour, S. Balachandran, T. Paul Chow, Stephen Baynes, Bruce GeilAbstract:1000 V Bipolar Junction Transistor and integrated Darlington pairs with high current gain have been developed in 4H-SiC. The 3.38 mm x 3.38 mm BJT devices with an active area of 3 mm x 3 mm showed a forward on-current of 30 A, which corresponds to a current density of 333 A/cm2, at a forward voltage drop of 2 V. A common-emitter current gain of 40 was measured on these devices. A specific on-resistance of 6.0 mW-cm2 was observed at room temperature. The onresistance increases at higher temperatures, while the current gain decreases to 30 at 275°C. In addition, an integrated Darlington pair with an active area of 3 mm x 3 mm showed a collector current of 30 A at a forward drop of 4 V at room temperature. A current gain of 2400 was measured on these devices. A BVCEO of 1000 V was measured on both of these devices.
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sic power switching devices the second electronics revolution
Proceedings of the IEEE, 2002Co-Authors: J A Cooper, Anant K AgarwalAbstract:Silicon carbide (SiC) offers significant advantages for power-switching devices because the critical field for avalanche breakdown is about ten times higher than in silicon. SiC power devices have made remarkable progress in the past five years, demonstrating currents in excess of 100 A and blocking voltages in excess of 19000 V. In this paper we describe the latest progress in three classes of SiC devices: diodes (p-i-n and Schottky), Transistors (Junction field-effect Transistor, metal-oxide-semiconductor field-effect Transistor, and bipolar Junction Transistor), and thyristors (gate turn-off).
Mikael Ostling - One of the best experts on this subject based on the ideXlab platform.
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optimal emitter cell geometry in high power 4h sic bjts
IEEE Electron Device Letters, 2015Co-Authors: Arash Salemi, Carl-mikael Zetterling, Hossein Elahipanah, Mikael OstlingAbstract:Three 4H-SiC bipolar Junction Transistor designs with different emitter cell geometries (linear interdigitated fingers, square cell geometry, and hexagon cell geometry) are fabricated, analyzed, and compared with respect to current gain, ON-resistance $(\text{R}_{{\mathrm {ON}}})$ , current density $(J_{\mathrm {{C}}})$ , and temperature performance for the first time. Emitter size effect and surface recombination are investigated. Due to a better utilization of the base area, optimal emitter cell geometry significantly increases the current density about 42% and reduces the ON-resistance about 21% at a given current gain, thus making the device more efficient for high-power and high-temperature applications.
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surface passivation effects on the performance of 4h sic bjts
IEEE Transactions on Electron Devices, 2011Co-Authors: Reza Ghandi, Benedetto Buono, Martin Domeij, Romain Esteve, Sima Dimitrijev, Sergey A Reshanov, Carl-mikael Zetterling, Adolf Schöner, Mikael OstlingAbstract:In this brief, the electrical performance in terms of maximum current gain and breakdown voltage is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface-passivation layers. Variation in bipolar Junction Transistor (BJT) performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for plasma-deposited SiO2 which was annealed in N2O ambient at 1100°C for 3 h. Variations in breakdown voltage for different surface passivations were also found, and this was attributed to differences in fixed oxide charge that can affect the optimum dose of the high-voltage Junction-termination extension (JTE). The dependence of breakdown voltage on the dose was also evaluated through nonimplanted BJTs with etched JTE.
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simulations of open emitter breakdown voltage in sic bjts with non implanted jte
Materials Science Forum, 2009Co-Authors: Benedetto Buono, Martin Domeij, Carl-mikael Zetterling, Hyungseok Lee, Mikael OstlingAbstract:Ion implantation for selective doping of SiC is problematic due to damage generation during the process and low activation of dopants. In SiC bipolar Junction Transistor (BJT) the Junction termination extension (JTE) can be formed without ion implantation using instead a controlled etching into the epitaxial base. This etched JTE is advantageous because it eliminates ion implantation induced damage and the need for high temperature annealing. However, the dose, which is controlled by the etched base thickness and doping concentration, plays a crucial role. In order to find the optimum parameters, device simulations of different etched base thicknesses have been performed using the software Sentaurus Device. A surface passivation layer consisting of silicon dioxide, considering interface traps and fixed trapped charge, has been included in the analysis by simulations. Moreover a comparison with measured data for fabricated SiC BJTs has been performed.
Satoshi Yamasaki - One of the best experts on this subject based on the ideXlab platform.
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fabrication of bipolar Junction Transistor on 001 oriented diamond by utilizing phosphorus doped n type diamond base
Diamond and Related Materials, 2013Co-Authors: Hiromitsu Kato, Toshiharu Makino, Masahiko Ogura, Daisuke Takeuchi, Satoshi YamasakiAbstract:Abstract Bipolar Junction Transistors (BJTs) with vertical p–n–p structure were fabricated on (001)-oriented diamond by utilizing phosphorus-doped diamond for the base n-type layer, and the electrical properties were examined, including the diffusion length of injected holes. The basic Transistor action with stable current response from 100 nA to 50 μA was clearly observed at room temperature in both common-base and common-emitter configurations. Heavily phosphorus-doped diamond was introduced by the selective doping method under the base electrodes in order to reduce the series resistance, which is essential for realizing BJTs on (001).
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diamond bipolar Junction Transistor device with phosphorus doped diamond base layer
Diamond and Related Materials, 2012Co-Authors: Hiromitsu Kato, Kazuhiro Oyama, Toshiharu Makino, Masahiko Ogura, Daisuke Takeuchi, Satoshi YamasakiAbstract:Abstract Current amplification at room temperature has been achieved in diamond bipolar Junction Transistors fabricated on (111)-oriented substrate. Improved current amplification properties were achieved by utilizing optimized phosphorus-doped diamond for reducing the series resistance of the n -type base layer. Further enhancement of characteristics including operation current, blocking voltage and reproducibility is required; however, the developed diamond bipolar Transistor that works at room temperature is considered to be the first step toward realizing a high-performance power device utilizing the excellent physical properties of diamond.
