The Experts below are selected from a list of 318 Experts worldwide ranked by ideXlab platform
Koichi Seki - One of the best experts on this subject based on the ideXlab platform.
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Low-Voltage ULSI design
IEEE Journal of Solid-State Circuits, 1993Co-Authors: Katsuhiro Shimohigashi, Koichi SekiAbstract:An overall view on Low-Voltage device and circuit design is presented, beginning with a discussion of the Low-Voltage limit. Low-Voltage device design is then described. Low-Voltage CMOS and BiCMOS logic circuits are discussed. Circuit techniques for the Low-Voltage DRAMs and SRAMs are presented. The Low-Voltage analog devices and circuits are considered. The future direction of the Low-Voltage and Low-power ULSIs is discussed by comparing the switching energy of electronic devices and brain cells. >
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Low Voltage ULSI design: the Lower, the better?
1992 Symposium on VLSI Circuits Digest of Technical Papers, 1992Co-Authors: Katsuhiro Shimohigashi, Koichi SekiAbstract:An overview of Low-Voltage ULSI circuit design is presented, beginning with a discussion of the Low Voltage limit. Logic circuits employing CMOS technology and SRAM and DRAM memory circ.uits are described. Low-Voltage analog circuit technology using smart power technology is presented. The switching energies of various electron devices are compared with that of the brain cell in order to gain insight on the minimum energy function. >
Katsuhiro Shimohigashi - One of the best experts on this subject based on the ideXlab platform.
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Low-Voltage ULSI design
IEEE Journal of Solid-State Circuits, 1993Co-Authors: Katsuhiro Shimohigashi, Koichi SekiAbstract:An overall view on Low-Voltage device and circuit design is presented, beginning with a discussion of the Low-Voltage limit. Low-Voltage device design is then described. Low-Voltage CMOS and BiCMOS logic circuits are discussed. Circuit techniques for the Low-Voltage DRAMs and SRAMs are presented. The Low-Voltage analog devices and circuits are considered. The future direction of the Low-Voltage and Low-power ULSIs is discussed by comparing the switching energy of electronic devices and brain cells. >
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Low Voltage ULSI design: the Lower, the better?
1992 Symposium on VLSI Circuits Digest of Technical Papers, 1992Co-Authors: Katsuhiro Shimohigashi, Koichi SekiAbstract:An overview of Low-Voltage ULSI circuit design is presented, beginning with a discussion of the Low Voltage limit. Logic circuits employing CMOS technology and SRAM and DRAM memory circ.uits are described. Low-Voltage analog circuit technology using smart power technology is presented. The switching energies of various electron devices are compared with that of the brain cell in order to gain insight on the minimum energy function. >
Sudhanshu Shekhar Jamuar - One of the best experts on this subject based on the ideXlab platform.
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Advanced current mirrors for Low Voltage analog designs
2004 IEEE International Conference on Semiconductor Electronics, 2004Co-Authors: S. S. Rajput, Sudhanshu Shekhar JamuarAbstract:Current mirrors are core structure for almost all analog and mixed mode circuits and the performance of analog structures largely depends on their characteristics. Hence, for Low Voltage analog circuit structures, Low Voltage current mirrors are mandatory. In this tutorial article, we present some of the Low Voltage current mirrors along with their merits and demerits, so that the selection of a suitable current mirror for a particular application will be easier.
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Low Voltage analog circuit design techniques
IEEE Circuits and Systems Magazine, 2002Co-Authors: S. S. Rajput, Sudhanshu Shekhar JamuarAbstract:Analog signal processing is fast and can address real world problems. The applications of battery powered analog and mixed mode electronic devices require designing analog circuits to operate at Low Voltage levels. In this paper, some of the issues facing analog designers in implementing Low Voltage circuits are discussed, and possible Low Voltage design techniques are examined. The authors describe briefly almost all Low Voltage design techniques suitable for analog circuit structures along with their merits and demerits
Gregory S. Nusinovich - One of the best experts on this subject based on the ideXlab platform.
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Optimization of Low-Voltage gyrotrons parameters
2013Co-Authors: M. Yu. Glyavin, N. A. Zavolskiy, Anton S. Sedov, V. E. Zapevalov, Gregory S. NusinovichAbstract:Some issues important for operation of gyrotrons driven by Low-Voltage electron beams are analyzed. An emphasis is made on the efficiency of Low-Voltage gyrotron operation at the fundamental and higher cyclotron harmonics. These efficiencies calculated with the account for ohmic losses were, first, determined in the framework of the generalized gyrotron theory based on the cold-cavity approximation. Then, more accurate, self-consistent calculations for the fundamental and second harmonic Low-Voltage sub-THz gyrotron designs were carried out. Results of these calculations are presented and discussed. It is shown that operation of the fundamental and second harmonic gyrotrons with noticeable efficiencies is possible even at Voltages as Low as 5-10 kV.
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Low-Voltage gyrotrons
Physics of Plasmas, 2013Co-Authors: M. Yu. Glyavin, N. A. Zavolskiy, Anton S. Sedov, Gregory S. NusinovichAbstract:For a long time, the gyrotrons were primarily developed for electron cyclotron heating and current drive of plasmas in controlled fusion reactors where a multi-megawatt, quasi-continuous millimeter-wave power is required. In addition to this important application, there are other applications (and their number increases with time) which do not require a very high power level, but such issues as the ability to operate at Low Voltages and have compact devices are very important. For example, gyrotrons are of interest for a dynamic nuclear polarization, which improves the sensitivity of the nuclear magnetic resonance spectroscopy. In this paper, some issues important for operation of gyrotrons driven by Low-Voltage electron beams are analyzed. An emphasis is made on the efficiency of Low-Voltage gyrotron operation at the fundamental and higher cyclotron harmonics. These efficiencies calculated with the account for ohmic losses were, first, determined in the framework of the generalized gyrotron theory based on the cold-cavity approximation. Then, more accurate, self-consistent calculations for the fundamental and second harmonic Low-Voltage sub-THz gyrotron designs were carried out. Results of these calculations are presented and discussed. It is shown that operation of the fundamental and second harmonic gyrotrons with noticeable efficiencies is possible even at Voltages as Low as 5–10 kV. Even the third harmonic gyrotrons can operate at Voltages about 15 kV, albeit with rather Low efficiency (1%–2% in the submillimeter wavelength region).
Takayuki Kawahara - One of the best experts on this subject based on the ideXlab platform.
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Low-Voltage Embedded RAMs in Nanometer Era
IEICE Transactions on Electronics, 2007Co-Authors: Takayuki KawaharaAbstract:Low-Voltage nanometer-scale embedded RAM cells are described. First, Low-Voltage RAM cells are compared in terms of cell size, threshold Voltage for MOS transistor, and signal charge. Second, the solution for 6T and 4T SRAM cells to widen the Voltage margin are investigated, especially the advantages with a back-gate controlled thin buried-oxide fully-depleted (FD) SOI are presented. Then, DRAM approach with a novel twin-cell is discussed in terms of improving the retention time and Low-Voltage operation. These Low-Voltage cell technologies are the promising candidates for future embedded RAMs.
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Low-Voltage embedded RAMs in the nanometer era
2005 IEEE Conference on Electron Devices and Solid-State Circuits, 1Co-Authors: Takayuki KawaharaAbstract:Low-Voltage nanometer-scale embedded RAM cells are described. First, Low-Voltage RAM cells are compared in terms of cell size, threshold Voltage for MOS transistor, and signal charge. Second, the solution for 6T and 4T SRAM cells to widen the Voltage margin are investigated, especially the advantages with a back-gate controlled thin buried-oxide fully-depleted SOI are presented. Then, DRAM approach with a novel twin- cell is discussed in terms of improving the retention time and Low-Voltage operation. These Low-Voltage cell technologies are the promising candidates for future embedded RAMs.
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Trends in Low-Voltage embedded RAMs
The 2nd Annual IEEE Northeast Workshop on Circuits and Systems 2004. NEWCAS 2004., 1Co-Authors: Kiyoo Itoh, Kenichi Osada, Takayuki KawaharaAbstract:Low-Voltage high-density embedded (e-) RAMs, focusing on RAM cells and peripheral circuits, are described. First, challenges and trends in Low-Voltage e-RAMs are described based on the S/N issue of RAM cells, and leakage and speed-variation issues of peripheral circuits. Next, state-of-the-art Low-Voltage e-DRAMs and e-SRAMs are investigated, focusing on leakage reduction. Finally, future prospects for e-RAMs are discussed in terms of Low-Voltage designs.
