The Experts below are selected from a list of 288 Experts worldwide ranked by ideXlab platform
Kang L. Wang - One of the best experts on this subject based on the ideXlab platform.
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non volatile magnonic Logic Circuits engineering
Journal of Applied Physics, 2011Co-Authors: Alexander Khitun, Kang L. WangAbstract:We propose a concept of magnetic Logic Circuits engineering, which takes an advantage of magnetization as a computational state variable and exploits spin waves for information transmission. The Circuits consist of magneto-electric cells connected via spin wave buses. We present the result of numerical modeling showing the magneto-electric cell switching as a function of the amplitude as well as the phase of the spin wave. The phase-dependent switching makes it possible to engineer Logic gates by exploiting spin wave buses as passive Logic elements providing a certain phase-shift to the propagating spin waves. We present a library of Logic gates consisting of magneto-electric cells and spin wave buses providing 0 or π phase shifts. The utilization of phases in addition to amplitudes is a powerful tool which let us construct Logic Circuits with a fewer number of elements than required for CMOS technology. As an example, we present the design of the magnonic Full Adder circuit comprising only 5 magneto-elec...
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Non-volatile magnonic Logic Circuits engineering
Journal of Applied Physics, 2011Co-Authors: Alexander Khitun, Kang L. WangAbstract:We propose a concept of magnetic Logic Circuits engineering, which takes an advantage of magnetization as a computational state variable and exploits spin waves for information transmission. The Circuits consist of magneto-electric cells connected via spin wave buses. We present the result of numerical modeling showing the magneto-electric cell switching as a function of the amplitude as well as the phase of the spin wave. The phase-dependent switching makes it possible to engineer Logic gates by exploiting spin wave buses as passive Logic elements providing a certain phase-shift to the propagating spin waves. We present a library of Logic gates consisting of magneto-electric cells and spin wave buses providing 0 or p phase shifts. The utilization of phases in addition to amplitudes is a powerful tool which let us construct Logic Circuits with a fewer number of elements than required for CMOS technology. As an example, we present the design of the magnonic Full Adder Circuit comprising only 5 magneto-electric cells. The proposed concept may provide a route to more functional wave-based Logic circuitry with capabilities far beyond the limits of the traditional transistor-based approach.
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magnonic Logic Circuits
Journal of Physics D, 2010Co-Authors: Alexander Khitun, Kang L. WangAbstract:We describe and analyse possible approaches to magnonic Logic Circuits and basic elements required for circuit construction. A distinctive feature of the magnonic circuitry is that information is transmitted by spin waves propagating in the magnetic waveguides without the use of electric current. The latter makes it possible to exploit spin wave phenomena for more efficient data transfer and enhanced Logic functionality. We describe possible schemes for general computing and special task data processing. The functional throughput of the magnonic Logic gates is estimated and compared with the conventional transistor-based approach. Magnonic Logic Circuits allow scaling down to the deep submicrometre range and THz frequency operation. The scaling is in favour of the magnonic Circuits offering a significant functional advantage over the traditional approach. The disadvantages and problems of the spin wave devices are also discussed.
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Feasibility study of Logic Circuits with a spin?wave bus
Nanotechnology, 2007Co-Authors: Alexander Khitun, Dmitri E. Nikonov, Kosmas Galatsis, Kang L. WangAbstract:We present a feasibility study of Logic Circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, Logic Circuits with a spin wave bus do not use charge as an information carrier. In this work we describe the general concept of Logic Circuits with a spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. The spin wave bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of a spin wave bus is, however, an interface between electronic Circuits and integrated spintronics Circuits. The Logic Circuits with a spin wave bus allow us to provide wireless read-in and read-out.
Alexander Khitun - One of the best experts on this subject based on the ideXlab platform.
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non volatile magnonic Logic Circuits engineering
Journal of Applied Physics, 2011Co-Authors: Alexander Khitun, Kang L. WangAbstract:We propose a concept of magnetic Logic Circuits engineering, which takes an advantage of magnetization as a computational state variable and exploits spin waves for information transmission. The Circuits consist of magneto-electric cells connected via spin wave buses. We present the result of numerical modeling showing the magneto-electric cell switching as a function of the amplitude as well as the phase of the spin wave. The phase-dependent switching makes it possible to engineer Logic gates by exploiting spin wave buses as passive Logic elements providing a certain phase-shift to the propagating spin waves. We present a library of Logic gates consisting of magneto-electric cells and spin wave buses providing 0 or π phase shifts. The utilization of phases in addition to amplitudes is a powerful tool which let us construct Logic Circuits with a fewer number of elements than required for CMOS technology. As an example, we present the design of the magnonic Full Adder circuit comprising only 5 magneto-elec...
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Non-volatile magnonic Logic Circuits engineering
Journal of Applied Physics, 2011Co-Authors: Alexander Khitun, Kang L. WangAbstract:We propose a concept of magnetic Logic Circuits engineering, which takes an advantage of magnetization as a computational state variable and exploits spin waves for information transmission. The Circuits consist of magneto-electric cells connected via spin wave buses. We present the result of numerical modeling showing the magneto-electric cell switching as a function of the amplitude as well as the phase of the spin wave. The phase-dependent switching makes it possible to engineer Logic gates by exploiting spin wave buses as passive Logic elements providing a certain phase-shift to the propagating spin waves. We present a library of Logic gates consisting of magneto-electric cells and spin wave buses providing 0 or p phase shifts. The utilization of phases in addition to amplitudes is a powerful tool which let us construct Logic Circuits with a fewer number of elements than required for CMOS technology. As an example, we present the design of the magnonic Full Adder Circuit comprising only 5 magneto-electric cells. The proposed concept may provide a route to more functional wave-based Logic circuitry with capabilities far beyond the limits of the traditional transistor-based approach.
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magnonic Logic Circuits
Journal of Physics D, 2010Co-Authors: Alexander Khitun, Kang L. WangAbstract:We describe and analyse possible approaches to magnonic Logic Circuits and basic elements required for circuit construction. A distinctive feature of the magnonic circuitry is that information is transmitted by spin waves propagating in the magnetic waveguides without the use of electric current. The latter makes it possible to exploit spin wave phenomena for more efficient data transfer and enhanced Logic functionality. We describe possible schemes for general computing and special task data processing. The functional throughput of the magnonic Logic gates is estimated and compared with the conventional transistor-based approach. Magnonic Logic Circuits allow scaling down to the deep submicrometre range and THz frequency operation. The scaling is in favour of the magnonic Circuits offering a significant functional advantage over the traditional approach. The disadvantages and problems of the spin wave devices are also discussed.
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Feasibility study of Logic Circuits with a spin?wave bus
Nanotechnology, 2007Co-Authors: Alexander Khitun, Dmitri E. Nikonov, Kosmas Galatsis, Kang L. WangAbstract:We present a feasibility study of Logic Circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, Logic Circuits with a spin wave bus do not use charge as an information carrier. In this work we describe the general concept of Logic Circuits with a spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. The spin wave bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of a spin wave bus is, however, an interface between electronic Circuits and integrated spintronics Circuits. The Logic Circuits with a spin wave bus allow us to provide wireless read-in and read-out.
Zhong Lin Wang - One of the best experts on this subject based on the ideXlab platform.
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tribotronic triggers and sequential Logic Circuits
Nano Research, 2017Co-Authors: Limin Zhang, Zhi Wei Yang, Yao Kun Pang, Tao Zhou, Zhong Lin Wang, Chi ZhangAbstract:In this paper, a floating-gate tribotronic transistor (FGTT) based on a mobile triboelectric layer and a traditional silicon-based field-effect transistor (FET) is proposed. In the FGTT, the triboelectric charges in the layer created by contact electrification can be used to modulate charge carrier transport in the transistor. Based on the FGTTs and FETs, a tribotronic negated AND (NAND) gate that achieves mechanical-electrical coupled inputs, Logic operations, and electrical level outputs is fabricated. By further integrating tribotronic NAND gates with traditional digital Circuits, several basic units such as the tribotronic S-R trigger, D trigger, and T trigger have been demonstrated. Additionally, tribotronic sequential Logic Circuits such as registers and counters have also been integrated to enable external contact triggered storage and computation. In contrast to the conventional sequential Logic units controlled by electrical signals, contact-triggered tribotronic sequential Logic Circuits are able to realize direct interaction and integration with the external environment. This development can lead to their potential application in micro/nano-sensors, electromechanical storage, interactive control, and intelligent instrumentation.
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tribotronic Logic Circuits and basic operations
Advanced Materials, 2015Co-Authors: Chi Zhang, Zhong Lin Wang, Limin Zhang, Wei TangAbstract:: A tribotronic Logic device is fabricated to convert external mechanical stimuli into Logic level signals, and tribotronic Logic Circuits such as NOT, AND, OR, NAND, NOR, XOR, and XNOR gates are demonstrated for performing mechanical-electrical coupled tribotronic Logic operations, which realize the direct interaction between the external environment and the current silicon integrated Circuits.
Keshab K. Parhi - One of the best experts on this subject based on the ideXlab platform.
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Analysis of stochastic Logic Circuits in unipolar, bipolar and hybrid formats
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017Co-Authors: Keshab K. ParhiAbstract:Implementations of polynomials and functions using stochastic Logic have been of interest due to their low-area and high fault-tolerance properties. In stochastic Logic, numbers are represented using unary bit streams where each bit is of same weight. If a number is represented in the range [0,1], the representation is referred to as unipolar. The representation is referred as bipolar if the number lies in the range [-1, 1]. Typically, inputs and outputs are in same format. However, sometimes the input and output may be in different formats; these are referred as Circuits using hybrid formats. While analysis of unipolar stochastic Logic Circuits and bipolar Logic Circuits containing ex-or, ex-nor and multiplexors are well understood, the analysis of general bipolar stochastic Logic Circuits and hybrid Logic Circuits are not well understood. This paper presents general approaches to compute outputs of bipolar and hybrid stochastic Logic Circuits. It is shown that the analysis approach presented in this paper can form a basis for synthesis of stochastic Logic Circuits in bipolar and hybrid formats.
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ISCAS - Analysis of stochastic Logic Circuits in unipolar, bipolar and hybrid formats
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017Co-Authors: Keshab K. ParhiAbstract:Implementations of polynomials and functions using stochastic Logic have been of interest due to their low-area and high fault-tolerance properties. In stochastic Logic, numbers are represented using unary bit streams where each bit is of same weight. If a number is represented in the range [0,1], the representation is referred to as unipolar. The representation is referred as bipolar if the number lies in the range [−1, 1]. Typically, inputs and outputs are in same format. However, sometimes the input and output may be in different formats; these are referred as Circuits using hybrid formats. While analysis of unipolar stochastic Logic Circuits and bipolar Logic Circuits containing ex-or, ex-nor and multiplexors are well understood, the analysis of general bipolar stochastic Logic Circuits and hybrid Logic Circuits are not well understood. This paper presents general approaches to compute outputs of bipolar and hybrid stochastic Logic Circuits. It is shown that the analysis approach presented in this paper can form a basis for synthesis of stochastic Logic Circuits in bipolar and hybrid formats.
Desheng Zheng - One of the best experts on this subject based on the ideXlab platform.
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Synthesis of ternary non-reversible Logic Circuits
IEEE Congress on Evolutionary Computation, 2010Co-Authors: Xiaoyu Li, Guowu Yang, Desheng ZhengAbstract:Reversible quantum Circuits are a necessary subclass of quantum computation and its realization is required for any quantum computer to be universal. This paper investigates how to synthesis of arbitrary ternary non-reversible Logic Circuits by adding inputs with constant value and garbage outputs. Group theory has been also used to solve the synthesis of reversible Logic Circuits. Our algorithm uses the SNT (ternary Swap gate, ternary NOT gate, ternary Toffoli gate) library, by reducing the ternary non-reversible Logic circuit synthesis problem to group theory representation. The main result shows the relationship of ternary non-reversible Logic Circuits and the reversible Circuits. The realization approach is constructive and can be further used to develop software for synthesis of arbitrary d-level Circuits. This result is significantly different from the binary non-reversible Logic Circuits.
