The Experts below are selected from a list of 312 Experts worldwide ranked by ideXlab platform
Paul K. Hurley - One of the best experts on this subject based on the ideXlab platform.
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Profiling border-traps by TCAD analysis of multifrequency CV-curves in Al 2 O 3 /InGaAs stacks
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2018Co-Authors: Enrico Caruso, Scott Monaghan, Karim Cherkaoui, Paul K. Hurley, Jun Lin, K. F. Burke, David Esseni, Farzan Gity, P. Palestra, Luca SelmiAbstract:This paper reports physics based TCAD simulations of multi-frequency C-V curves of In0.53Ga0.47As MOSCAPs including the AC response of the border traps. The calculations reproduce the experimental inversion and accumulation Capacitance versus frequency, and provide a means to profile the space and energy density of states of border traps. A sensitivity analysis of the results to border traps' distribution is carried out changing the trap volume and the Oxide Capacitance.
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Capacitance and Conductance for an MOS System in Inversion, with Oxide Capacitance and Minority Carrier Lifetime Extractions
IEEE Transactions on Electron Devices, 2014Co-Authors: Scott Monaghan, Eamon O'connor, Ian M. Povey, Karim Cherkaoui, Fahmida Ferdousi, Rafael Rios, Kelin J. Kuhn, Liam Floyd, Eimear Ryan, Paul K. HurleyAbstract:Experimental observations for the In0.53Ga0.47As metal–Oxide–semiconductor (MOS) system in inversion indicate that the measured Capacitance ( $C$ ) and conductance ( $G$ or $G_{m}$ ), are uniquely related through two functions of the alternating current angular frequency ( $\omega $ ). The peak value of the first function ( $G/\omega $ ) is equal to the peak value of the second function (–d $C$ /dlog $_{e}(\omega )\equiv -\omega $ d $C$ /d $\omega $ ). Moreover, these peak values occur at the same angular frequency ( $\omega _{m}$ ), that is, the transition frequency. The experimental observations are confirmed by physics-based simulations, and applying the equivalent circuit model for the MOS system in inversion, the functional relationship is also demonstrated mathematically and shown to be generally true for any MOS system in inversion. The functional relationship permits the discrimination between high interface state densities and genuine surface inversion. The two function peak values are found to be equal to $C_{{{\textrm {ox}}}}^{2}/(2(C_{{{\textrm {ox}}}} +C_{D}))$ where $C_{{{\textrm {ox}}}}$ is the Oxide Capacitance per unit area and $C_{D}$ is the semiconductor depletion Capacitance in inversion. The equal peak values of the functions, and their observed symmetry relation about $\omega _{m}$ on a logarithmic $\omega $ plot, opens a new route to experimentally determining $C_{{{\textrm {ox}}}}$ . Finally, knowing $\omega _{m}$ permits the extraction of the minority carrier generation lifetime in the bulk of the In0.53Ga0.47As layer.
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Effects of alternating current voltage amplitude and Oxide Capacitance on mid-gap interface state defect density extractions in In0.53Ga0.47As capacitors
Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics: Materials Processing Measurement and Phenomena, 2013Co-Authors: Scott Monaghan, Eamon O'connor, Ian M. Povey, Brendan Sheehan, Karim Cherkaoui, Barry J. A. Hutchinson, Paul K. Hurley, Fahmida Ferdousi, Rafael Rios, Kelin J. KuhnAbstract:This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–Oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the Oxide Capacitance. These capacitors are prototypical of the type of gate Oxide material stacks tha...
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Modeling the Capacitance-voltage response of In0.53Ga0.47As metal-Oxide-semiconductor structures: Charge quantization and nonparabolic corrections
Applied Physics Letters, 2010Co-Authors: Terrance P. O'regan, Paul K. Hurley, Bart Sorée, Massimo V. FischettiAbstract:The Capacitance-voltage (C-V) characteristic is calculated for p-type In0.53Ga0.47As metal-Oxide-semiconductor (MOS) structures based on a self-consistent Poisson–Schrodinger solution. For strong inversion, charge quantization leads to occupation of the satellite valleys which appears as a sharp increase in the Capacitance toward the Oxide Capacitance. The results indicate that the charge quantization, even in the absence of interface defects (Dit), is a contributing factor to the experimental observation of an almost symmetric C-V response for In0.53Ga0.47As MOS structures. In addition, nonparabolic corrections are shown to enhance the depopulation of the Γ valley, shifting the Capacitance increase to lower inversion charge densities.
Andrew M. Hoff - One of the best experts on this subject based on the ideXlab platform.
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Oxide of non-basal quasi-polar 6H-SiC surfaces
Journal of Physics D: Applied Physics, 2006Co-Authors: Y Shishkin, E. Oborina, A Maltsev, Stephen E. Saddow, Andrew M. HoffAbstract:Non-basal surfaces of 6H-SiC, which are thought to exhibit polar behaviour, were thermally oxidized in steam. The resulting Oxide thickness was determined by two methods: a non-contact measurement of the Oxide Capacitance and a physical measurement of the step height from an etched pattern. The surface was found to oxidize faster than its counterpart, i.e. the surface. When these results were compared with results of the oxidation of the basal {0001} and surfaces, the effective permittivity of the Oxide was found to be closer to the ideal value of 3.9 for SiO2 grown on the and surfaces. This important result for these novel crystalline surfaces could be beneficial in the fabrication of MOSFET devices on SiC.
Yuan Taur - One of the best experts on this subject based on the ideXlab platform.
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Re-examination of the extraction of MOS interface-state density by C–V stretchout and conductance methods
Semiconductor Science and Technology, 2013Co-Authors: Hanping Chen, Chih-sheng Chang, Clement Hsingjen Wann, Yu Yuan, Bo Yu, Yuan TaurAbstract:The extraction of interface-state density by the stretchout of MOS C?V (Terman method) is re-examined. It is shown that the typical 1?MHz frequency is not nearly high enough to get rid of the interface-state contribution to the MOS Capacitance. When coupled with a bias-dependent trap time constant (?), this could result in a severe underestimate of the interface-state density. The ?conductance method?, on the other hand, can extract the interface-state density accurately if the MOS is biased in depletion and if ? ? 1/? is within the measured frequency range. Also, the robustness of the conductance method subject to errors in the estimated Oxide Capacitance, as well as its extendibility into regions of weak and strong inversion is investigated. Furthermore, two cases of false peaks under the conductance method are mentioned: the first due to a small tunneling leakage in thin Oxides and the second due to a high density of bulk-Oxide traps.
Man Siu Tse - One of the best experts on this subject based on the ideXlab platform.
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Charging/discharging of silicon nanocrystals embedded in an SiO2 matrix inducing reduction/recovery in the total Capacitance and tunneling current
Smart Materials and Structures, 2005Co-Authors: Yong Liu, Tupei Chen, Man Siu TseAbstract:In this work, we have found that the charging of Si nanocrystals (nc-Si) distributed throughout a thin gate Oxide can induce a reduction in the total gate Oxide Capacitance and tunneling current. The Capacitance can be reduced to an extremely low value if the nanocrystals are charged up. The gate Oxide current is also found to decrease dramatically if the nanocrystals are charged up. The reduction in both the Capacitance and the current caused by the charging in the nanocrystals is found to be fully recoverable under ultraviolet (UV) light illumination for 5 min or a thermal annealing at a temperature of 100 °C for 10 min. The reduction and recovery of the Capacitance due to the charging and discharging in the nanocrystals are explained with an equivalent circuit model.
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Charging/discharging induced premature breakdown/recovery in Si nanocrystals embedded in SiO2 matrix
BioMEMS and Nanotechnology, 2004Co-Authors: Yang Liu, Tupei Chen, Man Siu TseAbstract:In this work, we have found that the charging of nc-Si in a thin gate Oxide can induce a reduction in the total gate Oxide Capacitance. The Capacitance can approach zero value if all the nanocrystals are charged up. The reduction of the gate Oxide Capacitance is attributed to the premature breakdown in the gate Oxide due to the charging up in the nanocrystals, as the reduction of the gate Oxide Capacitance corresponds to a large decrease in the gate Oxide leakage current. Here the breakdown caused by the charging in the nanocrystals is somewhat similar to the soft or hard breakdown in pure SiO 2 thin films that are related to the charge trapping in the Oxide film. The breakdown caused by the charging in the nanocrystals is found to be fully recoverable under ultra-violet (UV) light illumination for 5 minutes and a thermal annealing at temperature of 100°C for 10 minutes. The reduction and recovery of the Capacitance due to the charging and discharging in the nanocrystals is explained with an equivalent circuit model.
S. Kar - One of the best experts on this subject based on the ideXlab platform.
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Novel features in the strain profile and gate Oxide Capacitance of through-gate-Oxide implanted structures
Applied Physics Letters, 1997Co-Authors: P. Zaumseil, S. KarAbstract:Oxidized silicon samples were implanted with O, Si, or Ar ions. The samples were characterized by x-ray triple crystal diffractometry and metal-Oxide-semiconductor admittance spectroscopy to reveal information on the nature of the ion-induced damage. The experimental results on the strain profile, gate Oxide Capacitance, etc., exhibited novel features. These interesting results suggest ion-damage-induced precipitation of SiO2 particles in silicon and oxidation of the silicon subsurface by the injection of the recoil O atoms from the gate Oxide into the silicon subsurface, both at room temperature.
