The Experts below are selected from a list of 37437 Experts worldwide ranked by ideXlab platform
Hyosang Choi - One of the best experts on this subject based on the ideXlab platform.
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improvement of quench properties of a flux lock type superconducting fault current limiter by the Connection method of ybco elements
The Transactions of the Korean Institute of Electrical Engineers, 2008Co-Authors: Soobok Chung, Hyoungmin Park, Hyosang ChoiAbstract:We investigated the quench characteristics of a flux-lock type superconducting fault current limiter (SFCL) depending on the methods of the serial and Parallel Connections between the superconducting elements. The flux-lock type SFCL consists of two coils. The primary coil is wound in Parallel to the secondary coil through an iron core, and the secondary coil is connected to the superconducting elements in series and Parallel. In this paper, the analyses of voltage, current, and resistance of the superconducting elements connected in serial and Parallel were performed to increase the power capacity of the flux-lock type SFCL. A part of the superconducting elements was not quenched in serial Connection between the elements and then the power burden of the quenched elements was increased. However the elements with Parallel Connection was all quenched. This means that the power burden of each superconducting element can be reduced under the same conditions. We found that Parallel Connection was more profitable for the current limiting effects and the increase of the power capacity.
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characteristics of a flux lock type superconducting fault current limiter according to the Parallel Connection of the superconducting elements
The Transactions of the Korean Institute of Electrical Engineers, 2008Co-Authors: Byungik Jung, Hyosang ChoiAbstract:We investigated the operating characteristics of the flux-lock type superconducting fault current limiter(SFCL) with the Parallel Connection between the primary and secondary windings which are connected with two superconducting units in series. The Parallel Connection for current level increase of the flux-lock type SFCL is necessary to apply the SFCL into the power system. The resistance generated in superconducting units was dependent upon the winding direction of the primary and the secondary coils, which can reduce the power burden. The resistance of the superconducting elements in the subtractive polarity winding is higher than that of the additive polarity winding. The fault current limiting effect of the subtractive polarity winding is better than that of the additive polarity winding. From this results, we confirmed that the power capacity of the flux-lock type SFCL could be increased by the Parallel Connection of the superconducting units.
Takashi Hikihara - One of the best experts on this subject based on the ideXlab platform.
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Output Series-Parallel Connection of Passivity-Based Controlled DC–DC Converters: Generalization of Asymptotic Stability
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021Co-Authors: Yuma Murakawa, Takashi HikiharaAbstract:The series-Paralleling technique of dc-dc converters is utilized in various domains of electrical engineering for improved power conversion. Previous studies have proposed and classified the control schemes for the series-Paralleled converters. However, they have several restrictions and lack diversity. The purpose of this paper is to propose passivity-based control (PBC) for the diverse output series-Parallel Connection of dc-dc converters. It is proved that the output series-Paralleled converters regulated by PBC are asymptotically stable. The output series-Paralleled converters are numerically simulated to confirm the asymptotic stability. PBC is shown to maintain the stability of the output series-Paralleled converters with diverse circuit topologies, parameters, and steady-states. The result of this paper theoretically supports the numerical and experimental considerations in the previous studies and justifies the further extension of the series-Parallel Connection.
Hanspeter Nee - One of the best experts on this subject based on the ideXlab platform.
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hybrid converter with alternate common arm and director thyristors for high power capability
European Conference on Power Electronics and Applications, 2018Co-Authors: Panagiotis Bakas, Kalle Ilves, Staffan Norrga, Lennart Harnefors, Hanspeter NeeAbstract:This paper presents the basic operating principles of a new hybrid converter that combines thyristors and full-bridge (FB) arms for achieving high active-power capability. This converter consists of a modular multilevel converter (MMC) equipped with additional common arms, which alternate between the upper and lower dc poles. This alternation is achieved by the thyristors that are utilized as director switches and allow the Parallel Connection of the common arms and the arms of the MMC. The main contributions of this paper are the analysis of the operating principles, the simulation verification of the functionality of the proposed converter, and the comparison of the latter with the full-bridge modular multilevel converter (FB-MMC).
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high efficiency 312 kva three phase inverter using Parallel Connection of silicon carbide mosfet power modules
IEEE Transactions on Industry Applications, 2015Co-Authors: Juan Carlos Colmenares, Dimosthenis Peftitsis, Jacek Rabkowski, Dianeperle Sadik, Georg Tolstoy, Hanspeter NeeAbstract:This paper presents the design process of a 312-kVA three-phase silicon carbide inverter using ten Parallel-connected metal–oxide–semiconductor field-effect-transistor power modules in each phase leg. The design processes of the gate-drive circuits with short-circuit protection and power circuit layout are also presented. Measurements in order to evaluate the performance of the gate-drive circuits have been performed using a double-pulse setup. Moreover, electrical and thermal measurements in order to evaluate the transient performance and steady-state operation of the Parallel-connected power modules are shown. Experimental results showing proper steady-state operation of the power converter are also presented. Taking into account measured data, an efficiency of approximately 99.3% at the rated power has been measured for the inverter.
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a submodule implementation for Parallel Connection of capacitors in modular multilevel converters
IEEE Transactions on Power Electronics, 2015Co-Authors: Kalle Ilves, Franz Taffner, Staffan Norrga, Antonios Antonopoulos, Lennart Harnefors, Hanspeter NeeAbstract:In modular multilevel converters there is a trade-off between the switching frequency and the voltage ripple in the submodule capacitors. The reason for this is that it becomes increasingly difficu ...
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a submodule implementation for Parallel Connection of capacitors in modular multilevel converters
European Conference on Power Electronics and Applications, 2013Co-Authors: Kalle Ilves, Franz Taffner, Staffan Norrga, Antonios Antonopoulos, Lennart Harnefors, Hanspeter NeeAbstract:The modular multilevel converter is a suitable converter topology for high-voltage high-power applications and consists of series-connected submodules. Typically, these submodules are half-bridges with dc capacitors. A voltage ripple in the submodule capacitors is inevitable due to the current flowing in the arms. The converter should therefore be controlled in such a way that the capacitor voltages are kept balanced and close to their nominal values over time. This paper presents a new submodule circuit which alleviates the balancing of the capacitor voltages. The proposed submodule circuit consists of two capacitors and eight switches, forming a three-level submodule. Ideally, the voltage and current rating of the switches can be chosen such that the combined power rating of the semiconductors is the same as for equivalent half-bridge submodules. The proposed submodule circuit provides the possibility of connecting the two capacitors in Parallel when the intermediate voltage level is used. This will reduce the capacitor voltage ripple, especially at low switching frequencies and thus allow for a reduction of the size, weight, and cost of the submodule capacitors. The proposed submodule circuit is validated by both simulation results and experiments on a laboratory prototype. It is found that the Parallel Connection of the submodule capacitors will, in fact, significantly improve the balancing of the capacitor voltages.
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challenges regarding Parallel Connection of sic jfets
IEEE Transactions on Power Electronics, 2013Co-Authors: Dimosthenis Peftitsis, Josef Lutz, Jacek Rabkowski, Georg Tolstoy, Roman Baburske, Hanspeter NeeAbstract:State-of-the-art silicon carbide switches have current ratings that are not sufficiently high to be used in high-power converters. It is, therefore, necessary to connect several switches in Parallel in order to reach sufficient current capabilities. An investigation of Parallel-connected normally ON silicon carbide JFETs is presented in this paper. The device parameters that play the most important role for the Parallel Connection are the pinch-off voltage, the gate-source reverse breakdown voltage, the spread in the on-state resistances, and the variations in static transfer characteristics of the devices. Moreover, it is experimentally shown that a fifth factor affecting the Parallel Connection of the devices is the parasitic inductances of the circuit layout. The temperature dependence of the gate-source reverse breakdown voltages is analyzed for two different designs of silicon carbide JFETs. If the spread in the pinch-off and gate-source reverse breakdown voltages is sufficiently large, there might be no possibility for a stable off-state operation of a pair of transistors without forcing one of the gate voltages to exceed the breakdown voltage. A solution to this problem using individual gate circuits for the JFETs is given. The switching performance of two pairs of Parallel-connected devices with different combinations of parameters is compared employing two different gate-driver configurations. Three different circuit layouts are considered and the effect of the parasitic inductances is experimentally investigated. It is found that using a single gate circuit for the two mismatched JFETs may improve the switching performance and therefore the distribution of the switching losses significantly. Based on the measured switching losses, it is also clear that regardless of the design of the gate drivers, the lowest total switching losses for the devices are obtained when they are symmetrically placed.
Steffen Bernet - One of the best experts on this subject based on the ideXlab platform.
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sinusoidal current operation of delay time compensation for Parallel connected igbts
European Conference on Cognitive Ergonomics, 2012Co-Authors: Rodrigo Alvarez, Steffen BernetAbstract:The Parallel Connection of IGBTs is being applied in various low and medium voltage converters. The selection of the devices, the manual parameterization of gate units and the substantial device de-rating are substantial disadvantages of state of the art converters with Parallel connected IGBTs. A new, low expensive and automated delay time compensation method without additional current measurements was introduced in [1]. This paper briefly reviews the structure and function of this new scheme, shows the extension of the scheme for three Parallel connected IGBTs and investigates the performance of the new delay time compensation principle for sinusoidal current operation at different cosφ and m a values as in a converter for drives.
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A new delay time compensation principle for Parallel connected IGBTs
2011 IEEE Energy Conversion Congress and Exposition, 2011Co-Authors: Rodrigo Alvarez, Steffen BernetAbstract:The Parallel Connection of IGBTs is being applied in various low and medium voltage converters. The selection of the devices, the manual parameterization of gate units and the substantial device de-rating are substantial disadvantages of state of the art converters with Parallel connected IGBTs. This paper introduces a new, low expensive and automated delay time compensation method without additional current measurements. The structure and function of the new scheme are described in detail. Finally, the performance of the new delay time compensation principle is verified by experimental investigations of two Parallel connected (1700V, 450 A) IGBT modules.
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Parallel Connection of Integrated Gate Commutated Thyristors (IGCTs) and Diodes
IEEE Transactions on Power Electronics, 2009Co-Authors: Robert Hermann, Steffen Bernet, Peter K. SteimerAbstract:This paper describes the Parallel Connection of 4.5 kV integrated gate commutated thyristors (IGCTs) and diodes. The impact of varying device characteristics on the stationary current distribution of Parallel connected semiconductors is investigated. Possible solutions to improve the current sharing at steady state are presented. A thermal stabilization effect of Parallel connected IGCTs is discussed. Furthermore, the behavior of Parallel connected devices during switching transients is investigated experimentally in a 1.5-kV, 5-kA buck converter. Especially, the impact of asymmetrical circuit layouts, magnetic couplings, different turn-on and turn-off delays, and junction temperatures are considered. It is shown that a substantial current derating is necessary to enable a reliable operation of Parallel IGCTs and diodes.
Yuma Murakawa - One of the best experts on this subject based on the ideXlab platform.
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Output Series-Parallel Connection of Passivity-Based Controlled DC–DC Converters: Generalization of Asymptotic Stability
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021Co-Authors: Yuma Murakawa, Takashi HikiharaAbstract:The series-Paralleling technique of dc-dc converters is utilized in various domains of electrical engineering for improved power conversion. Previous studies have proposed and classified the control schemes for the series-Paralleled converters. However, they have several restrictions and lack diversity. The purpose of this paper is to propose passivity-based control (PBC) for the diverse output series-Parallel Connection of dc-dc converters. It is proved that the output series-Paralleled converters regulated by PBC are asymptotically stable. The output series-Paralleled converters are numerically simulated to confirm the asymptotic stability. PBC is shown to maintain the stability of the output series-Paralleled converters with diverse circuit topologies, parameters, and steady-states. The result of this paper theoretically supports the numerical and experimental considerations in the previous studies and justifies the further extension of the series-Parallel Connection.
