The Experts below are selected from a list of 24612 Experts worldwide ranked by ideXlab platform
Aydin Ilker Karsilayan - One of the best experts on this subject based on the ideXlab platform.
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Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifiers
IEEE Transactions on Circuits and Systems I: Regular Papers, 2007Co-Authors: R. Samadi, Aydin Ilker KarsilayanAbstract:A new technique for designing uniform multistage amplifiers (MAs) for high-frequency applications is introduced. The proposed method uses the multi-Peak Bandwidth enhancement technique while it employs identical, simple and inductorless stages. The intrinsic capacitances within transistors are exploited by the active negative feedbacks to expand the Bandwidth. While all stages of the proposed MA topology are identical, the gain-Bandwidth product can be extended several times. Using the proposed topology, a six-stage amplifier in TSMC 0.35-mum CMOS process was designed. Measurement results show that the gain can be varied between 16 and 44 dB within 0.7-3.2-GHz Bandwidth with less than 5.2-nV /radicHz noise. Die area of the amplifier is 175 mum times 300 mum.
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multi Peak Bandwidth enhancement technique for multistage amplifiers
Great Lakes Symposium on VLSI, 2004Co-Authors: Reza M Samadi, Aydin Ilker KarsilayanAbstract:A new technique for designing wideband multistage amplifiers (MA) is introduced. The proposed method has several advantages such as increased Bandwidth with increasing number of stages and decreased sensitivity to process variations. All stages of the proposed MA topology can be identical, where the Bandwidth can be several times more than that of a single stage. A 0.35μm CMOS process is used to implement the new MA circuit; where active negative feedbacks exploit the intrinsic capacitance within the transistors to expand the Bandwidth. Simulation results show an overall GBP of 4.8THz.
R. Samadi - One of the best experts on this subject based on the ideXlab platform.
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Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifiers
2015Co-Authors: R. SamadiAbstract:Abstract—A new technique for designing uniform multistage amplifiers (MAs) for high-frequency applications is introduced. The proposed method uses the multi-Peak Bandwidth enhance-ment technique while it employs identical, simple and inductorless stages. The intrinsic capacitances within transistors are exploited by the active negative feedbacks to expand the Bandwidth. While all stages of the proposed MA topology are identical, the gain-Bandwidth product can be extended several times. Using the proposed topology, a six-stage amplifier in TSMC 0.35- m CMOS process was designed. Measurement results show that the gain can be varied between 16 and 44 dB within 0.7–3.2-GHz Bandwidth with less than 5.2-nV Hz noise. Die area of the amplifier is 175 m 300 m. Index Terms—Amplifiers, analog integrated circuits, broadband amplifiers, broadband communications. I
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Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifiers
IEEE Transactions on Circuits and Systems I: Regular Papers, 2007Co-Authors: R. Samadi, Aydin Ilker KarsilayanAbstract:A new technique for designing uniform multistage amplifiers (MAs) for high-frequency applications is introduced. The proposed method uses the multi-Peak Bandwidth enhancement technique while it employs identical, simple and inductorless stages. The intrinsic capacitances within transistors are exploited by the active negative feedbacks to expand the Bandwidth. While all stages of the proposed MA topology are identical, the gain-Bandwidth product can be extended several times. Using the proposed topology, a six-stage amplifier in TSMC 0.35-mum CMOS process was designed. Measurement results show that the gain can be varied between 16 and 44 dB within 0.7-3.2-GHz Bandwidth with less than 5.2-nV /radicHz noise. Die area of the amplifier is 175 mum times 300 mum.
Hyechurn Jang - One of the best experts on this subject based on the ideXlab platform.
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tcp ip performance near i o bus Bandwidth on multi core systems 10 gigabit ethernet vs multi port gigabit ethernet
International Conference on Parallel Processing, 2008Co-Authors: Hyunwook Jin, Yeonji Yun, Hyechurn JangAbstract:With significant advances in network interfaces, I/O bus, and processor architecture of end node, innovative approaches are required to achieve high network Bandwidth by fully utilizing available system resources. The issues related can be summarized into two: (i) Utilizing I/O bus Bandwidth for high Bandwidth network connection and (ii) Utilizing multiple cores for high packet processing throughput. In this paper, we conduct several experiments on a multi-core system with 10 GigE and multi-port 1 GigE network interfaces. We aim to show the impact of system configurations on the network performance and compare the performance of two different network interfaces. The experimental results show that, with the proper interrupt affinity configurations, the multi-port 1 GigE can achieve comparable Bandwidth to 10 GigE. The Peak Bandwidth achieved by the multi-port 1 GigE is 6.7 Gbps, which is more than 80% of the theoretical maximum I/O bus Bandwidth on the experimental system. We, however, also show that the multi-port 1 GigE can consume much more processor resource than 10 GigE. More importantly, we reveal that processing the packets on many cores can result in more resource consumption without much benefit. This can be because of locking overhead between softirqs running on different cores and lower cache efficiency. We show that the more tuning on the configuration cannot overcome this side effect.
F J Sanchezvazquez - One of the best experts on this subject based on the ideXlab platform.
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effects of light during early larval development of some aquacultured teleosts a review
Aquaculture, 2011Co-Authors: Natalia Villamizar, Borja Blancovives, Herve Migaud, Andrew Davie, Stefano Carboni, F J SanchezvazquezAbstract:Abstract Light is a key environmental factor that synchronizes all life-stages of fish, from embryo development to sexual maturation. The underwater photo-environment is complex since light characteristics (i.e. intensity, photoperiod and spectrum) depend on the absorbance properties of the water column. The aim of this paper is to review the effects of artificial lighting conditions on the performance, development and welfare of some fish larvae of commercial interest. Reviewed results show that larvae were significantly affected by light characteristics. For example, European sea bass and sole larvae achieved the best performance, and showed fastest development and lowest degree of deformity under a light/dark cycle using blue light (half-Peak Bandwidth = 435–500 nm), conditions which were the closest to their natural aquatic environment. However, constant light (LL) or constant darkness (DD) was shown to negatively affect normal larval development and resulted in increased malformations and poor survival in most of the studied species. Similar results have been observed in other fish larvae such as Atlantic cod, which performed better under short wavelengths (blue and green). These findings highlight the role of lighting conditions during the early development of fish larvae and should be taken into account for the optimization of rearing protocols in fish hatcheries as juvenile supply is one of the main production bottlenecks.
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effect of light spectrum and photoperiod on the growth development and survival of european sea bass dicentrarchus labrax larvae
Aquaculture, 2009Co-Authors: Natalia Villamizar, A Garciaalcazar, F J SanchezvazquezAbstract:Abstract This study investigates how the characteristics (spectrum and photoperiod) of artificial light affect European sea bass eggs and larvae from − 1 to 40 days post-hatching. Fertilised eggs and larvae were reared under five different light treatments: 12L:12D red light (LDR; half-Peak Bandwidth = 641–718 nm), 12L:12D blue light (LDB; half-Peak Bandwidth = 435–500 nm), 12L:12D broad-spectrum white light (LDW; 367
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influence of light intensity spectrum and orientation on sea bass plasma and ocular melatonin
Journal of Pineal Research, 2002Co-Authors: M J Bayarri, J A Madrid, F J SanchezvazquezAbstract:Melatonin is involved in the transduction of light information and the photoperiodic control of many important physiological functions in fish. Although artificial photoperiods have been used to improve fish growth and manipulate reproduction, there is little information about the characteristics of light 'quality'. In this paper we describe the effects of a light pulse in the middle of the dark phase on plasma and ocular melatonin in European sea bass. We first determined the light intensity necessary to elicit a melatonin response using white light of varying intensities (0.6-600 mu W/cm(2), experiment 1). Secondly, we tested the effect of the light spectrum on melatonin production using three differently coloured lights (half-Peak Bandwidth=434-477, 498-575 and 610-687 nm for the blue, green and red lamp, respectively, experiment 2) and, finally, we determined the effect of light orientation (downwards directed versus upwards directed, experiment 3). The results show that the minimum light intensity needed to inhibit or stimulate melatonin levels in both plasma and the eye was 6.0 mu W/cm(2). A linear correlation was found between the logarithm of light intensity and the relative inhibition. In addition, the blue wavelength was more effective in decreasing melatonin levels in the former and increasing the levels in the latter. Nevertheless, red light at sufficient intensity proved effective at significantly suppressing circulating melatonin. Downwards light had a greater effect than upward-directed illumination in suppressing plasma melatonin. In conclusion, the results point to the importance of giving proper consideration to the characteristics of light, to adequately control melatonin production and its related physiological processes.
Sungin Jung - One of the best experts on this subject based on the ideXlab platform.
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inter domain socket communications supporting high performance and full binary compatibility on xen
Virtual Execution Environments, 2008Co-Authors: Kangho Kim, Sungin Jung, Cheiyol Kim, Hyunsup Shin, Jinsoo KimAbstract:Communication performance between two processes in their own domains on the same physical machine gets improved but it does not reach our expectation. This paper presents the design and implementation of high-performance inter-domain communication mechanism, called XWAY, that maintains binary compatibility for applications written in standard socket interface. As a result of our survey, we found that three overheads mainly contribute to the poor performance; those are TCP/IP processing cost in each domain, page flipping overhead, and long communication path between both sides of a socket. XWAY achieves high performance by bypassing TCP/IP stacks, avoiding page flipping overhead, and providing a direct, accelerated communication path between domains in the same machine. Moreover, we introduce the XWAY socket architecture to support full binary compatibility with as little effort as possible. We implemented our design on Xen 3.0.3-0 with Linux kernel 2.6.16.29, and evaluated basic performance, the speed of file transfer, DBT-1 benchmark, and binary compatibility using binary image of real socket applications. In our tests, we have proved that XWAY realizes the high performance that is comparable to UNIX domain socket and ensures full binary compatibility. The basic performance of XWAY, measured with netperf, shows minimum latency of 15.6 usec and Peak Bandwidth of 4.7Gbps, which is superior to that of native TCP socket. We have also examined whether several popular applications using TCP socket can be executed on XWAY with their own binary images. Those applications worked perfectly well.
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design and implementation of a user level sockets layer over virtual interface architecture
Concurrency and Computation: Practice and Experience, 2003Co-Authors: Sungin Jung, Soonhoi HaAbstract:SUMMARY The Virtual Interface Architecture (VIA) is an industrystandard user-level communication architecture for system area networks. The VIA provides a protected, directly-accessible interface to a network hardware, removing the operating system from the critical communication path. In this paper, we design and implement a user-level Sockets layer over VIA, named SOVIA (Sockets Over VIA). Our objective is to use the SOVIA layer to accelerate the existing Sockets-based applications with a reasonable effort and to provide a portable and high-performance communication library based on VIA to application developers. SOVIA realizes comparable performance to native VIA, showing a minimum one-way latency of 10.5 µs and a Peak Bandwidth of 814 Mbps on Giganet’s cLAN. We have shown the functional compatibility with the existing Sockets API by porting File Transfer Protocol (FTP) and Remote Procedure Call (RPC) applications over the SOVIA layer. Compared to the Giganet’s LAN Emulation (LANE) driver which emulates TCP/IP inside the kernel, SOVIA easily doubles the file transfer Bandwidth in FTP and reduces the latency of calling an empty remote procedure by 77% in RPC applications. Copyright c � 2003 John Wiley & Sons, Ltd.
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sovia a user level sockets layer over virtual interface architecture
Foundations of Computer Science, 2001Co-Authors: Sungin JungAbstract:The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directly-accessible interface to a network hardware, removing the operating system from the critical communication path. In this paper, we design and implement a user-level Sockets layer over VIA, named SOVIA (Sockets Over VIA). Our objective is to use the SOVIA layer to accelerate the existing Sockets-based applications with a reasonable effort and to provide a portable and high performance communication library based on VIA to the application developers.SOVIA realizes comparable performance to native VIA, showing the minimum latency of 10.5usec and the Peak Bandwidth of 814Mbps on Giganet's cLAN. We have verified the functional compatibility with the existing Sockets API by porting FTP (File Transfer Protocol) and RPC (Remote Procedure Call) applications over the SOVIA layer. Compared to the Giganet's LANE driver which emulates TCP/IP inside the kernel, SOVIA easily doubles the file transfer Bandwidth in FTP and reduces the latency of calling an empty remote procedure by 77% in RPC applications.
