The Experts below are selected from a list of 3642 Experts worldwide ranked by ideXlab platform

Lichun Chang - One of the best experts on this subject based on the ideXlab platform.

  • microstructure evolution and dielectric properties of ba0 7sr0 3tio3 parallel Plate Capacitor with cr interlayer
    Surface & Coatings Technology, 2007
    Co-Authors: Bishiou Chiou, Lichun Chang
    Abstract:

    Abstract The microstructure, crystalline phase, surface morphology, and dielectric properties of a sandwich structure of Ba 0.7 Sr 0.3 TiO 3 /Cr/Ba 0.7 Sr 0.3 TiO 3 (BST/Cr/BST) dielectric are characterized to understand the influence of the nano-Cr interlayer. BST dielectrics inserted with Cr film of thickness ranged from 2 nm to 15 nm all show the crystalline cubic phase. However, TiO 2 layer is formed on the upper BST layer after the BST/Cr/BST dielectrics are annealed at 800 °C in O 2 atmosphere for one hour. In this study, TEM, AFM, SEM, X-ray diffraction, and AES are employed to investigate the microstructure evolution of the BST/Cr/BST dielectrics after annealing. The correlations between the microstructure and the dielectric properties of the Pt/BST/Cr/BST/Pt Capacitors with various Cr thicknesses are explored.

  • thermal stability and electric properties of ba0 7sr0 3tio3 parallel Plate Capacitor with nano cr interlayer
    Surface & Coatings Technology, 2006
    Co-Authors: Bishiou Chiou, Lichun Chang, Chenchia Chou, Boheng Liou
    Abstract:

    Abstract A novel sandwich structure of Ba 0.7 Sr 0.3 TiO 3 /Cr/Ba 0.7 Sr 0.3 TiO 3 (BST/Cr/BST) was sputtered onto Pt/Ti/SiO 2 /Si substrate. With the insertion of a Cr layer, the leakage currents are decreased and the thermal stability of the specimens is enhanced. Temperature coefficient of capacitance (TCC) of specimens with BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms can achieve about 83% lower than those with BST (400 nm) monolayer. However, the dielectric constant of the BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms decreases to about 37% of that BST monolayer. The leakage current densities under an electric field of 125 kV/cm at 90 °C are 4 × 10 − 4  A/cm 2 and 9 × 10 − 1  A/cm 2 for BST (200 nm)/Cr (2 nm)/BST (200 nm) and monolayer BST (400 nm), respectively. X-ray diffraction results indicate the formation of a CrO 3 secondary phase after annealing at 700 °C or above in O 2 atmosphere. The root causes for the improvement of leakage currents and thermal stability with the insertion of nano-Cr interlayer are explored. The results show the insertion of Cr-nanolayer improves the electric properties for application in Capacitors.

Bishiou Chiou - One of the best experts on this subject based on the ideXlab platform.

  • microstructure evolution and dielectric properties of ba0 7sr0 3tio3 parallel Plate Capacitor with cr interlayer
    Surface & Coatings Technology, 2007
    Co-Authors: Bishiou Chiou, Lichun Chang
    Abstract:

    Abstract The microstructure, crystalline phase, surface morphology, and dielectric properties of a sandwich structure of Ba 0.7 Sr 0.3 TiO 3 /Cr/Ba 0.7 Sr 0.3 TiO 3 (BST/Cr/BST) dielectric are characterized to understand the influence of the nano-Cr interlayer. BST dielectrics inserted with Cr film of thickness ranged from 2 nm to 15 nm all show the crystalline cubic phase. However, TiO 2 layer is formed on the upper BST layer after the BST/Cr/BST dielectrics are annealed at 800 °C in O 2 atmosphere for one hour. In this study, TEM, AFM, SEM, X-ray diffraction, and AES are employed to investigate the microstructure evolution of the BST/Cr/BST dielectrics after annealing. The correlations between the microstructure and the dielectric properties of the Pt/BST/Cr/BST/Pt Capacitors with various Cr thicknesses are explored.

  • thermal stability and electric properties of ba0 7sr0 3tio3 parallel Plate Capacitor with nano cr interlayer
    Surface & Coatings Technology, 2006
    Co-Authors: Bishiou Chiou, Lichun Chang, Chenchia Chou, Boheng Liou
    Abstract:

    Abstract A novel sandwich structure of Ba 0.7 Sr 0.3 TiO 3 /Cr/Ba 0.7 Sr 0.3 TiO 3 (BST/Cr/BST) was sputtered onto Pt/Ti/SiO 2 /Si substrate. With the insertion of a Cr layer, the leakage currents are decreased and the thermal stability of the specimens is enhanced. Temperature coefficient of capacitance (TCC) of specimens with BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms can achieve about 83% lower than those with BST (400 nm) monolayer. However, the dielectric constant of the BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms decreases to about 37% of that BST monolayer. The leakage current densities under an electric field of 125 kV/cm at 90 °C are 4 × 10 − 4  A/cm 2 and 9 × 10 − 1  A/cm 2 for BST (200 nm)/Cr (2 nm)/BST (200 nm) and monolayer BST (400 nm), respectively. X-ray diffraction results indicate the formation of a CrO 3 secondary phase after annealing at 700 °C or above in O 2 atmosphere. The root causes for the improvement of leakage currents and thermal stability with the insertion of nano-Cr interlayer are explored. The results show the insertion of Cr-nanolayer improves the electric properties for application in Capacitors.

Boheng Liou - One of the best experts on this subject based on the ideXlab platform.

  • thermal stability and electric properties of ba0 7sr0 3tio3 parallel Plate Capacitor with nano cr interlayer
    Surface & Coatings Technology, 2006
    Co-Authors: Bishiou Chiou, Lichun Chang, Chenchia Chou, Boheng Liou
    Abstract:

    Abstract A novel sandwich structure of Ba 0.7 Sr 0.3 TiO 3 /Cr/Ba 0.7 Sr 0.3 TiO 3 (BST/Cr/BST) was sputtered onto Pt/Ti/SiO 2 /Si substrate. With the insertion of a Cr layer, the leakage currents are decreased and the thermal stability of the specimens is enhanced. Temperature coefficient of capacitance (TCC) of specimens with BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms can achieve about 83% lower than those with BST (400 nm) monolayer. However, the dielectric constant of the BST(200 nm)/Cr(2 nm)/BST(200 nm) multifilms decreases to about 37% of that BST monolayer. The leakage current densities under an electric field of 125 kV/cm at 90 °C are 4 × 10 − 4  A/cm 2 and 9 × 10 − 1  A/cm 2 for BST (200 nm)/Cr (2 nm)/BST (200 nm) and monolayer BST (400 nm), respectively. X-ray diffraction results indicate the formation of a CrO 3 secondary phase after annealing at 700 °C or above in O 2 atmosphere. The root causes for the improvement of leakage currents and thermal stability with the insertion of nano-Cr interlayer are explored. The results show the insertion of Cr-nanolayer improves the electric properties for application in Capacitors.

Yuriy V Pershin - One of the best experts on this subject based on the ideXlab platform.

  • bistable nonvolatile elastic membrane memCapacitor exhibiting a chaotic behavior
    IEEE Transactions on Electron Devices, 2011
    Co-Authors: Julian Martinezrincon, Yuriy V Pershin
    Abstract:

    We suggest a realization of a bistable nonvolatile memory Capacitor (memCapacitor). Its design utilizes a strained elastic membrane as a Plate of a parallel-Plate Capacitor. The applied stress generates low and high capacitance configurations of the system. We demonstrate that a voltage pulse of an appropriate amplitude can be used to reliably switch the memCapacitor into the desired capacitance state. Moreover, the charge-voltage and capacitance-voltage curves of such a system demonstrate hysteresis and transition into a chaotic regime in a certain range of alternating-current voltage amplitudes and frequencies. The membrane memCapacitor connected to a voltage source comprises a single-element nonautonomous chaotic circuit.

  • bistable non volatile elastic membrane memCapacitor exhibiting chaotic behavior
    arXiv: Mesoscale and Nanoscale Physics, 2011
    Co-Authors: Julian Martinezrincon, Yuriy V Pershin
    Abstract:

    We suggest a realization of a bistable non-volatile memory Capacitor (memCapacitor). Its design utilizes a strained elastic membrane as a Plate of a parallel-Plate Capacitor. The applied stress generates low and high capacitance configurations of the system. We demonstrate that a voltage pulse of an appropriate amplitude can be used to reliably switch the memCapacitor into the desired capacitance state. Moreover, charged-voltage and capacitance-voltage curves of such a system demonstrate hysteresis and transition into a chaotic regime in a certain range of ac voltage amplitudes and frequencies. Membrane memCapacitor connected to a voltage source comprises a single element nonautonomous chaotic circuit.

Clive A Randall - One of the best experts on this subject based on the ideXlab platform.

  • effect of ferroelectric polarization on ionic transport and resistance degradation in batio3 by phase field approach
    Journal of the American Ceramic Society, 2014
    Co-Authors: Jie Shen, Clive A Randall, Longqing Chen
    Abstract:

    We proposed a model to study the resistance degradation behavior of ferroelectric oxides in the presence of ferroelectric spontaneous polarization by combining the phase-field model of ferroelectric domains and nonlinear diffusion equations for ionic/electronic transport. We took into account the nonperiodic boundary conditions for solving the electrochemical transport equations and Ginzburg–Landau equations using the Chebyshev collocation algorithm. We considered a single domain structure relative to a thin film BaTiO3 single crystal orientated to the normal of the electrode Plates (Ni) in a single parallel Plate Capacitor configuration. The Capacitor was subjected to a dc bias of 0.5 V either along the polarization direction or opposite to the polarization direction at 25°C. It is shown that the polarization bound charges at the metal/ferroelectric interface play an important role in charge carrier transport and leakage current evolution in BaTiO3 Capacitor.

  • electrode defects in multilayer Capacitors part i modeling the effect of electrode roughness and porosity on electric field enhancement and leakage current
    Journal of the American Ceramic Society, 2012
    Co-Authors: Malay M Samantaray, Abhijit Gurav, Elizabeth C Dickey, Clive A Randall
    Abstract:

    Multilayer Capacitors consist of multiple, often hundreds of Capacitors connected in parallel to maximize volumetric efficiency. As the dielectric and electrode layer thicknesses are scaled down, microstructural imperfections become increasingly influential on the device electrical performance. Specifically, the presence of nonplanar and discontinuous electrodes can lead to local field enhancements while the relative morphologies of two adjacent electrodes determine variations in the local dielectric thickness. To study the effects of electrode morphologies, an analytical approach is taken to calculate the field enhancement and leakage current with respect to an ideal parallel-Plate Capacitor. It is shown that the electrode roughness causes the leakage current to increase with respect to that of the ideal flat parallel-Plate Capacitor. To further include the effects of local curvature on electric field enhancements, finite element methods are used to calculate field distributions within Capacitor structures containing rough interfaces and porosity. In these simulations, the effects of electrode pore diameters, dielectric layer thickness, and the amplitude and wavelength of the electrode roughness are studied.