The Experts below are selected from a list of 45672 Experts worldwide ranked by ideXlab platform

Vijaykrishnan Narayanan - One of the best experts on this subject based on the ideXlab platform.

  • a synthesis algorithm for reconfigurable single electron transistor arrays
    ACM Journal on Emerging Technologies in Computing Systems, 2013
    Co-Authors: Yungchih Chen, Yuan Xie, Soumya Eachempati, Chunyao Wang, Suman Datta, Vijaykrishnan Narayanan
    Abstract:

    Reducing Power Consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on Power reduction from the device level up to the system level. Among a plethora of low Power devices that are being explored, single-electron transistors (SETs) at room temperature are particularly attractive. Although prior work has proposed a binary decision diagram-based reconfigurable logic architecture using SETs, it lacks an automatic synthesis algorithm for the architecture. Consequently, in this work, we develop a product-term-based approach that synthesizes a logic circuit by mapping all its product terms into the SET architecture. The experimental results show the effectiveness and efficiency of the proposed approach on a set of MCNC benchmarks.

  • automated mapping for reconfigurable single electron transistor arrays
    Design Automation Conference, 2011
    Co-Authors: Yungchih Chen, Yuan Xie, Soumya Eachempati, Chunyao Wang, Suman Datta, Vijaykrishnan Narayanan
    Abstract:

    Reducing Power Consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on Power reduction from the device level up to the system level. Among a plethora of low Power devices that are being explored, single-electron transistors (SETs) at room temperature are particularly attractive. Although prior work has proposed a binary decision diagram-based reconfigurable logic architecture using SETs, it lacks an automated synthesis tool for the device. Consequently, in this work, we develop a product-term-based approach that synthesizes a logic circuit by mapping all its product terms into the SET architecture. The experimental results show the effectiveness and efficiency of the proposed approach on a set of MCNC benchmarks.

Edson L Ursini - One of the best experts on this subject based on the ideXlab platform.

  • Reducing Power Consumption in smart campus network applications through simulation of high priority service traffic balancing prediction and fuzzy logic
    Winter Simulation Conference, 2018
    Co-Authors: J Emiliano R Leite, Flavio R Massaro, Paulo Martins, Edson L Ursini
    Abstract:

    In this work, we tackle Power Consumption reduction of battery-dependent devices in a smart campus (including hospital) application. These devices are connected by networked systems which may be subject to fluctuation of the message delays that control essential equipment. We show through five case studies using discrete event simulation that Power Consumption may be reduced using proper prioritization and balancing of the network emergency traffic. A predictor algorithm and a fuzzy logic controller were used to indicate the level upon which the system must switch off the load in order to reduce Power Consumption. The analysis of a case study shows that a considerable reduction in Power Consumption was achieved through the reduction of message delays and also due to the fuzzy control of AC and lighting equipment.

Yungchih Chen - One of the best experts on this subject based on the ideXlab platform.

  • a synthesis algorithm for reconfigurable single electron transistor arrays
    ACM Journal on Emerging Technologies in Computing Systems, 2013
    Co-Authors: Yungchih Chen, Yuan Xie, Soumya Eachempati, Chunyao Wang, Suman Datta, Vijaykrishnan Narayanan
    Abstract:

    Reducing Power Consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on Power reduction from the device level up to the system level. Among a plethora of low Power devices that are being explored, single-electron transistors (SETs) at room temperature are particularly attractive. Although prior work has proposed a binary decision diagram-based reconfigurable logic architecture using SETs, it lacks an automatic synthesis algorithm for the architecture. Consequently, in this work, we develop a product-term-based approach that synthesizes a logic circuit by mapping all its product terms into the SET architecture. The experimental results show the effectiveness and efficiency of the proposed approach on a set of MCNC benchmarks.

  • automated mapping for reconfigurable single electron transistor arrays
    Design Automation Conference, 2011
    Co-Authors: Yungchih Chen, Yuan Xie, Soumya Eachempati, Chunyao Wang, Suman Datta, Vijaykrishnan Narayanan
    Abstract:

    Reducing Power Consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on Power reduction from the device level up to the system level. Among a plethora of low Power devices that are being explored, single-electron transistors (SETs) at room temperature are particularly attractive. Although prior work has proposed a binary decision diagram-based reconfigurable logic architecture using SETs, it lacks an automated synthesis tool for the device. Consequently, in this work, we develop a product-term-based approach that synthesizes a logic circuit by mapping all its product terms into the SET architecture. The experimental results show the effectiveness and efficiency of the proposed approach on a set of MCNC benchmarks.

J Emiliano R Leite - One of the best experts on this subject based on the ideXlab platform.

  • Reducing Power Consumption in smart campus network applications through simulation of high priority service traffic balancing prediction and fuzzy logic
    Winter Simulation Conference, 2018
    Co-Authors: J Emiliano R Leite, Flavio R Massaro, Paulo Martins, Edson L Ursini
    Abstract:

    In this work, we tackle Power Consumption reduction of battery-dependent devices in a smart campus (including hospital) application. These devices are connected by networked systems which may be subject to fluctuation of the message delays that control essential equipment. We show through five case studies using discrete event simulation that Power Consumption may be reduced using proper prioritization and balancing of the network emergency traffic. A predictor algorithm and a fuzzy logic controller were used to indicate the level upon which the system must switch off the load in order to reduce Power Consumption. The analysis of a case study shows that a considerable reduction in Power Consumption was achieved through the reduction of message delays and also due to the fuzzy control of AC and lighting equipment.

Sukwon Choi - One of the best experts on this subject based on the ideXlab platform.

  • reflective dual mode liquid crystal display possessing low Power Consumption and high contrast ratio under ambient light
    Optics Express, 2012
    Co-Authors: Taehyung Kim, Joong Ha Lee, Taehoon Yoon, Sukwon Choi
    Abstract:

    We propose a reflective dual-mode liquid crystal display (RD-LCD) which has advantages of long memory retention time and high contrast ratio. The proposed device adopts ideal bistable characteristics, a cell thickness over pitch (d/p) of 0.25. It can realize long memory retention time, thereby Reducing Power Consumption. In addition, an optical configuration for the RD-LCD makes low light leakages at dark state and shows good dispersion characteristics in both dark and bright states over the entire visible ranges. We experimentally confirmed retention time over 6 months in memory mode and memory and dynamic contrast ratios of 47:1 and 43:1 under ambient light, respectively. As a result, the proposed RD-LCD demonstrates convincingly that it is a candidate for green display.