The Experts below are selected from a list of 15195 Experts worldwide ranked by ideXlab platform
Irith Pomeranz - One of the best experts on this subject based on the ideXlab platform.
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Fixed-State Tests for Delay Faults in Scan Designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011Co-Authors: Irith Pomeranz, Sudhakar M. ReddyAbstract:One of the methods to reduce the power dissipation during Scan shifting is based on holding the state inputs to the combinational logic of a circuit constant for the duration of a Scan Operation. We note that this method also allows a new type of two-pattern Scan-based tests to be applied. We refer to these tests as fixed-state tests. These tests have several properties that make them effective as complements to skewed-load and broadside tests, and also allows them to be computed efficiently. We discuss these properties in the context of transition faults. We describe procedures for selecting the constant vector for the state inputs during a Scan Operation, and for generating fixed-state tests. We present experimental results to demonstrate the transition fault coverage improvements possible with these tests.
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VTS - AutoScan-Invert: An Improved Scan Design without External Scan Inputs or Outputs
25th IEEE VLSI Test Symmposium (VTS'07), 2007Co-Authors: Irith Pomeranz, Sudhakar M. ReddyAbstract:AutoScan is a design-for-testability approach proposed earlier that uses Scan chains without external Scan inputs or outputs in order to reduce the test application time and test data volume of Scan. We describe three improvements to the basic autoScan design-for-testability approach based on the following observation. Under autoScan, due to the elimination of external Scan inputs, the first flip-flop of a Scan chain can only receive its value from the corresponding next-state line. Thus, its state cannot be controlled directly by a Scan Operation. In the improved autoScan approach, we allow the inverted next-state line to drive the first flip-flop of a Scan chain during Scan Operations. We refer to the improved autoScan approach as autoScan-invert. We describe a Scan synthesis procedure appropriate for autoScan-invert and present experimental results.
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On reducing test application time for Scan circuits using limited Scan Operations and transfer sequences
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005Co-Authors: Yonsang Cho, Irith Pomeranz, Sudhakar M. ReddyAbstract:The test application time of a Scan circuit is a significant factor in the overall test cost of the circuit. Therefore, reducing the test application time is an important problem. The test application time of a test set for a Scan circuit is determined by the sum of the number of Scan shifts required for applying the test set and the number of primary input vectors in the test set. Compaction procedures that view a full-Scan circuit as a combinational circuit reduce the number of test vectors, where a test vector consists of a Scan vector and a primary input vector. However, this is not sufficient, and effective procedures must reduce the number of Scan Operations further than the combinational circuit view allows. Procedures to reduce the test application time by dropping Scan Operations and applying several primary input vectors between Scan Operations have been proposed earlier. The compaction procedures proposed in this work reduce the test application time further by using limited Scan Operations. Under a limited Scan Operation, the number of shifts is smaller than the length of a Scan chain. Scan Operations that cannot be dropped are replaced by limited Scan Operations under the proposed procedures.
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On the use of random limited-Scan to improve at-speed random pattern testing of Scan circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2002Co-Authors: Irith PomeranzAbstract:A method is proposed for improving the fault coverage that can be achieved by random patterns for circuits with Scan. Under the test application scheme considered, primary input sequences are applied at-speed between Scan Operations. The proposed method uses limited Scan Operations to improve the fault coverage. Under a limited Scan Operation, the circuit state is shifted by a number of positions which may be smaller than the number of state variables. Limited Scan Operations are inserted randomly to ensure that the complete test set can be generated by a random pattern generator. Experimental results show that complete fault coverage is achieved by the proposed method, i.e., the proposed method detects all the detectable circuit faults, for all the benchmark circuits considered.
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DAC - Random limited-Scan to improve random pattern testing of Scan circuits
Proceedings of the 38th conference on Design automation - DAC '01, 2001Co-Authors: Irith PomeranzAbstract:We propose a method of random pattern generation for at-speed testing of circuits with Scan. The proposed method uses limited Scan Operations to achieve complete fault coverage. Under a limited Scan Operation, the circuit state is shifted by a number of positions which may be smaller than the number of state variables. Limited Scan Operations are inserted randomly to ensure that the complete test set can be generated by a random pattern generator with simple control logic.
Aoying Zhou - One of the best experts on this subject based on the ideXlab platform.
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Parallel strategy for multiple Scan Operations with data replication
World Wide Web, 2018Co-Authors: Xing Wei, Huichao Duan, Weining Qian, Aoying ZhouAbstract:To support the large-scale analytic for Web applications, the backend distributed data management system must provide the service for accessing massive data. Thus, the Scan Operation becomes a critical step. To improve the performance of Scan Operation, modern data management systems usually rely on the simple partitioned parallelism. Under the partitioned parallelism, tables are consist of several partitions, and each Scan Operation can access multiple partitions separately. It is a simple and effective solution for a single Scan Operation. In this paper, we consider managing multiple Scan Operations together, where the situation is no longer straightforward. To address the problem, we propose the parallel strategy to schedule batched Scan Operations together beyond the simple partitioned parallelism. For the sake of performance, first, we utilize replications to increase the parallelism and propose an effective load balancing strategy over replication nodes based on linear programming. Second, we propose an effective chunk-based scheduling algorithm for multi-threading parallelism on each node to guarantee all threads have even workloads under a qualified cost model. Finally, we integrate our parallel Scan strategy into an open-sourced distributed data management system. Experimental evaluation shows our parallel Scan strategy significantly improves the performance of Scan Operation.
Sudhakar M. Reddy - One of the best experts on this subject based on the ideXlab platform.
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Fixed-State Tests for Delay Faults in Scan Designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011Co-Authors: Irith Pomeranz, Sudhakar M. ReddyAbstract:One of the methods to reduce the power dissipation during Scan shifting is based on holding the state inputs to the combinational logic of a circuit constant for the duration of a Scan Operation. We note that this method also allows a new type of two-pattern Scan-based tests to be applied. We refer to these tests as fixed-state tests. These tests have several properties that make them effective as complements to skewed-load and broadside tests, and also allows them to be computed efficiently. We discuss these properties in the context of transition faults. We describe procedures for selecting the constant vector for the state inputs during a Scan Operation, and for generating fixed-state tests. We present experimental results to demonstrate the transition fault coverage improvements possible with these tests.
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VTS - AutoScan-Invert: An Improved Scan Design without External Scan Inputs or Outputs
25th IEEE VLSI Test Symmposium (VTS'07), 2007Co-Authors: Irith Pomeranz, Sudhakar M. ReddyAbstract:AutoScan is a design-for-testability approach proposed earlier that uses Scan chains without external Scan inputs or outputs in order to reduce the test application time and test data volume of Scan. We describe three improvements to the basic autoScan design-for-testability approach based on the following observation. Under autoScan, due to the elimination of external Scan inputs, the first flip-flop of a Scan chain can only receive its value from the corresponding next-state line. Thus, its state cannot be controlled directly by a Scan Operation. In the improved autoScan approach, we allow the inverted next-state line to drive the first flip-flop of a Scan chain during Scan Operations. We refer to the improved autoScan approach as autoScan-invert. We describe a Scan synthesis procedure appropriate for autoScan-invert and present experimental results.
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On reducing test application time for Scan circuits using limited Scan Operations and transfer sequences
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005Co-Authors: Yonsang Cho, Irith Pomeranz, Sudhakar M. ReddyAbstract:The test application time of a Scan circuit is a significant factor in the overall test cost of the circuit. Therefore, reducing the test application time is an important problem. The test application time of a test set for a Scan circuit is determined by the sum of the number of Scan shifts required for applying the test set and the number of primary input vectors in the test set. Compaction procedures that view a full-Scan circuit as a combinational circuit reduce the number of test vectors, where a test vector consists of a Scan vector and a primary input vector. However, this is not sufficient, and effective procedures must reduce the number of Scan Operations further than the combinational circuit view allows. Procedures to reduce the test application time by dropping Scan Operations and applying several primary input vectors between Scan Operations have been proposed earlier. The compaction procedures proposed in this work reduce the test application time further by using limited Scan Operations. Under a limited Scan Operation, the number of shifts is smaller than the length of a Scan chain. Scan Operations that cannot be dropped are replaced by limited Scan Operations under the proposed procedures.
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ISQED - Test application time reduction for Scan circuits using limited Scan Operations
SCS 2003. International Symposium on Signals Circuits and Systems. Proceedings (Cat. No.03EX720), 1Co-Authors: Yonsang Cho, I. Pomeranz, Sudhakar M. ReddyAbstract:We describe a static compaction procedure for full-Scan circuits. The procedure accepts a (compact) test set generated for the combinational logic of the circuit and produces a test set with reduced test application time and tester memory, requirements. The reductions are achieved by combining pairs of tests. When a pair of tests is combined, the Scan Operation required between the two tests is replaced with a limited Scan Operation. Under a limited Scan Operation a Scan chain of length L is shifted a number of positions S /spl les/ L. As a special case, S = 0 implies that the Scan Operation between two tests is eliminated altogether. We introduce several techniques to ensure that consideration of test pairs can be done efficiently and results in very high levels of test compaction for benchmark circuits.
Xing Wei - One of the best experts on this subject based on the ideXlab platform.
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Parallel strategy for multiple Scan Operations with data replication
World Wide Web, 2018Co-Authors: Xing Wei, Huichao Duan, Weining Qian, Aoying ZhouAbstract:To support the large-scale analytic for Web applications, the backend distributed data management system must provide the service for accessing massive data. Thus, the Scan Operation becomes a critical step. To improve the performance of Scan Operation, modern data management systems usually rely on the simple partitioned parallelism. Under the partitioned parallelism, tables are consist of several partitions, and each Scan Operation can access multiple partitions separately. It is a simple and effective solution for a single Scan Operation. In this paper, we consider managing multiple Scan Operations together, where the situation is no longer straightforward. To address the problem, we propose the parallel strategy to schedule batched Scan Operations together beyond the simple partitioned parallelism. For the sake of performance, first, we utilize replications to increase the parallelism and propose an effective load balancing strategy over replication nodes based on linear programming. Second, we propose an effective chunk-based scheduling algorithm for multi-threading parallelism on each node to guarantee all threads have even workloads under a qualified cost model. Finally, we integrate our parallel Scan strategy into an open-sourced distributed data management system. Experimental evaluation shows our parallel Scan strategy significantly improves the performance of Scan Operation.
James L. Chao - One of the best experts on this subject based on the ideXlab platform.
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Modification of a Research-Grade FT-IR Spectrometer for Optional Step-Scan Operation
Applied Spectroscopy, 1993Co-Authors: Vasilis G. Gregoriou, James L. Chao, Michael Daun, Mark W. Schauer, Richard A. PalmerAbstract:The implementation of step-Scanning to a research-grade FT-IR spectrometer (Nicolet system 800) is described. This implementation relies on the complete computer control of the retardation, representing a substantial improvement over results from the previous generation of step-Scan spectrometers (IBM IR44) available in our laboratory. Specifically, the instrument represents an improvement in speed, stability, and attainable limit of detection. The most distinctive capability of this instrument is that of high-amplitude phase modulation (tested up to 10 λHeNe peak to peak) at relatively high phase modulation frequency while maintaining high position certainty. Alternatively, the phase modulation can be turned off completely and the retardation can be maintained within ±1 nm for indefinite periods between steps. The step-Scan option for this instrument, along with its continuous-Scan "TRS" (stroboscopic) mode, gives it a unique combination of capabilities for dynamic vibrational spectroscopy. The performance of the instrument in the step-Scan mode is demonstrated with photoacoustic spectroscopy (PAS).
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Use of step-Scan FT-IR to obtain the photoacoustic/photothermal response phase
Infrared Physics, 1992Co-Authors: Christopher J. Manning, Richard A. Palmer, Rebecca M. Dittmar, James L. ChaoAbstract:Abstract This paper describes the extraction of photoacoustic (PA)/photothermal (PT) or other experimental response phase from data measured by step-Scan FT-IR. The signal processing used with step-Scan FT-IR is discussed and contrasted to the signal processing used to extract the experimental phase from data acquired by conventional continuous-Scan FT-IR methods. Step-Scan Operation decouples the FT-IR spectral multiplexing from time, simplifying a variety of time-dependent spectroscopic measurements both conceptually and practically. A consequence of the decoupling is the separation of the temporal phase from the FT-IR instrument (beamsplitter) phase. Data are presented which show clearly that the temporal phase is completely separated from the FT-IR phase by step-Scan. This is in contrast to the case of continuous-Scan FT-IR, in which the phases are added together. In continuous-Scan Operation, a single interferogram, which is the average of a number of Scans, is recorded. Typically, in step-Scan Operation, two interferograms, the in-phase and quadrature responses, are recorded simultaneously point-by-point. The beam splitter phase is the same for both of the step-Scan interferograms, while the temporal response (sample) phase appears as their relative intensities, specifically, the arctangent of their ratio. Photoacoustic and photothermal beam deflection data are presented here as illustrations of the points discussed.
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Step‐Scan Fourier‐transform infrared spectrometer
Review of Scientific Instruments, 1991Co-Authors: Christopher J. Manning, Richard A. Palmer, James L. ChaoAbstract:This article describes the modification of a commercial Fourier‐transform infrared (FT‐IR) spectrometer for step‐Scan Operation. Step‐Scan Operation decouples the FT‐IR spectral multiplexing from time and is therefore applicable to a variety of time‐dependent spectroscopic experiments, including, particularly, photoacoustic and photothermal spectroscopy. The step‐Scan instrument described controls the retardation (moving mirror position) with a feedback loop. The loop uses path difference, or phase, modulation of the reference laser intensity, together with lock‐in amplifiers to detect the mirror position. Since the interferogram can be sampled at intervals as small as 1/4 λHeNe, the maximum free‐spectral range is 31 600 cm−1. For initial positioning of the mirror, stepping can be as rapid as 100 Hz. The current software will allow data collection at ∼1.6 Hz, although the mirror settling time of ≤20 ms would allow data to be collected at 20–30 Hz stepping frequency with more efficient software. The mirror...
