The Experts below are selected from a list of 3060 Experts worldwide ranked by ideXlab platform
Jie Jiang - One of the best experts on this subject based on the ideXlab platform.
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dual in plane gate oxide based thin film transistors with tunable threshold voltage
Applied Physics Letters, 2011Co-Authors: Jie Jiang, Guodong WuAbstract:Dual in-plane-gate oxide-based thin-film transistors (TFTs) are self-assembled on SiO2-based solid-electrolytes by only one Shadow Mask. The unique feature of such TFTs is that indium-tin-oxide (ITO) channel and four ITO electrodes can be deposited simultaneously. Threshold voltage can be effectively tuned from −0.55 V to 0.76 V when the second in-plane gate bias switches from 3.0 V to −2.0 V. Such dual-gate TFTs exhibit a large current on/off ratio (>106) and a small subthreshold swing (<200 mV/decade). A model based on three gate capacitors is proposed to further understand the operation mechanism of such devices.
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in plane gate indium tin oxide thin film transistors self assembled on paper substrates
Applied Physics Letters, 2011Co-Authors: Jie Jiang, Bin ZhouAbstract:Oxide-based thin-film transistors (TFTs) with in-plane gate structure are self-assembled on paper substrates at room temperature by using only one nickel Shadow Mask. Indium-tin-oxide (ITO) channel and ITO electrodes (gate, source, and drain) can be deposited simultaneously without precise photolithography and alignment process. The equivalent field-effect mobility, subthreshold swing, and on/off ratio of such paper TFTs are estimated to be 22.4 cm2/V s, 192 mV/decade, and 8×105, respectively. A model based on two capacitors in series is proposed to further understand the operation mechanism.
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self assembled in plane gate oxide based homojunction thin film transistors
IEEE Electron Device Letters, 2011Co-Authors: Jie Jiang, Bin Zhou, Aixia LuAbstract:In-plane gate homojunction thin-film transistors (TFTs) with patterned channel are self-assembled on SiO2-based solid electrolytes with only one nickel Shadow Mask. All indium-tin oxide channel and electrodes (source, drain, and gate) are deposited simultaneously by one-step magnetron sputtering, and no alignment is necessary. Such TFTs exhibited a good performance with a low operation voltage of 2.0 V, a large field-effect mobility of 28.7 cm2/V·s, a low subthreshold swing of 125 mV/decade, and a large on-off ratio of 1.3 × 106, respectively. A two-serial-capacitor model for the low-voltage operation mechanism is proposed and discussed.
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one Shadow Mask self assembled ultralow voltage coplanar homojunction thin film transistors
IEEE Electron Device Letters, 2010Co-Authors: Jia Sun, Jie Jiang, Qing WanAbstract:A self-assembling diffraction method is developed for low-voltage coplanar homojunction thin-film transistor (TFT) fabrication. In this one-Shadow-Mask process, a channel layer can be simultaneously self-assembled between indium-tin-oxide (ITO) source/drain electrodes during magnetron sputtering deposition. When a microporous SiO2-based solid electrolyte is used as the gate dielectric, full-depletion-mode ITO TFTs show an ultralow operation voltage of 1.5 V due to the large specific capacitance (4.44 μF/cm2). A small subthreshold swing of 0.12 V/decade and a large on/off ratio of 106 are obtained. Our results demonstrate that such a simple one-Mask self-assembling method is promising for low-cost TFT fabrication.
Mehmet Remzi Dokmeci - One of the best experts on this subject based on the ideXlab platform.
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A High Aspect Ratio Parylene Micro-Stencil for Large Scale Micro- Patterning for MEMS Applications
2015Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, D. Mao, S. Ryley, Shih-hsien Chao, Chia-ling Chen, Mehmet Remzi DokmeciAbstract:Patterning using a Shadow Mask or Stencil technique is increasingly being utilized for creating microscale patterns on conventional and unconventional surfaces. Previously reported micro-stencils made of rigid or polymeric membranes have various shortcomings and lack precise pattern definition. In this paper, a reusable, high aspect ratio (HAR), flexible parylene-C micro-stencil technology is introduced. To realize this micro-stencil, we have also developed a high aspect ratio polymer etching technology using an ICP tool and with this process, demonstrate features as small as 4 µm. By utilizing SU-8 support pillars as alignment posts, we demonstrate multi Mask alignment with a tolerance of 5-7 µm. The large Young’s Modulus of the Parylene-C material allows the stencil to be reusable. This flexible parylene-C stencil technology will find applications in the fabrication of organic transistors and selective metal deposition onto fragile MEMS devices. This paper will discuss the details of the parylene micro-stencil fabrication process and describe various micropatterning applications
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A reusable high aspect ratio parylene-C Shadow Mask technology for diverse micropatterning applications
Sensors and Actuators A: Physical, 2008Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, S. Sridhar, Ali Khademhosseini, S.-h. Chao, C L Chen, Mehmet Remzi DokmeciAbstract:In this paper, we present a low cost, flexible and reusable parylene-C Shadow Mask technology for diverse micropatterning applications. The smallest feature size of 4 μm is demonstrated and the technology is scalable up to full wafer scale. With the addition of SU-8 pillars, we also demonstrate multiMask processing with an alignment accuracy of about 4-9 μm. To achieve features with fine resolution, a low temperature and high aspect ratio (>8:1) parylene etch process is also developed. Utilizing this Shadow Mask, we successfully patterned proteins and cells on various surfaces (glass, PDMS, methacrylate). High pattern flexibility (structures with different shapes and dimensions are successfully patterned) and patterning on curved PDMS surfaces are also demonstrated. This technology has potential applications for patterning proteins, cells and organic transistors on conventional and/or unconventional substrates. © 2007 Elsevier B.V. All rights reserved.
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A High Aspect Ratio, Flexible, Transparent and Low-Cost Parylene-C Shadow Mask Technology for Micropatterning Applications
TRANSDUCERS 2007 - 2007 International Solid-State Sensors Actuators and Microsystems Conference, 2007Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, S. Sridhar, Ali Khademhosseini, S.-h. Chao, C L Chen, D. Mao, J. Hopwood, S. Ryley, Mehmet Remzi DokmeciAbstract:In this paper, we present a flexible parylene-C Shadow Mask technology for creating microscale patterns on flat and curved surfaces. The smallest feature size of 4 μm is demonstrated and the technology is scalable up to full wafer size. With the addition of SU-8 pillars, we also demonstrate multi Mask processing with an alignment accuracy of about 5-6 μm. To achieve the smallest features, a low temperature and high aspect ratio (>8:1) parylene etch process is also developed. Utilizing this Shadow Mask, we successfully patterned proteins and cells on various surfaces (glass, PDMS, methacrylate) up to 9 times. This technology has potential applications for patterning proteins, cells and organic transistors on conventional and/or unconventional substrates.
Paul Heremans - One of the best experts on this subject based on the ideXlab platform.
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nanoparticle based spray coated silver top contacts for efficient polymer solar cells
Organic Electronics, 2009Co-Authors: Claudio Girotto, Soeren Steudel, Jan Genoe, Barry P Rand, Paul HeremansAbstract:We demonstrate a solution-processed top electrode for large area organic electronic devices. A Ag nanoparticle solution is spray-coated directly on top of an inverted bulk-heterojunction organic solar cell through a Shadow Mask. After sintering the Ag nanoparticle film at 150 °C, a temperature which is compatible with processes on flexible substrates, cells show performances comparable to those of reference devices with evaporated top-contacts.
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integrated Shadow Mask method for patterning small molecule organic semiconductors
Applied Physics Letters, 2006Co-Authors: Stijn De Vusser, Soeren Steudel, Kris Myny, Jan Genoe, Paul HeremansAbstract:We have developed a simple and efficient method for patterning small molecule semiconductors for applications in the field of organic electronics. In our approach, a profile is created using a single layer of photoresist, defining the regions where the organic semiconductor is to be deposited. Subsequent deposition of a small molecule semiconductor results in a discontinuity of the semiconductor film at the photoresist edge. The resulting transistor characteristics have an off current that is systematically below 1pA. We demonstrate both p-type and n-type organic thin-film transistors using this method, using pentacene and copper hexadecafluorophthalocyanine (F16CuPc), respectively.
Selvapraba Selvarasah - One of the best experts on this subject based on the ideXlab platform.
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A High Aspect Ratio Parylene Micro-Stencil for Large Scale Micro- Patterning for MEMS Applications
2015Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, D. Mao, S. Ryley, Shih-hsien Chao, Chia-ling Chen, Mehmet Remzi DokmeciAbstract:Patterning using a Shadow Mask or Stencil technique is increasingly being utilized for creating microscale patterns on conventional and unconventional surfaces. Previously reported micro-stencils made of rigid or polymeric membranes have various shortcomings and lack precise pattern definition. In this paper, a reusable, high aspect ratio (HAR), flexible parylene-C micro-stencil technology is introduced. To realize this micro-stencil, we have also developed a high aspect ratio polymer etching technology using an ICP tool and with this process, demonstrate features as small as 4 µm. By utilizing SU-8 support pillars as alignment posts, we demonstrate multi Mask alignment with a tolerance of 5-7 µm. The large Young’s Modulus of the Parylene-C material allows the stencil to be reusable. This flexible parylene-C stencil technology will find applications in the fabrication of organic transistors and selective metal deposition onto fragile MEMS devices. This paper will discuss the details of the parylene micro-stencil fabrication process and describe various micropatterning applications
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A reusable high aspect ratio parylene-C Shadow Mask technology for diverse micropatterning applications
Sensors and Actuators A: Physical, 2008Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, S. Sridhar, Ali Khademhosseini, S.-h. Chao, C L Chen, Mehmet Remzi DokmeciAbstract:In this paper, we present a low cost, flexible and reusable parylene-C Shadow Mask technology for diverse micropatterning applications. The smallest feature size of 4 μm is demonstrated and the technology is scalable up to full wafer scale. With the addition of SU-8 pillars, we also demonstrate multiMask processing with an alignment accuracy of about 4-9 μm. To achieve features with fine resolution, a low temperature and high aspect ratio (>8:1) parylene etch process is also developed. Utilizing this Shadow Mask, we successfully patterned proteins and cells on various surfaces (glass, PDMS, methacrylate). High pattern flexibility (structures with different shapes and dimensions are successfully patterned) and patterning on curved PDMS surfaces are also demonstrated. This technology has potential applications for patterning proteins, cells and organic transistors on conventional and/or unconventional substrates. © 2007 Elsevier B.V. All rights reserved.
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A High Aspect Ratio, Flexible, Transparent and Low-Cost Parylene-C Shadow Mask Technology for Micropatterning Applications
TRANSDUCERS 2007 - 2007 International Solid-State Sensors Actuators and Microsystems Conference, 2007Co-Authors: Selvapraba Selvarasah, Ahmed Busnaina, S. Sridhar, Ali Khademhosseini, S.-h. Chao, C L Chen, D. Mao, J. Hopwood, S. Ryley, Mehmet Remzi DokmeciAbstract:In this paper, we present a flexible parylene-C Shadow Mask technology for creating microscale patterns on flat and curved surfaces. The smallest feature size of 4 μm is demonstrated and the technology is scalable up to full wafer size. With the addition of SU-8 pillars, we also demonstrate multi Mask processing with an alignment accuracy of about 5-6 μm. To achieve the smallest features, a low temperature and high aspect ratio (>8:1) parylene etch process is also developed. Utilizing this Shadow Mask, we successfully patterned proteins and cells on various surfaces (glass, PDMS, methacrylate) up to 9 times. This technology has potential applications for patterning proteins, cells and organic transistors on conventional and/or unconventional substrates.
Alexander A Shestopalov - One of the best experts on this subject based on the ideXlab platform.
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high resolution organic light emitting diodes patterned via contact printing
ACS Applied Materials & Interfaces, 2016Co-Authors: Jinhai Li, Lisong Xu, Ching Wan Tang, Alexander A ShestopalovAbstract:In this study, we report a contact printing technique that uses polyurethane-acrylate (PUA) polymers as the printing stamps to pattern electroluminescent layers of organic light emitting diodes (OLEDs). We demonstrate that electroluminescent thin films can be printed with high uniformity and resolution. We also show that the performance of the printed devices can be improved via postprinting thermal annealing, and that the external quantum efficiency of the printed devices is comparable with the efficiency of the vacuum-deposited OLEDs. Our results suggest that the PUA-based contact printing can be used as an alternative to the traditional Shadow Mask deposition, permitting manufacturing of OLED displays with the resolution up to the diffraction limit of visible-light emission.
