The Experts below are selected from a list of 309 Experts worldwide ranked by ideXlab platform
Tadeusz Sawik - One of the best experts on this subject based on the ideXlab platform.
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optimal versus heuristic scheduling of Surface Mount Technology lines
International Journal of Production Research, 2004Co-Authors: Waldemar Kaczmarczyk, Tadeusz Sawik, Andreas Schaller, Thomas M TirpakAbstract:This paper presents and compares an exact and a heuristic approach for scheduling of printed wiring board assembly in Surface Mount Technology (SMT) lines. A typical SMT line consists of several assembly stations in series and/or in parallel, separated by finite intermediate buffers. The objective of the scheduling problem is to determine the detailed sequencing and timing of all assembly tasks for each individual board, so as to maximize the line's productivity, which is defined in terms of makespan for a mix of board types. The limited intermediate buffers between stations result in a scheduling problem with machine blocking, where a completed board may remain on a machine and block it until a downstream machine becomes available. In addition, limited machine availability due to scheduled downtimes is considered. The exact approach is based on a mixed integer programming formulation that can be used for optimization of assembly schedules by using commercially available software for integer programming, ...
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SCHEDULING OF PRINTED WIRING BOARD ASSEMBLY IN Surface Mount Technology LINES
Journal of Electronics Manufacturing, 2002Co-Authors: Tadeusz Sawik, Andreas Schaller, Thomas M TirpakAbstract:The paper presents a new mathematical programming approach for scheduling of printed wiring board assembly in SMT (Surface Mount Technology) lines. Various configurations of SMT lines encountered in the electronics industry are described and compared. An SMT line consists of several processing stages in series, separated by finite intermediate buffers, where each stage has one or more identical parallel machines. A board which has completed processing on a machine may remain there and block the machine until a downstream machine becomes available for processing. The objective is to determine an assembly schedule for a mix of board types, so as to complete the boards in minimum time. New mixed integer programming formulations are presented for blocking scheduling of various configurations of SMT lines that are found in the electronics industry. The proposed models can be used for optimization of assembly schedules by using commercially available software for discrete programming. Numerical examples are provided to illustrate the proposed approach. The influence of process time variability and machine breakdowns on an SMT line's performance is discussed.
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balancing and scheduling of Surface Mount Technology lines
International Journal of Production Research, 2002Co-Authors: Tadeusz SawikAbstract:A mixed-integer programming approach to simultaneous or sequential balancing and scheduling of Surface Mount Technology (SMT) lines for printed wiring board (PWB) assembly is presented. The SMT line consists of several processing stages in series separated by finite intermediate buffers, where each stage has one or more identical parallel machines. In the line, different types of PWBs are assembled using various types of electronic components. The components are assigned to feeder slots of a feeder carrier at each placement station. Different types of components occupy a different number of feeder slots. The total number of slots available at each station was limited. The problem objective was to determine an assignment of components to feeder slots at each placement station and to determine an assembly schedule for a mix of board types to complete the boards in minimum time. Numerical examples and some computational results are presented to illustrate applications of the proposed approach.
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mixed integer programming for scheduling Surface Mount Technology lines
International Journal of Production Research, 2001Co-Authors: Tadeusz SawikAbstract:This paper presents new mixed integer programming formulations for blocking scheduling of SMT (Surface Mount Technology) lines for printed wiring board assembly. The SMT line consists of several processing stages in series, separated by finite intermediate buffers, where each stage has one or more identical parallel machines. A board that has completed processing on a machine may remain there and block the machine until a downstream machine becomes available for processing. The objective is to determine an assembly schedule for a mix of board types so as to complete the boards in a minimum time. Scheduling with continuous or with limited machine availability is considered. Numerical examples and some computational results are presented to illustrate applications of the models proposed.
John Gabriel - One of the best experts on this subject based on the ideXlab platform.
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A high concentration photovoltaic module utilizing micro-transfer printing and Surface Mount Technology
2010 35th IEEE Photovoltaic Specialists Conference, 2010Co-Authors: Bruce Furman, Allen Gray, David Kneeburg, Rudolf Bukovnik, Salvatore Bonafede, Matthew A. Meitl, Etienne Menard, Kanchan Ghosal, Wolfgang Wagner, John GabrielAbstract:We describe a high concentration photovoltaic (CPV) module utilizing micro-transfer printed (μ-TP) dual-junction GalnP/GaAs solar cells and an ELO (Epitaxial Lift-Off) process used to fabricate very small cells (30% at 1,000 sun concentration are reported. Coupled with a >80% efficient optical train, module efficiencies greater than 24% have been achieved with dual-junction μ-TP solar cells.
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A high concentration photovoltaic module utilizing micro-transfer printing and Surface Mount Technology
Conference Record of the IEEE Photovoltaic Specialists Conference, 2010Co-Authors: Bruce Furman, Allen Gray, David Kneeburg, Rudolf Bukovnik, Salvatore Bonafede, Matthew A. Meitl, Etienne Menard, Kanchan Ghosal, Wolfgang Wagner, John GabrielAbstract:We describe a high concentration photovoltaic (CPV) module utilizing micro-transfer printed (μ-TP) dual-junction GalnP/GaAs solar cells and an ELO (Epitaxial Lift-Off) process used to fabricate very small cells (<;0.5 mm2) using 1st use and reused GaAs substrates. The benefits of this Technology include high efficiency, simple distributed heat transfer at high concentration ratios, and short optical paths. This approach enables the use of low cost, high reliability Surface Mount assembly of large backplanes for integration into CPV modules. To minimize compound semiconductor use and maximize cell efficiency, we combine plano-convex primary and spherical secondary optics to concentrate sunlight 1000X over a +/-0.8 degree angle of acceptance. Receiver efficiencies of ELO dual-junction GalnP/GaAs cells of >30% at 1,000 sun concentration are reported. Coupled with a >80% efficient optical train, module efficiencies greater than 24% have been achieved with dual-junction μ-TP solar cells.
Glenn R Blackwell - One of the best experts on this subject based on the ideXlab platform.
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Surface Mount Technology and power applications
Proceedings:Electrical Electronics Insulation Conference and Electrical Manufacturing & Coil Winding Conference, 1995Co-Authors: Glenn R BlackwellAbstract:The author describes a half-day short course which introduces attendees to the basics of Surface Mount Technology (SMT), comparing SMT to standard through-hole circuit board design and manufacturing techniques. Examples of equipment specific to SMT board assembly are available for attendees to examine and use. The use of concurrent engineering in sucessful SMT design and manufacturing is discussed. In addition, the course discusses some of the issues necessary to deal with power applications and thermal issues associated with SMT board design. Examples of software useful in thermal analysis of circuit boards are given. An overview of the short course schedule is also given.
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Surface Mount Technology for pc boards
1995Co-Authors: Glenn R Blackwell, James K HollomonAbstract:An Introduction to Surface Mount Technology Surface-Mount Components (SMCs) SMT Manufacturing Methods System Design Considerations for SMT Printed-Wiring Layout UsingSMTs Assembly-Level Packaging and Interconnections Quality Assurance in SMT SMT and Design for Manufacturability Hybrid Circuits and Multi-Chip Modules (MCMs)
Thomas M Tirpak - One of the best experts on this subject based on the ideXlab platform.
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optimal versus heuristic scheduling of Surface Mount Technology lines
International Journal of Production Research, 2004Co-Authors: Waldemar Kaczmarczyk, Tadeusz Sawik, Andreas Schaller, Thomas M TirpakAbstract:This paper presents and compares an exact and a heuristic approach for scheduling of printed wiring board assembly in Surface Mount Technology (SMT) lines. A typical SMT line consists of several assembly stations in series and/or in parallel, separated by finite intermediate buffers. The objective of the scheduling problem is to determine the detailed sequencing and timing of all assembly tasks for each individual board, so as to maximize the line's productivity, which is defined in terms of makespan for a mix of board types. The limited intermediate buffers between stations result in a scheduling problem with machine blocking, where a completed board may remain on a machine and block it until a downstream machine becomes available. In addition, limited machine availability due to scheduled downtimes is considered. The exact approach is based on a mixed integer programming formulation that can be used for optimization of assembly schedules by using commercially available software for integer programming, ...
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SCHEDULING OF PRINTED WIRING BOARD ASSEMBLY IN Surface Mount Technology LINES
Journal of Electronics Manufacturing, 2002Co-Authors: Tadeusz Sawik, Andreas Schaller, Thomas M TirpakAbstract:The paper presents a new mathematical programming approach for scheduling of printed wiring board assembly in SMT (Surface Mount Technology) lines. Various configurations of SMT lines encountered in the electronics industry are described and compared. An SMT line consists of several processing stages in series, separated by finite intermediate buffers, where each stage has one or more identical parallel machines. A board which has completed processing on a machine may remain there and block the machine until a downstream machine becomes available for processing. The objective is to determine an assembly schedule for a mix of board types, so as to complete the boards in minimum time. New mixed integer programming formulations are presented for blocking scheduling of various configurations of SMT lines that are found in the electronics industry. The proposed models can be used for optimization of assembly schedules by using commercially available software for discrete programming. Numerical examples are provided to illustrate the proposed approach. The influence of process time variability and machine breakdowns on an SMT line's performance is discussed.
L. Rinzel - One of the best experts on this subject based on the ideXlab platform.
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Plastic solder paste stencil for Surface Mount Technology
Twenty Sixth IEEE CPMT International Electronics Manufacturing Technology Symposium (Cat. No.00CH37146), 2000Co-Authors: C.k. Wong, D.j. Waldorf, L. RinzelAbstract:Solder paste masks or stencils are an integral part of the manufacturing process for Surface Mount PCBs. This study examines the feasibility of a process for rapid creation of a solder paste stencil using thermoplastic material. CNC laser cutting of the stencil geometry is replacing traditional use of chemical etching on metal sheets to produce stencils. Laser cutting has been used to improve process speed, accuracy, and cost. This research attempts to continue to simplify and reduce costs in the stencil making process by proposing as the stencil material a common thermoplastic that can be cut easily and quickly using a low-power rapid-prototyping laser process. The effects of several variables on the success of the process are experimentally tested to determine a feasible solution. Various solder pastes and solder material characteristics are studied for their effect on the new material. Stencil dimensions, including thickness and aperture characteristics, are examined. Several key process factors are also varied in the tests to determine recommendations for settings such as print direction, alignment procedures, squeegee pressure and attack angle, print speed, and stencil release method. Subjective evaluation is also made of important qualities of the paste in reaction to the new material, including paste roll and consistency, paste volume, adherence, and instances of cold slumping. The resulting process is demonstrated by producing plastic stencils on a rapid prototyping laser housed in the Cal Poly laboratories. Cost, cycle time, and performance characteristics of the plastic stencil are estimated.
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Robustness of advanced Surface Mount Technology for space applications
1998 IEEE Aerospace Conference Proceedings (Cat. No.98TH8339), 1998Co-Authors: W D Bjorndahl, K Selk, W Chen, L. RinzelAbstract:Advanced Surface Mount Technology, which includes ball grid array packaging, is quickly becoming a preferred Technology for ground based applications. Compared to leaded quad flat packs, ball grid array packaging offers increased manufacturing yields, reduced parasitics and reworkability. Reliability for space applications is an issue which is being aggressively worked. A methodology for examination of various part type/size/board combinations in terms of thermal cycle reliability has been previously developed (1997). Important factors in determining this reliability are: thermal expansion differences between component packages and the printed wiring board (PWB), processes and materials used in creating the interconnect, and the overall package size dimensions. This paper reviews literature data on the reliability of the advanced Surface Mountable package/board level interconnect. Experimental data are presented to indicate the importance of board level design and package selection in order to effect optimal reliability. The experimental results were fit to a two parameter Weibull model. The boards containing a constraining core provided a factor of 2 increase in thermal cycle robustness over the conventional glass-epoxy/copper board. The results indicate that the material stack-up within a PWB can have a significant effect on Surface Mount reliability.
