The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform
Arlindo L Oliveira - One of the best experts on this subject based on the ideXlab platform.
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techniques for the creation of digital watermarks in sequential circuit designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001Co-Authors: Arlindo L OliveiraAbstract:We present a methodology for the watermarking of synchronous sequential circuits that makes it possible to identify the authorship of designs by imposing a digital watermark on the state Transition Graph (STG) of the circuit. The methodology is applicable to sequential designs that are made available as firm intellectual property, the designation commonly used to characterize designs specified as structural hardware description languages or circuit netlists. The watermarking is obtained by manipulating the STG of the design in such a way as to make it exhibit a chosen property that is extremely rare in nonwatermarked circuits while, at the same time, not changing the functionality of the circuit. This manipulation is performed without ever actually computing this Graph in either implicit or explicit form. Instead, the digital watermark is obtained by direct manipulation of the circuit description. We present evidence that no known algorithms for circuit manipulation can be used to efficiently remove or change the watermark and that the process is immune to a variety of other attacks. We present both theoretical and experimental results that show that the watermarking can be created and verified efficiently. We also test possible attack strategies and verify that they are inapplicable to realistic designs of medium to large complexity.
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robust techniques for watermarking sequential circuit designs
Design Automation Conference, 1999Co-Authors: Arlindo L OliveiraAbstract:We present a methodology for the watermarking of synchronous sequential circuits that makes it possible to identify the authorship of designs by imposing a digital watermark on the state Transition Graph of the circuit. The methodology is applicable to sequential designs that are made available as firm Intellectual Property (IP), the designation commonly used to characterize designs specified as structural descriptions or circuit netlists. The watermarking is obtained by manipulating the state Transition Graph of the design in such a way as to make it exhibit a chosen property that is extremely rare in non-watermarked circuits, while, at the same time, not changing the functionality of the circuit. This manipulation is performed without ever actually computing this Graph in either implicit or explicit form. We present both theoretical and experimental results that show that the watermarking can be created and verified efficiently.
Alberto Sangiovannivincentelli - One of the best experts on this subject based on the ideXlab platform.
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a unified signal Transition Graph model for asynchronous control circuit synthesis
International Conference on Computer Aided Design, 1992Co-Authors: Alexandre Yakovlev, L Lavagno, Alberto SangiovannivincentelliAbstract:Characterization of the behavior of an asynchronous system depending on the delay of components and wires is a major task facing designers. Some of these delays are outside the designer's control, and in practice may have to be assumed unbounded. The existing literature offers a number of analysis and specification models, but lacks a unified framework to verify directly if the circuit specification admits a correct implementation under these hypotheses.
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linear programming for optimum hazard elimination in asynchronous circuits
International Conference on Computer Design, 1992Co-Authors: L Lavagno, Alberto SangiovannivincentelliAbstract:It is shown that hazards can be optimally eliminated from circuits synthesized starting with a signal Transition Graph (STG) specification. The proposed approach is based on a linear programming (or integer linear programming) formulation, and as such it can be solved efficiently and optimally for a variety of cost functions. Suggested cost functions optimize either the total padded delay, an estimate of the increase in area, or the maximum cycle time of the complete system. It is also shown that delay padding on all fanouts of STG signals is a necessary and sufficient condition for hazard elimination if the structure and delay of each combinational logic block cannot be changed. Experimental results indicate that the improvements obtained are well worth the added complexity of linear program solution. >
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solving the state assignment problem for signal Transition Graphs
Design Automation Conference, 1992Co-Authors: L Lavagno, Cho W Moon, Robert K Brayton, Alberto SangiovannivincentelliAbstract:The authors propose a novel framework to solve the state assignment problem arising from the signal Transition Graph (STG) representation of an asynchronous circuit. They first solve the STG state assignment problem by minimizing the number of states in the corresponding finite-state machine (FSM) and by using a critical race-free state assignment technique. State signal Transitions may be added to the original STG. A lower bound on the number of signals necessary to implement the STG is given. The technique significantly increases the applicability of STGs for specifying asynchronous circuits. >
L Lavagno - One of the best experts on this subject based on the ideXlab platform.
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A unified signal Transition Graph model for asynchronous control circuit synthesis
Formal Methods in System Design, 1996Co-Authors: Alexandre Yakovlev, L Lavagno, Alberto Sangiovanni-vincentelliAbstract:Characterization of the behavior of an asynchronous system depending on the delay of components and wires is a major task facing designers. Some of these delays are outside the designer's control, and in practice may have to be assumed unbounded. The existing literature offers a number of analysis and specification models, but lacks a unified framework to verify directly if the circuit specification admits a correct implementation under these hypotheses. Our aim is to fill exactly this gap, offering both low-level (analysis-oriented) and high-level (specification-oriented) models for asynchronous circuits and the environment where they operate, together with strong equivalence results between the properties at the two levels. One interesting side result is the precise characterization of classical static and dynamic hazards in terms of our model. Consequently the designer can check the specification and directly decide if the behavior of any implementation will depend, e.g., on the delays of the signals described by such specification. We also outline a design methodology based on our models, pointing out how they can be used to select appropriate high and low-level models depending on the desired characteristics of the system.
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a unified signal Transition Graph model for asynchronous control circuit synthesis
International Conference on Computer Aided Design, 1992Co-Authors: Alexandre Yakovlev, L Lavagno, Alberto SangiovannivincentelliAbstract:Characterization of the behavior of an asynchronous system depending on the delay of components and wires is a major task facing designers. Some of these delays are outside the designer's control, and in practice may have to be assumed unbounded. The existing literature offers a number of analysis and specification models, but lacks a unified framework to verify directly if the circuit specification admits a correct implementation under these hypotheses.
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linear programming for optimum hazard elimination in asynchronous circuits
International Conference on Computer Design, 1992Co-Authors: L Lavagno, Alberto SangiovannivincentelliAbstract:It is shown that hazards can be optimally eliminated from circuits synthesized starting with a signal Transition Graph (STG) specification. The proposed approach is based on a linear programming (or integer linear programming) formulation, and as such it can be solved efficiently and optimally for a variety of cost functions. Suggested cost functions optimize either the total padded delay, an estimate of the increase in area, or the maximum cycle time of the complete system. It is also shown that delay padding on all fanouts of STG signals is a necessary and sufficient condition for hazard elimination if the structure and delay of each combinational logic block cannot be changed. Experimental results indicate that the improvements obtained are well worth the added complexity of linear program solution. >
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solving the state assignment problem for signal Transition Graphs
Design Automation Conference, 1992Co-Authors: L Lavagno, Cho W Moon, Robert K Brayton, Alberto SangiovannivincentelliAbstract:The authors propose a novel framework to solve the state assignment problem arising from the signal Transition Graph (STG) representation of an asynchronous circuit. They first solve the STG state assignment problem by minimizing the number of states in the corresponding finite-state machine (FSM) and by using a critical race-free state assignment technique. State signal Transitions may be added to the original STG. A lower bound on the number of signals necessary to implement the STG is given. The technique significantly increases the applicability of STGs for specifying asynchronous circuits. >
Muhittin Mungan - One of the best experts on this subject based on the ideXlab platform.
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state Transition Graph of the preisach model and the role of return point memory
Physical Review E, 2020Co-Authors: Mert M Terzi, Muhittin MunganAbstract:The Preisach model has been useful as a null model for understanding memory formation in periodically driven disordered systems. In amorphous solids, for example, the athermal response to shear is due to localized plastic events (soft spots). As shown recently by Mungan et al. [Phys. Rev. Lett. 123, 178002 (2019)PRLTAO0031-900710.1103/PhysRevLett.123.178002], the plastic response to applied shear can be rigorously described in terms of a directed network whose Transitions correspond to one or more soft spots changing states. The topology of this Graph depends on the interactions between soft spots and when such interactions are negligible, the resulting description becomes that of the Preisach model. A first step in linking Transition Graph topology with the underlying soft-spot interactions is therefore to determine the structure of such Graphs in the absence of interactions. Here we perform a detailed analysis of the Transition Graph of the Preisach model. We highlight the important role played by return-point memory in organizing the Graph into a hierarchy of loops and subloops. Our analysis reveals that the topology of a large portion of this Graph is actually not governed by the values of the switching fields that describe the hysteretic behavior of the individual elements but by a coarser parameter, a permutation ρ which prescribes the sequence in which the individual hysteretic elements change their states as the main hysteresis loop is traversed. This in turn allows us to derive combinatorial properties, such as the number of major loops in the Transition Graph as well as the number of states |R| constituting the main hysteresis loop and its nested subloops. We find that |R| is equal to the number of increasing subsequences contained in the permutation ρ.
Yunzhi Wang - One of the best experts on this subject based on the ideXlab platform.
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intrinsic coupling between twinning plasticity and transformation plasticity in metastable β ti alloys a symmetry and pathway analysis
Acta Materialia, 2020Co-Authors: Yipeng Gao, Yufeng Zheng, H L Fraser, Yunzhi WangAbstract:Abstract In addition to conventional dislocation plasticity, mechanical twinning and structural phase transformations are another two important plasticity carriers. Although both are symmetry-breaking processes and theories to treat each of them individually have been well-established, the intrinsic coupling between the two has not been investigated. Here we employ a phase Transition Graph approach to analyze systematically deformation modes arising from the interplay between mechanical twinning and phase transformations. Using metastable β Ti-alloys as an example, we show that mechanical twinning and phase transformations are intrinsically coupled in the symmetry-breaking processes, which results in multiple interconnected transformation and non-transformation deformation pathways and characteristic twinning modes. This work not only reveals the physical origin of unique twinning modes (e.g., {332}, {5 8 11} and {3 9 10} twins) and extended core structures of twin boundaries (e.g., nested twins) observed in experiments, but also provides a new insight into the enhanced plasticity of metastable β Ti-alloys through coupled twinning and transformation pathway engineering.
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A universal symmetry criterion for the design of high performance ferroic materials
Acta Materialia, 2017Co-Authors: Yipeng Gao, Suliman A. Dregia, Yunzhi WangAbstract:The symmetry of a crystal has profound effects on its physical properties and so does symmetry-breaking on the characteristics of a phase Transition from one crystal structure to another. For an important class of smart materials, the ferroics, their functionality and performance are associated with cycles of Transitions from multiple structural states of one phase to those of the other. Using group and Graph theories, we construct phase Transition Graph (PTG) and show that both the functionality and performance of ferroics are dictated by the topology of their PTGs. In particular, we demonstrate how the giant piezoelectricity in ferroelectrics and the functional fatigue in shape memory alloys (SMAs) are related to their unique PTG topological features. Using PTG topology as a guide, we evaluate systematically new systems potentially having giant piezoelectricities and giant electro- and magneto-strictions and discuss the design strategies for high performance SMAs with much improved functional fatigue resistance.
