The Experts below are selected from a list of 6339 Experts worldwide ranked by ideXlab platform
Simon Jones - One of the best experts on this subject based on the ideXlab platform.
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Vectorisation avoidance
Sigplan Notices, 2013Co-Authors: Gabriele Keller, Manuel M T Chakravarty, Roman Leshchinskiy, Ben Lippmeier, Simon JonesAbstract:Flattening nested parallelism is a vectorising code transform that converts irregular nested parallelism into flat data parallelism. Although the result has good asymptotic performance, flattening thoroughly restructures the code. Many intermediate data structures and traversals are introduced, which may or may not be eliminated by subsequent optimisation. We present a novel program analysis to identify parts of the program where flattening would only introduce overhead, without appropriate gain. We present empirical evidence that avoiding Vectorisation in these cases leads to more efficient programs than if we had applied Vectorisation and then relied on array fusion to eliminate intermediates from the resulting code.
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work efficient higher order Vectorisation
International Conference on Functional Programming, 2012Co-Authors: Ben Lippmeier, Manuel M T Chakravarty, Roman Leshchinskiy, Gabriele Keller, Simon JonesAbstract:Existing approaches to higher-order Vectorisation, also known as flattening nested data parallelism, do not preserve the asymptotic work complexity of the source program. Straightforward examples, such as sparse matrix-vector multiplication, can suffer a severe blow-up in both time and space, which limits the practicality of this method. We discuss why this problem arises, identify the mis-handling of index space transforms as the root cause, and present a solution using a refined representation of nested arrays. We have implemented this solution in Data Parallel Haskell (DPH) and present benchmarks showing that realistic programs, which used to suffer the blow-up, now have the correct asymptotic work complexity. In some cases, the asymptotic complexity of the vectorised program is even better than the original.
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ICFP - Work efficient higher-order Vectorisation
Proceedings of the 17th ACM SIGPLAN international conference on Functional programming - ICFP '12, 2012Co-Authors: Ben Lippmeier, Manuel M T Chakravarty, Roman Leshchinskiy, Gabriele Keller, Simon JonesAbstract:Existing approaches to higher-order Vectorisation, also known as flattening nested data parallelism, do not preserve the asymptotic work complexity of the source program. Straightforward examples, such as sparse matrix-vector multiplication, can suffer a severe blow-up in both time and space, which limits the practicality of this method. We discuss why this problem arises, identify the mis-handling of index space transforms as the root cause, and present a solution using a refined representation of nested arrays. We have implemented this solution in Data Parallel Haskell (DPH) and present benchmarks showing that realistic programs, which used to suffer the blow-up, now have the correct asymptotic work complexity. In some cases, the asymptotic complexity of the vectorised program is even better than the original.
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partial Vectorisation of haskell programs
2008Co-Authors: Manuel M T Chakravarty, Roman Leshchinskiy, Simon Jones, Gabriele KellerAbstract:Vectorisation for functional programs, also called the flattening transformation, relies on drastically reordering computations and restructuring the representation of data types. As a result, it only applies to the purely functional core of a fully-fledged functional language, such as Haskell or ML. A concrete implementation needs to apply Vectorisation selectively and integrate vectorised with unvectorised code. This is challenging, as Vectorisation alters the data representation, which must be suitably converted between vectorised and unvectorised code. In this paper, we present an approach to partial Vectorisation that selectively vectorises sub-expressions and data types, and also, enables linking vectorised with unvectorised modules.
Ben Lippmeier - One of the best experts on this subject based on the ideXlab platform.
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Vectorisation avoidance
Sigplan Notices, 2013Co-Authors: Gabriele Keller, Manuel M T Chakravarty, Roman Leshchinskiy, Ben Lippmeier, Simon JonesAbstract:Flattening nested parallelism is a vectorising code transform that converts irregular nested parallelism into flat data parallelism. Although the result has good asymptotic performance, flattening thoroughly restructures the code. Many intermediate data structures and traversals are introduced, which may or may not be eliminated by subsequent optimisation. We present a novel program analysis to identify parts of the program where flattening would only introduce overhead, without appropriate gain. We present empirical evidence that avoiding Vectorisation in these cases leads to more efficient programs than if we had applied Vectorisation and then relied on array fusion to eliminate intermediates from the resulting code.
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work efficient higher order Vectorisation
International Conference on Functional Programming, 2012Co-Authors: Ben Lippmeier, Manuel M T Chakravarty, Roman Leshchinskiy, Gabriele Keller, Simon JonesAbstract:Existing approaches to higher-order Vectorisation, also known as flattening nested data parallelism, do not preserve the asymptotic work complexity of the source program. Straightforward examples, such as sparse matrix-vector multiplication, can suffer a severe blow-up in both time and space, which limits the practicality of this method. We discuss why this problem arises, identify the mis-handling of index space transforms as the root cause, and present a solution using a refined representation of nested arrays. We have implemented this solution in Data Parallel Haskell (DPH) and present benchmarks showing that realistic programs, which used to suffer the blow-up, now have the correct asymptotic work complexity. In some cases, the asymptotic complexity of the vectorised program is even better than the original.
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ICFP - Work efficient higher-order Vectorisation
Proceedings of the 17th ACM SIGPLAN international conference on Functional programming - ICFP '12, 2012Co-Authors: Ben Lippmeier, Manuel M T Chakravarty, Roman Leshchinskiy, Gabriele Keller, Simon JonesAbstract:Existing approaches to higher-order Vectorisation, also known as flattening nested data parallelism, do not preserve the asymptotic work complexity of the source program. Straightforward examples, such as sparse matrix-vector multiplication, can suffer a severe blow-up in both time and space, which limits the practicality of this method. We discuss why this problem arises, identify the mis-handling of index space transforms as the root cause, and present a solution using a refined representation of nested arrays. We have implemented this solution in Data Parallel Haskell (DPH) and present benchmarks showing that realistic programs, which used to suffer the blow-up, now have the correct asymptotic work complexity. In some cases, the asymptotic complexity of the vectorised program is even better than the original.
Jeanmarc Ogier - One of the best experts on this subject based on the ideXlab platform.
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adaptable Vectorisation system based on strategic knowledge and xml representation use
Lecture Notes in Computer Science, 2004Co-Authors: Mathieu Delalandre, Youssouf Saidali, Eric Trupin, Jeanmarc OgierAbstract:This paper presents a Vectorisation system based on the use of strategic knowledge. This one is composed of two parts: a processing library and a graphic user interface. Our processing library is composed of image preprocessing and Vectorisation tools. Our graphic user interface is used for the strategic knowledge acquisition and operationalisation. It allows to construct and to execute scenarios, exploiting any processing of our library, according to documents' contexts and users' adopted strategies. A XML data representation is used, allowing an easy data manipulation. A scenario example is presented for graphics recognition on utility maps.
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GREC - Adaptable Vectorisation System Based on Strategic Knowledge and XML Representation Use
Graphics Recognition. Recent Advances and Perspectives, 2003Co-Authors: Mathieu Delalandre, Youssouf Saidali, Eric Trupin, Jeanmarc OgierAbstract:This paper presents a Vectorisation system based on the use of strategic knowledge. This one is composed of two parts: a processing library and a graphic user interface. Our processing library is composed of image pre-processing and Vectorisation tools. Our graphic user interface is used for the strategic knowledge acquisition and operationalisation. It allows to construct and to execute scenarios, exploiting any processing of our library, according to documents’ contexts and users’ adopted strategies. A XML data representation is used, allowing an easy data manipulation. A scenario example is presented for graphics recognition on utility maps.
Vikramadith Raman - One of the best experts on this subject based on the ideXlab platform.
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using sparse pixel character Vectorisation for optical character recognition
ACST'06 Proceedings of the 2nd IASTED international conference on Advances in computer science and technology, 2006Co-Authors: Qussay A Salih, Vikramadith RamanAbstract:An Optical Character Recognition (OCR) system was designed for reading identification numbers on semiconductor wafers, with speed and accuracy as the main priorities. The algorithm selected for this purpose was the Sparse Pixel Vectorisation algorithm, which was a very fast Vectorisation algorithm due to its nature of having to visit very few pixels. A modified version of this algorithm, the Sparse Pixel Character Vectorisation algorithm (SPCV) was implemented, and it was shown that it served the objectives of the project, by performing high speed OCR.
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ACST - Using sparse pixel character Vectorisation for optical character recognition
2006Co-Authors: Qussay A Salih, Vikramadith RamanAbstract:An Optical Character Recognition (OCR) system was designed for reading identification numbers on semiconductor wafers, with speed and accuracy as the main priorities. The algorithm selected for this purpose was the Sparse Pixel Vectorisation algorithm, which was a very fast Vectorisation algorithm due to its nature of having to visit very few pixels. A modified version of this algorithm, the Sparse Pixel Character Vectorisation algorithm (SPCV) was implemented, and it was shown that it served the objectives of the project, by performing high speed OCR.
Pavel Zemcik - One of the best experts on this subject based on the ideXlab platform.
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ICIP - Diagonal Vectorisation of 2-D wavelet lifting
2014 IEEE International Conference on Image Processing (ICIP), 2014Co-Authors: David Barina, Pavel ZemcikAbstract:With the start of the widespread use of discrete wavelet transform in image processing, the need for its efficient implementation is becoming increasingly more important. This work presents a novel SIMD Vectorisation of 2-D discrete wavelet transform through a lifting scheme. For all of the tested platforms, this Vectorisation is significantly faster than other known methods, as shown in the results of the experiments.
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Diagonal Vectorisation of 2-D wavelet lifting
2014 IEEE International Conference on Image Processing (ICIP), 2014Co-Authors: David Barina, Pavel ZemcikAbstract:With the start of the widespread use of discrete wavelet transform in image processing, the need for its efficient implementation is becoming increasingly more important. This work presents a novel SIMD Vectorisation of 2-D discrete wavelet transform through a lifting scheme. For all of the tested platforms, this Vectorisation is significantly faster than other known methods, as shown in the results of the experiments.
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minimum memory Vectorisation of wavelet lifting
Advanced Concepts for Intelligent Vision Systems, 2013Co-Authors: David Barina, Pavel ZemcikAbstract:With the start of the widespread use of discrete wavelet transform the need for its effective implementation is becoming increasingly more important. This work presents a novel approach to discrete wavelet transform through a new computational scheme of wavelet lifting. The presented approach is compared with two other. The results are obtained on a general purpose processor with 4-fold SIMD instruction set (such as Intel x86-64 processors). Using the frequently exploited CDF 9/7 wavelet, the achieved speedup is about 3× compared to naive implementation.