The Experts below are selected from a list of 54900 Experts worldwide ranked by ideXlab platform
Yinhe Han - One of the best experts on this subject based on the ideXlab platform.
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SmartCap: Using Machine Learning for Power Adaptation of Smartphone's Application Processor
ACM Transactions on Design Automation of Electronic Systems, 2014Co-Authors: Guihai Yan, Yinhe HanAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given that the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, system runtime activities, and computational performance of an Application Processor. We find that there exists a minimal frequency requirement, called “saturated frequency”. Above this frequency, the device consumes more power but provides little improvements in user experience. This study motivates an intelligent self-adaptive scheme, SmartCap, that automatically identifies the most power-efficient state of the Application Processor. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11p to 84p, depending on Applications, with little decline in user experience.
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DATE - SmartCap: user experience-oriented power adaptation for smartphone's Application Processor
Design Automation & Test in Europe Conference & Exhibition (DATE) 2013, 2013Co-Authors: Xueliang Li, Guihai Yan, Yinhe Han, Xiaowei LiAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, the system runtime activities, and the minimal required frequency of an Application Processor. This study motivates an intelligent self-adaptive scheme, SmartCap, which automatically identifies the most power-efficient state of the Application Processor according to system activities. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11% to 84%, depending on Applications, with little decline in user experience.
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smartcap user experience oriented power adaptation for smartphone s Application Processor
Design Automation and Test in Europe, 2013Co-Authors: Guihai Yan, Yinhe HanAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, the system runtime activities, and the minimal required frequency of an Application Processor. This study motivates an intelligent self-adaptive scheme, SmartCap, which automatically identifies the most power-efficient state of the Application Processor according to system activities. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11% to 84%, depending on Applications, with little decline in user experience.
Guihai Yan - One of the best experts on this subject based on the ideXlab platform.
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SmartCap: Using Machine Learning for Power Adaptation of Smartphone's Application Processor
ACM Transactions on Design Automation of Electronic Systems, 2014Co-Authors: Guihai Yan, Yinhe HanAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given that the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, system runtime activities, and computational performance of an Application Processor. We find that there exists a minimal frequency requirement, called “saturated frequency”. Above this frequency, the device consumes more power but provides little improvements in user experience. This study motivates an intelligent self-adaptive scheme, SmartCap, that automatically identifies the most power-efficient state of the Application Processor. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11p to 84p, depending on Applications, with little decline in user experience.
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DATE - SmartCap: user experience-oriented power adaptation for smartphone's Application Processor
Design Automation & Test in Europe Conference & Exhibition (DATE) 2013, 2013Co-Authors: Xueliang Li, Guihai Yan, Yinhe Han, Xiaowei LiAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, the system runtime activities, and the minimal required frequency of an Application Processor. This study motivates an intelligent self-adaptive scheme, SmartCap, which automatically identifies the most power-efficient state of the Application Processor according to system activities. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11% to 84%, depending on Applications, with little decline in user experience.
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smartcap user experience oriented power adaptation for smartphone s Application Processor
Design Automation and Test in Europe, 2013Co-Authors: Guihai Yan, Yinhe HanAbstract:Power efficiency is increasingly critical to battery-powered smartphones. Given the using experience is most valued by the user, we propose that the power optimization should directly respect the user experience. We conduct a statistical sample survey and study the correlation among the user experience, the system runtime activities, and the minimal required frequency of an Application Processor. This study motivates an intelligent self-adaptive scheme, SmartCap, which automatically identifies the most power-efficient state of the Application Processor according to system activities. Compared to prior Linux power adaptation schemes, SmartCap can help save power from 11% to 84%, depending on Applications, with little decline in user experience.
T Fujita - One of the best experts on this subject based on the ideXlab platform.
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A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM
IEEE Journal of Solid-State Circuits, 2011Co-Authors: Yu Kikuchi, T Maeda, Hiroyuki Hara, Hideho Arakida, Hideaki Yamamoto, Yousuke Hagiwara, Makoto Takahashi, Masatoshi Fukuda, Yasuhiro Koshio, T FujitaAbstract:In this paper we introduce a 14-core Application Processor for multimedia mobile Applications, implemented in 40 nm, with a 222 mW H.264 full high-definition (full-HD) video engine, a 124 mW 40 M-polygons/s 3D/2D graphics engine, and a video/audio multiProcessor for various Codecs and image processing. The Application Processor has 25 power domains to achieve coarse-grain power gating for adjusting to the required performance of wide range of multimedia Applications. The simple on-chip power switch circuits perform less than 1 μs switching while reducing rush current. Furthermore, the Stacked Chip SoC (SCS) technology enables rewiring to the DRAM chip during assembly/packaging phase using a wire with 10 μm minimum pitch on Re-Distribution Layer (RDL) using electroplating. The peak memory bandwidth is 10.6 GB/s with an x512b SCS-DRAM interface, and the power consumption of this interface is 3.9 mW at 2.4 GB/s workload.
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a 222mw h 264 full hd decoding Application Processor with x512b stacked dram in 40nm
International Solid-State Circuits Conference, 2010Co-Authors: Yu Kikuchi, Masafumi Takahashi, T Maeda, Hiroyuki Hara, Hideho Arakida, Hideaki Yamamoto, Yousuke Hagiwara, T Fujita, Manabu Watanabe, Takayoshi ShimazawaAbstract:Today's multimedia mobile devices must support a wide range of multimedia Applications in addition to full high-definition (Full-HD) video processing. Conventional hardware engine approaches [1-3] cannot handle new Applications that may be required once the chips are fabricated. We report an Application Processor with a hybrid architecture that combines a software solution with a multi-core Processor [4] for various Applications and a hardware solution with hardware engines for low-power and specific high-performance tasks such as Full-HD video and 3D graphics. Another issue faced in multimedia mobile devices is to achieve high memory bandwidth with low power consumption. DDR memory connections in System-in-Package (SiP) technologies need a large number of I/Os or high interface frequency at the expense of high power consumption. A Chip-on-Chip (CoC) connection using micro-bumps [5] is a power-efficient technology to achieve high memory bandwidth and low power. However, in the case of the conventional CoC technique, customized DRAM chips are necessary, because wiring between a logic chip and a DRAM chip is implemented on the metal layers in the DRAM chip. To use a DRAM chip for multiple logic LSIs, the Stacked-Chip SoC (SCS) technology used for this Application Processor enables rewiring at the assembly/packaging phase using minimum 5µm-pitch metal wiring on the Re-Distribution Layer (RDL). We also report an on-chip power switch with a simple structure that inhibits rush currents. The Application Processor has 25 power domains and controls these domains finely to optimize for various ranges of performance requirements.
Jae Cheol Son - One of the best experts on this subject based on the ideXlab platform.
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a 1 6 ghz quad core Application Processor manufactured in 32 nm high k metal gate process for smart mobile devices
IEEE Communications Magazine, 2013Co-Authors: Sehyun Yang, Youngmin Shin, Jungyul Pyo, Jae Cheol SonAbstract:This article introduces a 32 nm Application Processor designed for the latest high-performance smart handheld devices and discusses its design targets and options. To meet unprecedented levels of performance and data throughput demands, this Processor employs a 200 MHz-1.6 GHz quad-core CPU, a quad-core GPU, a 2-port interleaving DRAM controller, dedicated video/audio/image Processors, a camera/ display controller, and a hierarchical bus. This Processor does it in a given power budget and battery life, and also in a given thermal budget by combining 32 nm high-k metal gate process technology with system-level power management techniques and dynamic thermal management techniques.
Sehyun Yang - One of the best experts on this subject based on the ideXlab platform.
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a 1 6 ghz quad core Application Processor manufactured in 32 nm high k metal gate process for smart mobile devices
IEEE Communications Magazine, 2013Co-Authors: Sehyun Yang, Youngmin Shin, Jungyul Pyo, Jae Cheol SonAbstract:This article introduces a 32 nm Application Processor designed for the latest high-performance smart handheld devices and discusses its design targets and options. To meet unprecedented levels of performance and data throughput demands, this Processor employs a 200 MHz-1.6 GHz quad-core CPU, a quad-core GPU, a 2-port interleaving DRAM controller, dedicated video/audio/image Processors, a camera/ display controller, and a hierarchical bus. This Processor does it in a given power budget and battery life, and also in a given thermal budget by combining 32 nm high-k metal gate process technology with system-level power management techniques and dynamic thermal management techniques.
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a 32nm high k metal gate Application Processor with ghz multi core cpu
International Solid-State Circuits Conference, 2012Co-Authors: Sehyun Yang, Seogjun Lee, Jaeyoung Lee, Jeonglae Cho, Hoijin Lee, Dongsik Cho, Junghun Heo, Sunghoon Cho, Youngmin Shin, Sunghee YunAbstract:Samsung's next-generation 32nm dual/quad-core Exynos™ Processor integrates 2 or 4 ARM-v7A architecture cores, a 2-port DRAM controller and numerous multimedia accelerators and connectivity blocks on the same die. It is an Application Processor (AP) designed to cover a wide variety of mobile Applications and handle unprecedented data-processing throughput and multimedia performance, without sacrificing the battery life or exceeding the thermal power dissipation envelope. The architecture diagram is shown in Fig. 12.1.1 and the die photo for the quad-core configuration is shown in Fig. 12.1.7.
