The Experts below are selected from a list of 228 Experts worldwide ranked by ideXlab platform
Vasundara V Varadan - One of the best experts on this subject based on the ideXlab platform.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Smart Materials and Structures, 1999Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit (ASIC). The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1%. The conversion rate per channel is 100 samples which can be varied too. The chip has built in test equipment (BITE) to verify its operation. It is able to generate frequencies like 8, 4, 2 and 1 MHz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibration type transducers. Sometimes to isolate (galvonic) transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Proceedings of SPIE, 1996Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit. The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1 percent. The conversion rate per channel is 100 samples/second which can be carried too. The chip has a built-in test equipment to verify its operation. It is able to generate frequencies like 8 Mhz, 4Mhz, 2Mhz and 1Mhz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibrating type transducers. Sometimes to isolate transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
Neranjen Ramalingam - One of the best experts on this subject based on the ideXlab platform.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Smart Materials and Structures, 1999Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit (ASIC). The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1%. The conversion rate per channel is 100 samples which can be varied too. The chip has built in test equipment (BITE) to verify its operation. It is able to generate frequencies like 8, 4, 2 and 1 MHz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibration type transducers. Sometimes to isolate (galvonic) transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Proceedings of SPIE, 1996Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit. The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1 percent. The conversion rate per channel is 100 samples/second which can be carried too. The chip has a built-in test equipment to verify its operation. It is able to generate frequencies like 8 Mhz, 4Mhz, 2Mhz and 1Mhz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibrating type transducers. Sometimes to isolate transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
Marvin Onabajo - One of the best experts on this subject based on the ideXlab platform.
-
Survey of Robustness Enhancement Techniques for Wireless Systems-on-a-Chip and Study of Temperature as Observable for Process Variations
Journal of Electronic Testing, 2011Co-Authors: Marvin Onabajo, Didac Gómez, Eduardo Aldrete-vidrio, Diego Mateo, Josep Altet, Jose Silva-martinezAbstract:built-in test and on-chip calibration features are becoming essential for reliable wireless connectivity of next generation devices suffering from increasing process variations in CMOS technologies. This paper contains an overview of contemporary self-test and performance enhancement strategies for single-chip transceivers. In general, a trend has emerged to combine several techniques involving process variability monitoring, digital calibration, and tuning of analog circuits. Special attention is directed towards the investigation of temperature as an observable for process variations, given that thermal coupling through the silicon substrate has recently been demonstrated as mechanism to monitor the performances of analog circuits. Both Monte Carlo simulations and experimental results are presented in this paper to show that circuit-level specifications exhibit correlations with silicon surface temperature changes. Since temperature changes can be measured with efficient on-chip differential temperature sensors, a conceptual outline is given for the use of temperature sensors as alternative process variation monitors.
-
electrothermal design procedure to observe rf circuit power and linearity characteristics with a homodyne differential temperature sensor
IEEE Transactions on Circuits and Systems, 2011Co-Authors: Marvin Onabajo, Josep Altet, E Aldretevidrio, D Mateo, J SilvamartinezAbstract:The focus in this paper is on the extraction of RF circuit performance characteristics from the dc output of an on-chip temperature sensor. Any RF input signal can be applied to excite the circuit under examination because only dissipated power levels are measured, which makes this approach attractive for online thermal monitoring and built-in test scenarios. A fully differential sensor topology is introduced that has been specifically designed for the proposed method by constructing it with a wide dynamic range, programmable sensitivity to dc, and RF power dissipation, as well as compatibility with CMOS technology. This paper also presents an outline of a procedure to model the local electrothermal coupling between heat sources and the sensor, which is used to define the temperature sensor's specifications as well as to predict the thermal signature of the circuit under test. A prototype chip with an RF amplifier and temperature sensor was fabricated in a conventional 0.18-μm CMOS technology. The proposed concepts were validated by correlating RF measurements at 1 GHz with the measured dc voltage output of the on-chip sensor and the simulation results, demonstrating that the RF power dissipation can be monitored and the 1-dB compression point can be estimated with less than 1-dB error. The sensor circuitry occupies a die area of 0.012 mm2, which can be shared when several on-chip locations are observed by placement of multiple temperature-sensing parasitic bipolar devices.
-
Strategies for built-in characterization testing and performance monitoring of analog RF circuits with temperature measurements
Measurement Science and Technology, 2010Co-Authors: Eduardo Aldrete-vidrio, Diego Mateo, Josep Altet, Marvin Onabajo, M. Amine Salhi, Stéphane Grauby, Stefan Dilhaire, Jose Silva-martinezAbstract:This paper presents two approaches to characterize RF circuits with built-in differential temperature measurements, namely the homodyne and heterodyne methods. Both non-invasive methods are analyzed theoretically and discussed with regard to the respective trade-offs associated with practical off-chip methodologies as well as on-chip measurement scenarios. Strategies are defined to extract the center frequency and 1 dB compression point of a narrow-band LNA operating around 1 GHz. The proposed techniques are experimentally demonstrated using a compact and efficient on-chip temperature sensor for built-in test purposes that has a power consumption of 15 μW and a layout area of 0.005 mm2 in a 0.25 μm CMOS technology. Validating results from off-chip interferometer-based temperature measurements and conventional electrical characterization results are compared with the on-chip measurements, showing the capability of the techniques to estimate the center frequency and 1 dB compression point of the LNA with errors of approximately 6% and 0.5 dB, respectively.
-
a current injection built in test technique for rf low noise amplifiers
IEEE Transactions on Circuits and Systems, 2008Co-Authors: Xiaohua Fan, Marvin Onabajo, F O Fernandezrodriguez, J Silvamartinez, E SanchezsinencioAbstract:In this paper, a practical current injection based built-in test (BIT) technique for impedance-matched RF low-noise amplifiers (LNAs) is proposed. A current generation circuit injects the RF test current at the gate of the LNA; this approach has the advantage that the matching network is not affected by the test circuitry. The technique can be used without design changes to measure the voltage gain during on-wafer test and to measure S21 during final test in the presence of gate inductance and package parasitics. Furthermore, the current injection testing technique enables accurate gain measurements in order to detect faulty impedance matching networks. The proposed current-based BIT requires an on-chip voltage source, two on-chip power detectors (PDs), and an accurate external resistor. On-chip or external equipment resources are only required to measure the dc output of the PDs. As a proof of concept, a 2.1-GHz inductor-degenerated common-source LNA with a gain of 23.9 dB was designed in 0.13-mum CMOS technology together with the BIT circuitry (14% area overhead). The gain predicted by the current injection RF BIT agrees with the simulated gain using corner models within 0.8-dB error.
Vijay K Varadan - One of the best experts on this subject based on the ideXlab platform.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Smart Materials and Structures, 1999Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit (ASIC). The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1%. The conversion rate per channel is 100 samples which can be varied too. The chip has built in test equipment (BITE) to verify its operation. It is able to generate frequencies like 8, 4, 2 and 1 MHz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibration type transducers. Sometimes to isolate (galvonic) transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
-
innovative frequency measurement technique used in the design of a single channel frequency to digital converter asic
Proceedings of SPIE, 1996Co-Authors: Neranjen Ramalingam, Vijay K Varadan, Vasundara V VaradanAbstract:The frequency to digital converter (FDC) is an application specific integrated circuit. The chip has been designed to handle one input channel but can easily be expanded to handle multiple channels of frequencies. The channel is capable of measuring frequencies from 100 Hz to 100 kHz. The power consumption of the chip is very low. The frequency measurement accuracy is better than 0.1 percent. The conversion rate per channel is 100 samples/second which can be carried too. The chip has a built-in test equipment to verify its operation. It is able to generate frequencies like 8 Mhz, 4Mhz, 2Mhz and 1Mhz which can be fed as optional clock frequencies depending on the accuracy desired. The FDC chip can be interfaced to a 16 bit bus. To meet these stringent specifications of the FDC chip an innovative frequency measurement technique has been devised called the hybrid technique of frequency measurement. The technique proves to be very accurate and it is found that by varying the sampling rate the range of input frequencies over which this accuracy can be achieved also changes. The specifications are particularly strict so that it is possible to use the chip for any military application for which a very reliable operation is demanded. The FDC chip is hence ideal for control and guidance purposes. The chip has wide ranging applications. In conjunction with sensors such as accelerometers it can be used to design smart sensors. The chip can play a vital role in engine controllers and in pressure measurements using vibrating type transducers. Sometimes to isolate transducers, the output is converted to frequency and isolation is achieved using opto-isolators; then by measuring the frequency using this chip this can be converted to digital information.
J Silvamartinez - One of the best experts on this subject based on the ideXlab platform.
-
electrothermal design procedure to observe rf circuit power and linearity characteristics with a homodyne differential temperature sensor
IEEE Transactions on Circuits and Systems, 2011Co-Authors: Marvin Onabajo, Josep Altet, E Aldretevidrio, D Mateo, J SilvamartinezAbstract:The focus in this paper is on the extraction of RF circuit performance characteristics from the dc output of an on-chip temperature sensor. Any RF input signal can be applied to excite the circuit under examination because only dissipated power levels are measured, which makes this approach attractive for online thermal monitoring and built-in test scenarios. A fully differential sensor topology is introduced that has been specifically designed for the proposed method by constructing it with a wide dynamic range, programmable sensitivity to dc, and RF power dissipation, as well as compatibility with CMOS technology. This paper also presents an outline of a procedure to model the local electrothermal coupling between heat sources and the sensor, which is used to define the temperature sensor's specifications as well as to predict the thermal signature of the circuit under test. A prototype chip with an RF amplifier and temperature sensor was fabricated in a conventional 0.18-μm CMOS technology. The proposed concepts were validated by correlating RF measurements at 1 GHz with the measured dc voltage output of the on-chip sensor and the simulation results, demonstrating that the RF power dissipation can be monitored and the 1-dB compression point can be estimated with less than 1-dB error. The sensor circuitry occupies a die area of 0.012 mm2, which can be shared when several on-chip locations are observed by placement of multiple temperature-sensing parasitic bipolar devices.
-
a current injection built in test technique for rf low noise amplifiers
IEEE Transactions on Circuits and Systems, 2008Co-Authors: Xiaohua Fan, Marvin Onabajo, F O Fernandezrodriguez, J Silvamartinez, E SanchezsinencioAbstract:In this paper, a practical current injection based built-in test (BIT) technique for impedance-matched RF low-noise amplifiers (LNAs) is proposed. A current generation circuit injects the RF test current at the gate of the LNA; this approach has the advantage that the matching network is not affected by the test circuitry. The technique can be used without design changes to measure the voltage gain during on-wafer test and to measure S21 during final test in the presence of gate inductance and package parasitics. Furthermore, the current injection testing technique enables accurate gain measurements in order to detect faulty impedance matching networks. The proposed current-based BIT requires an on-chip voltage source, two on-chip power detectors (PDs), and an accurate external resistor. On-chip or external equipment resources are only required to measure the dc output of the PDs. As a proof of concept, a 2.1-GHz inductor-degenerated common-source LNA with a gain of 23.9 dB was designed in 0.13-mum CMOS technology together with the BIT circuitry (14% area overhead). The gain predicted by the current injection RF BIT agrees with the simulated gain using corner models within 0.8-dB error.
