The Experts below are selected from a list of 3009 Experts worldwide ranked by ideXlab platform
Omid Hashemipour - One of the best experts on this subject based on the ideXlab platform.
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An ultra-low power high gain CMOS OTA for biomedical applications
Analog Integrated Circuits and Signal Processing, 2019Co-Authors: Afifeh Ghaemnia, Omid HashemipourAbstract:An ultra-low power bulk-driven operational transconductance Amplifier circuit for biomedical applications is presented. Higher DC gain and improved slew rate is achieved using double recycling technique, cross-coupled positive feedback configuration and driver transistors to enhance the transconductance of the conventional bulk-driven folded Cascode Amplifier. The post layout simulation of the proposed bulk-driven double recycling OTA in 180 nm CMOS technology, shows a 30 dB DC gain improvement and a 250% enhancement in GBW. The above results are validated using the Monte Carlo process variation and corner case simulations. The Amplifier consumes 145 nW @ 0.6 V supply voltage.
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a high input dynamic range low voltage Cascode current mirror and enhanced phase margin folded Cascode Amplifier
Iranian Conference on Electrical Engineering, 2014Co-Authors: Meysam Akbari, Ardavan Javid, Omid HashemipourAbstract:A new adaptive biased Cascode current mirror is presented. The proposed Cascode current mirror has advantage of simplicity with low voltage operation without using any other bias currents or voltages. With proposed self-biasing configuration, large dynamic input current with high accuracy can be maintained without increasing input resistance or limiting output swing. Also, the proposed low voltage Cascode mirror is incorporated in folded Cascode Amplifier in order to enhance its phase margin (PM). The Enhanced PM Folded Cascode Amplifier has unity gain bandwidth of 84 MHz and consumes 720 μW @ 1.8 V with phase margin of 88˚. The proposed circuits are designed and simulated in standard 0.18μm CMOS technology.
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an ultra low voltage ultra low power fully recycling folded Cascode Amplifier
Iranian Conference on Electrical Engineering, 2014Co-Authors: Meysam Akbari, Omid Hashemipour, Ardavan JavidAbstract:A new ultra-low power fully recycling folded Cascode Amplifier with low supply voltage is presented. The new configuration benefits from higher transconductance, slew rate and gain in comparison with conventional recycling folded Cascode. Furthermore, the phase-margin is enhanced and the input referred noise is reduced in this new configuration. Simulation results in standard 0.18 μm CMOS technology shows that the proposed Amplifier achieves 316% improvement in gain bandwidth and 11 dB boosts in DC gain in comparison with the conventional folded Cascode Amplifier. The Amplifier consumes 240nW @ 0.6 V which make it suitable for low-power biomedical applications.
J Silvamartinez - One of the best experts on this subject based on the ideXlab platform.
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the recycling folded Cascode a general enhancement of the folded Cascode Amplifier
IEEE Journal of Solid-state Circuits, 2009Co-Authors: R Assaad, J SilvamartinezAbstract:A recycling Amplifier architecture based on the folded Cascode transconductance Amplifier is described. The proposed Amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mum CMOS process confirm the theoretical results. When compared to the conventional folded Cascode, and for the same area and power budgets, the proposed Amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mus versus 42.1 V/mus) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.
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enhancing general performance of folded Cascode Amplifier by recycling current
Electronics Letters, 2007Co-Authors: R Assaad, J SilvamartinezAbstract:A modification to the conventional folded Cascode transconductance Amplifier is proposed. The proposed Amplifier has the benefit of achieving a given set of design specifications while consuming a fraction of the power compared to the conventional folded Cascode. Moreover, the proposed modification is robust even for low voltage applications.
G Palmisano - One of the best experts on this subject based on the ideXlab platform.
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a 3 10 ghz low power cmos low noise Amplifier for ultra wideband communication
IEEE Transactions on Microwave Theory and Techniques, 2011Co-Authors: Giuseppina Sapone, G PalmisanoAbstract:A 90-nm CMOS low-noise Amplifier (LNA) for 3-10-GHz ultra-wideband (UWB) applications is presented. The circuit adopts a single-ended dual-stage solution. The first stage is based on a current-reuse topology and performs UWB (3-10 GHz) input matching. The second stage is a Cascode Amplifier with resonant load to enhance gain and reverse isolation. Thanks to both the circuit solution and design approach, the LNA provides input matching, low noise, flat gain, and small group-delay variation in the UWB frequency range at minimum power consumption. The design is also conceived to cope with application issues such as low-cost off-chip interfaces and electrostatic discharge robustness. Measurements exhibit a 12.5-dB power gain in a 7.6-GHz 3-dB bandwidth, a minimum noise figure of 3 dB, a reverse isolation better than 45 dB up to 10.6 GHz, and a record small group-delay variation of ±12 ps. The LNA draws 6 mA from a 1.2-V power supply.
J. Yousuf - One of the best experts on this subject based on the ideXlab platform.
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A Novel Bandwidth Enhancement Technique for Cascode Amplifier
2008 International Symposium on Communications and Information Technologies, 2008Co-Authors: S. Somvanshi, J. YousufAbstract:In this paper, a new technique is presented to increase the bandwidth for a single stage Amplifier. Usually, -3 dB bandwidth of single stage Amplifier is in few MHz. High output impedance and subsequent capacitive loading decrease the bandwidth of Amplifier. The presented technique uses a load which itself acts as bandwidth enhancer. This high speed Amplifier is designed on 180 nm CMOS technology, operates at 2.5 V power supply. This Amplifier is succeeded by an output buffer to achieve a better linearity, high output swing and required output impedance for matching.
Xiao Zhao - One of the best experts on this subject based on the ideXlab platform.
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super current recycling folded Cascode Amplifier with ultra high current efficiency
Integration, 2018Co-Authors: Xiao Zhao, Yongqing Wang, Liyuan DongAbstract:Abstract An ultra-high current efficiency current recycling folded Cascode Amplifier is presented in this paper. To improve the current efficiency of conventional recycling folded Cascode Amplifier, it utilizes adaptive biasing class-AB input stage and local common-mode feedback techniques, leading to a boost in gain-bandwidth and slew rate. Both conventional and proposed recycling folded Cascode Amplifiers are designed on CSMC 180 nm process. Simulation results demonstrate that the proposed current recycling Amplifier achieves 3.2 times the gain-bandwidth and 7.7 times the slew rate that of traditional counterpart with only 25% additional power consumption.
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Multipath recycling method for transconductance enhancement of folded cascade Amplifier
Aeu-international Journal of Electronics and Communications, 2017Co-Authors: Qisheng Zhang, Xiao Zhao, Xinyue Zhang, Qimao ZhangAbstract:Abstract A multipath recycling method to enhance transconductance of the folded Cascode Amplifier is presented in this paper. The proposed method utilizes two idle paths to conduct small signal current, which leads to significant enhancement of transconductance compared to conventional folded cascade structure. Moreover, the improved performance is almost at no expense of power dissipation. The proposed multipath recycling and the conventional Amplifiers are all designed in UMC 0.18 μm CMOS technology. Simulation results demonstrate that the transconductance of the proposed Amplifier is improved by 450% and dc gain enhances 16 dB when compared with the folded Cascode counterpart.
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Transconductance and slew rate improvement technique for current recycling folded Cascode Amplifier
AEU - International Journal of Electronics and Communications, 2016Co-Authors: Xiao Zhao, Qisheng Zhang, Yongqing Wang, Ming DengAbstract:A proposed technique to achieve transconductance and slew rate improvement of current recycling folded Cascode Amplifier is presented in this paper. It adopts the local common-mode feedback structure to increase gain-bandwidth, dc gain and slew rate of conventional recycling current Amplifiers with no additional power dissipation. A proposed Amplifier based on this technique is simulated on UMC 180 nm process. The simulation results demonstrate that the proposed Amplifier achieves a 200% gain-bandwidth, 10 dB dc gain and 100% slew rate improvement with the same power dissipation when compared to the conventional current recycling counterparts.
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Phase-margin enhancement technique for recycling folded Cascode Amplifier
Analog Integrated Circuits and Signal Processing, 2012Co-Authors: Xiao Zhao, Huajun FangAbstract:A novel circuit technique for enhancing the phase-margin of the recycling folded Cascode Amplifier is presented. Compared to the conventional recycling folded cascade, using a high-speed current mirror, the proposed Amplifier offers the advantage of cancellation of the first non-dominant pole, allowing the phase-margin to be enhanced without affecting the bandwidth. The proposed Amplifier was implemented in CSMC standard 0.18 μm CMOS process. Simulation results show that the phase-margin enhancement of 20° is achieved without limiting the bandwidth.
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a transconductance enhanced recycling structure for folded Cascode Amplifier
Analog Integrated Circuits and Signal Processing, 2012Co-Authors: Xiao Zhao, Huajun FangAbstract:This letter is to present a transconductance enhanced recycling structure for folded Cascode Amplifier. The proposed structure introduces a positive feedback path to achieve a significant boost in transconductance without increasing power or area consumption. A folded Cascode Amplifier using the proposed structure was implemented in SMIC standard 65 nm CMOS process. Simulation results show that the proposed Amplifier achieves 400% improvement in gain-bandwidth and 16.6 dB boost in DC gain compared to the conventional folded Cascode.