The Experts below are selected from a list of 105930 Experts worldwide ranked by ideXlab platform
Matthew M Mench - One of the best experts on this subject based on the ideXlab platform.
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in situ current distribution and mass transport analysis via strip Cell Architecture for a vanadium redox flow battery
Journal of Power Sources, 2019Co-Authors: Tugrul Y Ertugrul, Douglas Aaron, Jason T Clement, Yasser Ashraf Gandomi, Matthew M MenchAbstract:Abstract Understanding mass transport mechanisms in VRFB electrodes is critical to improving performance, efficiency, and depth-of-discharge. In this study, diffusion and convection are experimentally investigated in a VRFB test bed using a strip Cell Architecture, having only one straight channel and 1 cm2 active area. To study diffusion and convection-dominated mass transport regimes, various channel depths (0.25, 0.5, 1, 2.5 mm) are employed. The diffusion-dominated condition is imposed with deeper channel depths while convection-dominated condition is achieved with shallower channel depths. It is found that diffusion-dominated Cells have large current gradients; convection-dominated Cells have relatively uniform current distribution from inlet to outlet under a mass transport limited condition. Although increasing flow rate is frequently found to improve electrochemical performance, it is observed that there is no discernible change in current distribution when increasing flow rate in diffusion-dominated VRFB Cells. Pressure drop tests also show that superior electrochemical performance can be achieved with reduced relative pressure drop in convection-dominated Cells. In light of such findings, an optimization point is proposed for the strip Cell Architecture; such a point will vary with any other Architecture and system, but this approach can be applied to any flowing system.
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dramatic performance gains in vanadium redox flow batteries through modified Cell Architecture
Journal of Power Sources, 2012Co-Authors: Douglas Aaron, Qinghua Liu, Zhijiang Tang, G M Grim, Alexander B Papandrew, A Turhan, Thomas A Zawodzinski, Matthew M MenchAbstract:Abstract We demonstrate a vanadium redox flow battery with a peak power density of 557 mW cm −2 at a state of charge of 60%. This power density, the highest reported to date, was obtained with a zero-gap flow field Cell Architecture and non-wetproofed carbon paper electrodes. The electrodes were comprised of stacked sheets of carbon paper and optimized through systematic variation of the total electrode thickness. We anticipate significant reductions in the ultimate system cost of redox flow battery systems based on this design.
A Uruena - One of the best experts on this subject based on the ideXlab platform.
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the impact of silicon solar Cell Architecture and Cell interconnection on energy yield in hot sunny climates
Energy and Environmental Science, 2017Co-Authors: Jan Haschke, Johannes P Seif, Yannick Riesen, Andrea Tomasi, Jean Cattin, Loic Tous, Patrick Choulat, Monica Aleman, Emanuele Cornagliotti, A UruenaAbstract:Extensive knowledge of the dependence of solar Cell and module performance on temperature and irradiance is essential for their optimal application in the field. Here we study such dependencies in the most common high-efficiency silicon solar Cell Architectures, including so-called Aluminum back-surface-field (BSF), passivated emitter and rear Cell (PERC), passivated emitter rear totally diffused (PERT), and silicon heterojunction (SHJ) solar Cells. We compare measured temperature coefficients (TC) of the different electrical parameters with values collected from commercial module data sheets. While similar TC values of the open-circuit voltage and the short circuit current density are obtained for Cells and modules of a given technology, we systematically find that the TC under maximum power-point (MPP) conditions is lower in the modules. We attribute this discrepancy to additional series resistance in the modules from solar Cell interconnections. This detrimental effect can be reduced by using a Cell design that exhibits a high characteristic load resistance (defined by its voltage-over-current ratio at MPP), such as the SHJ Architecture. We calculate the energy yield for moderate and hot climate conditions for each Cell Architecture, taking into account ohmic Cell-to-module losses caused by Cell interconnections. Our calculations allow us to conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-load-resistance ratio.
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The impact of silicon solar Cell Architecture and Cell interconnection on energy yield in hot & sunny climates
Energy & Environmental Science, 2017Co-Authors: Jan Haschke, Johannes P Seif, Yannick Riesen, Andrea Tomasi, Jean Cattin, Loic Tous, Patrick Choulat, Monica Aleman, Emanuele Cornagliotti, A UruenaAbstract:Extensive knowledge of the dependence of solar Cell and module performance on temperature and irradiance is essential for their optimal application in the field. Here we study such dependencies in the most common high-efficiency silicon solar Cell Architectures, including so-called Aluminum back-surface-field (BSF), passivated emitter and rear Cell (PERC), passivated emitter rear totally diffused (PERT), and silicon heterojunction (SHJ) solar Cells. We compare measured temperature coefficients (TC) of the different electrical parameters with values collected from commercial module data sheets. While similar TC values of the open-circuit voltage and the short circuit current density are obtained for Cells and modules of a given technology, we systematically find that the TC under maximum power-point (MPP) conditions is lower in the modules. We attribute this discrepancy to additional series resistance in the modules from solar Cell interconnections. This detrimental effect can be reduced by using a Cell design that exhibits a high characteristic load resistance (defined by its voltage-over-current ratio at MPP), such as the SHJ Architecture. We calculate the energy yield for moderate and hot climate conditions for each Cell Architecture, taking into account ohmic Cell-to-module losses caused by Cell interconnections. Our calculations allow us to conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-load-resistance ratio.
Akira Matsuzawa - One of the best experts on this subject based on the ideXlab platform.
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a 0 5 v single power supply operated high speed boosted and offset grounded data storage bogs sram Cell Architecture
IEEE Transactions on Very Large Scale Integration Systems, 1997Co-Authors: Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira MatsuzawaAbstract:This paper proposes a 0.5 V/100 MHz/sub-5 mW-operated 1-Mbit SRAM Cell Architecture which uses a boosted and offset-grounded data storage (BOGS) scheme. The key target of BOGS is to minimize the charge amount supplied from the embedded charge pump circuits, which are required to boost the effective gate to source voltage (V/sub 0/=V/sub GS/-V/sub T/) up to 0.8 V necessary to achieve 100 MHz operation even at 0.5 V single power supply. Thus, the key low-power strategy of BOGS is "putting the right (higher efficiency) boosted power-supply from charge pump circuit into the right position (less power consumed transistor) in a SRAM Cell." This paper is focused on why BOGS can realize a greater savings of the charge amount supplied from the boosted power-line and can reduce the power dissipation to /spl les/1/30.4 and /spl les/1/3.9 compared to the previously reported negative source-line drive (NSD) scheme and negative word-line drive (NWD) scheme, respectively, while achieving a 0.5 V/100 MHz operation.
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a 0 5 v single power supply operated high speed boosted and offset grounded data storage bogs sram Cell Architecture
International Symposium on Low Power Electronics and Design, 1997Co-Authors: Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira MatsuzawaAbstract:This paper proposes a 0.5 V/100 MHz/sub-5 mW-operated 1-Mbit SRAM Cell Architecture which uses a boosted and offset-grounded data storage (BOGS) scheme. The key target of BOGS is to minimize the charge amount supplied from the embedded charge pump circuits, which are required to boost the effective gate to source voltage V O = V GS - V T ) up to 0.8 V necessary to achieve 100 MHz operation even at 0.5 V single power supply. Thus, the key low-power strategy of BOGS is putting the right (higher efficiency) boosted power-supply from charge pump circuit into the right position (less power consumed transistor) in a SRAM Cell. This paper is focused on why BOGS can realize a greater savings of the charge amount supplied from the boosted power-line and can reduce the power dissipation to ≤ 1/30.4 and ≤ 1/3.9 compared to the previously reported negative source-line drive (NSD) scheme [1] and negative word-line drive (NWD) scheme [2], respectively, while achieving a 0.5 V/100 MHz operation.
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a 0 8 v 100 mhz sub 5 mw operated mega bit sram Cell Architecture with charge recycle offset source driving osd scheme
Symposium on VLSI Circuits, 1996Co-Authors: Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira MatsuzawaAbstract:A 0.8 V/100 MHz/sub-5 mW-operated 1-Mbit SRAM Cell Architecture which uses a charge-recycle offset-source driving (OSD) scheme, is proposed. This paper is focused on why OSD can reduce the power dissipation to /spl les/1/14 compared to the previously reported negative source drive (NSD) scheme, while achieving a 0.8 V/100 MHz operation. OSD features as follows: (1) "parallel shift" of the potential of storage-node pairs V/sub H//V/sub L/ (0.8 V/0 V->1.4 V/0.6 V) for the unselected Cell, (2) source line over-drive (0.6 V->0 V) when accessing the Cell, (3) column-decoded source line drive in wordline (WL) direction, enabling to realize a pseudo cross-point access, and (4) charge-recycling source line drive, making it possible to eliminate the power-loss when resetting the potential of source line (0 V->0.6 V). OSD no longer requires negative-bias (-0.6 V) pumping circuit which has an intolerable-low supply-efficiency at 0.8 V Vcc, necessary to realize the source over-driving, unlike NSD. Thus, OSD can be exploited to realize 75% over-driving of source line (V/sub Gs/=0.8 V->1.4 V) necessary to achieve 100 MHz-operation, without an intolerable power-loss, instead of NSD. To demonstrate the effectiveness of OSD, power consumption comparisons were made between this work and NSD. For all measurements, the same access time conditions were used based on the simulated and measured data of the 0.35 /spl mu/m 1 Mbit-CMOS SRAM (16 K-word/spl times/64-bit). OSD enables a dramatic power reduction of over 93%, while maintaining 100 MHz operation even at 0.8 V Vcc, compared to NSD.
Douglas Aaron - One of the best experts on this subject based on the ideXlab platform.
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in situ current distribution and mass transport analysis via strip Cell Architecture for a vanadium redox flow battery
Journal of Power Sources, 2019Co-Authors: Tugrul Y Ertugrul, Douglas Aaron, Jason T Clement, Yasser Ashraf Gandomi, Matthew M MenchAbstract:Abstract Understanding mass transport mechanisms in VRFB electrodes is critical to improving performance, efficiency, and depth-of-discharge. In this study, diffusion and convection are experimentally investigated in a VRFB test bed using a strip Cell Architecture, having only one straight channel and 1 cm2 active area. To study diffusion and convection-dominated mass transport regimes, various channel depths (0.25, 0.5, 1, 2.5 mm) are employed. The diffusion-dominated condition is imposed with deeper channel depths while convection-dominated condition is achieved with shallower channel depths. It is found that diffusion-dominated Cells have large current gradients; convection-dominated Cells have relatively uniform current distribution from inlet to outlet under a mass transport limited condition. Although increasing flow rate is frequently found to improve electrochemical performance, it is observed that there is no discernible change in current distribution when increasing flow rate in diffusion-dominated VRFB Cells. Pressure drop tests also show that superior electrochemical performance can be achieved with reduced relative pressure drop in convection-dominated Cells. In light of such findings, an optimization point is proposed for the strip Cell Architecture; such a point will vary with any other Architecture and system, but this approach can be applied to any flowing system.
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dramatic performance gains in vanadium redox flow batteries through modified Cell Architecture
Journal of Power Sources, 2012Co-Authors: Douglas Aaron, Qinghua Liu, Zhijiang Tang, G M Grim, Alexander B Papandrew, A Turhan, Thomas A Zawodzinski, Matthew M MenchAbstract:Abstract We demonstrate a vanadium redox flow battery with a peak power density of 557 mW cm −2 at a state of charge of 60%. This power density, the highest reported to date, was obtained with a zero-gap flow field Cell Architecture and non-wetproofed carbon paper electrodes. The electrodes were comprised of stacked sheets of carbon paper and optimized through systematic variation of the total electrode thickness. We anticipate significant reductions in the ultimate system cost of redox flow battery systems based on this design.
Jan Haschke - One of the best experts on this subject based on the ideXlab platform.
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the impact of silicon solar Cell Architecture and Cell interconnection on energy yield in hot sunny climates
Energy and Environmental Science, 2017Co-Authors: Jan Haschke, Johannes P Seif, Yannick Riesen, Andrea Tomasi, Jean Cattin, Loic Tous, Patrick Choulat, Monica Aleman, Emanuele Cornagliotti, A UruenaAbstract:Extensive knowledge of the dependence of solar Cell and module performance on temperature and irradiance is essential for their optimal application in the field. Here we study such dependencies in the most common high-efficiency silicon solar Cell Architectures, including so-called Aluminum back-surface-field (BSF), passivated emitter and rear Cell (PERC), passivated emitter rear totally diffused (PERT), and silicon heterojunction (SHJ) solar Cells. We compare measured temperature coefficients (TC) of the different electrical parameters with values collected from commercial module data sheets. While similar TC values of the open-circuit voltage and the short circuit current density are obtained for Cells and modules of a given technology, we systematically find that the TC under maximum power-point (MPP) conditions is lower in the modules. We attribute this discrepancy to additional series resistance in the modules from solar Cell interconnections. This detrimental effect can be reduced by using a Cell design that exhibits a high characteristic load resistance (defined by its voltage-over-current ratio at MPP), such as the SHJ Architecture. We calculate the energy yield for moderate and hot climate conditions for each Cell Architecture, taking into account ohmic Cell-to-module losses caused by Cell interconnections. Our calculations allow us to conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-load-resistance ratio.
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The impact of silicon solar Cell Architecture and Cell interconnection on energy yield in hot & sunny climates
Energy & Environmental Science, 2017Co-Authors: Jan Haschke, Johannes P Seif, Yannick Riesen, Andrea Tomasi, Jean Cattin, Loic Tous, Patrick Choulat, Monica Aleman, Emanuele Cornagliotti, A UruenaAbstract:Extensive knowledge of the dependence of solar Cell and module performance on temperature and irradiance is essential for their optimal application in the field. Here we study such dependencies in the most common high-efficiency silicon solar Cell Architectures, including so-called Aluminum back-surface-field (BSF), passivated emitter and rear Cell (PERC), passivated emitter rear totally diffused (PERT), and silicon heterojunction (SHJ) solar Cells. We compare measured temperature coefficients (TC) of the different electrical parameters with values collected from commercial module data sheets. While similar TC values of the open-circuit voltage and the short circuit current density are obtained for Cells and modules of a given technology, we systematically find that the TC under maximum power-point (MPP) conditions is lower in the modules. We attribute this discrepancy to additional series resistance in the modules from solar Cell interconnections. This detrimental effect can be reduced by using a Cell design that exhibits a high characteristic load resistance (defined by its voltage-over-current ratio at MPP), such as the SHJ Architecture. We calculate the energy yield for moderate and hot climate conditions for each Cell Architecture, taking into account ohmic Cell-to-module losses caused by Cell interconnections. Our calculations allow us to conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-load-resistance ratio.