The Experts below are selected from a list of 4278 Experts worldwide ranked by ideXlab platform
C R Selvakumar - One of the best experts on this subject based on the ideXlab platform.
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two dimensional analysis of Emitter Resistance in the presence of interfacial oxide breakup in polysilicon Emitter bipolar transistors
IEEE Transactions on Electron Devices, 1992Co-Authors: J S Hamel, D J Roulston, C R Selvakumar, G R BookerAbstract:Two-dimensional computer simulations of the Emitter Resistance and majority carrier current flow in the presence of interfacial oxide breakup in polysilicon Emitter bipolar transistors are shown and compared with published experimental results. The analysis reveals that the behavior of the Emitter Resistance with oxide layer breakup can be adequately predicted only if 2-D majority carrier current flow is taken into account. The interfacial layer plays an important role in determining the Emitter resistivity only in very early stages of oxide layer breakup. Both the experimental data and the analysis reveal a much faster fall-off in Emitter Resistance with oxide layer breakup than previous 1-D dimensional theoretical analyses have suggested. The 2-D majority carrier modeling presented suggests that the Emitter Resistance decreases much more rapidly than the current gain in the early stages of oxide layer breakup. Physical mechanisms which explain the differences in the dependence of the Emitter Resistance and gain on oxide layer breakup are proposed. >
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trade off between Emitter Resistance and current gain in polysilicon Emitter bipolar transistors with intentionally grown interfacial oxide layers
IEEE Electron Device Letters, 1992Co-Authors: J S Hamel, D J Roulston, C R SelvakumarAbstract:Experimental measurements of Emitter Resistance and current gain in polysilicon Emitter bipolar transistors that have received annealing to break up an intentionally grown RCA oxide interfacial layer are presented. An anneal of 900 degrees C for 10 min in a nitrogen ambient of the interfacial layer prior to polysilicon doping resulted in a decrease in Emitter Resistance by approximately a factor of 5, with an increase in base saturation current of only 25% while still maintaining a current gain of around 500. The authors believe that this is the largest trade-off in Emitter Resistance versus current gain demonstrated so far for polysilicon transistors with an RCA interfacial layer. These results support a theory previously proposed by the authors (1991) predicting that significant trade-offs between Emitter Resistance and current gain can be obtained if an intentionally grown interfacial oxide layer in polysilicon Emitter bipolar transistors is annealed so as to induce only partial breakup such that most of the layer remains intact. >
P Ashburn - One of the best experts on this subject based on the ideXlab platform.
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tem studies of polysilicon Emitter bipolar materials devices increased interfacial oxide break up and polysilicon regrowth and decreased Emitter Resistance by fluorine implantation
MRS Proceedings, 1998Co-Authors: C D Marsh, G R Booker, N E Moiseiwitsch, J Schiz, P AshburnAbstract:The role of fluorine (F) in the break-up of the native oxide and the regrowth of As doped poly-Si layers on unpatterned Si wafers and on patterned regions of Si device wafers at temperatures of 900°C to 1000°C are investigated by TEM and by the fabrication of npn poly-Si Emitter bipolar devices. Results for unpatterned wafers with F show i) a 950°C dopant drive-in anneal causes oxide break-up and regrowth after a time suitable for the fabrication of devices, ii) a pre-anneal, before the As implant, further enhances the break-up and regrowth and iii) there is an optimum F dose of 5×1015/cm2. Based on these results poly-Si Emitter bipolar devices were fabricated using F=5×1015/cm2, a pre-anneal and a 900°C As drive-in anneal. The results establish quantitatively the relationship between the interface structures and the specific Emitter Resistance, i.e. with no F there is no break-up or regrowth and the Emitter Resistance is high (114Ωμm2) while with F there is break-up and regrowth and the Emitter Resistance is low (17Ωμm2).
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increased current gain and reduced Emitter Resistance in sige hbts by fluorine or chlorine implantation into a polysilicon Emitter contact
European Solid-State Device Research Conference, 1996Co-Authors: J Schiz, P Ashburn, C D Marsh, N E Moiseiwitsch, G R BookerAbstract:This paper shows that fluorine implantation can be used to reduce the Emitter Resistance in a polysilicon Emitter contact using a thermal budget that is compatible with SiGe technology. The influence of fluorine and chlorine on the base current is also investigated and it is shown that suppression by a factor of ~7 can be obtained in some circumstances.
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the use of an interface anneal to control the base current and Emitter Resistance of p n p polysilicon Emitter bipolar transistors
IEEE Electron Device Letters, 1992Co-Authors: I R C Post, P AshburnAbstract:The effects of an interface anneal on the electrical characteristics of p-n-p polysilicon-Emitter bipolar transistors are reported. For devices with a deliberately grown interfacial oxide layer, an interface anneal at 1100 degrees C leads to a factor of 15 increase in base current, and a factor of 2.5 decrease in Emitter Resistance, compared with an unannealed control device. These results are compared with identical interface anneals performed on n-p-n devices, and it is shown that the increase in base current for p-n-p devices is considerably smaller than that for the n-p-n devices. This result is explained by the presence of fluorine in the p-n-p devices, which accelerates the breakup of the interfacial layer. >
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effects of rapid thermal processing on the current gain and Emitter Resistance of polysilicon Emitter bipolar transistors
IEEE Electron Device Letters, 1991Co-Authors: Luis Castaner, P Ashburn, G R WolstenholmeAbstract:Results of measurements of base current and Emitter Resistance of polysilicon Emitter transistors subjected to different rapid thermal anneal processes of the interfacial layer and different Emitter drive-in times are presented. It is shown that a rapid thermal anneal for temperatures on the order of 1050 degrees C leads to devices in which the base current is essentially independent of the Emitter drive-in time. The Emitter Resistance obtained in devices given this interface anneal is considerably lower than that in devices without the anneal, and hence the values obtained are compatible with the requirements for realizing submicrometer bipolar circuits. >
J S Hamel - One of the best experts on this subject based on the ideXlab platform.
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two dimensional analysis of Emitter Resistance in the presence of interfacial oxide breakup in polysilicon Emitter bipolar transistors
IEEE Transactions on Electron Devices, 1992Co-Authors: J S Hamel, D J Roulston, C R Selvakumar, G R BookerAbstract:Two-dimensional computer simulations of the Emitter Resistance and majority carrier current flow in the presence of interfacial oxide breakup in polysilicon Emitter bipolar transistors are shown and compared with published experimental results. The analysis reveals that the behavior of the Emitter Resistance with oxide layer breakup can be adequately predicted only if 2-D majority carrier current flow is taken into account. The interfacial layer plays an important role in determining the Emitter resistivity only in very early stages of oxide layer breakup. Both the experimental data and the analysis reveal a much faster fall-off in Emitter Resistance with oxide layer breakup than previous 1-D dimensional theoretical analyses have suggested. The 2-D majority carrier modeling presented suggests that the Emitter Resistance decreases much more rapidly than the current gain in the early stages of oxide layer breakup. Physical mechanisms which explain the differences in the dependence of the Emitter Resistance and gain on oxide layer breakup are proposed. >
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trade off between Emitter Resistance and current gain in polysilicon Emitter bipolar transistors with intentionally grown interfacial oxide layers
IEEE Electron Device Letters, 1992Co-Authors: J S Hamel, D J Roulston, C R SelvakumarAbstract:Experimental measurements of Emitter Resistance and current gain in polysilicon Emitter bipolar transistors that have received annealing to break up an intentionally grown RCA oxide interfacial layer are presented. An anneal of 900 degrees C for 10 min in a nitrogen ambient of the interfacial layer prior to polysilicon doping resulted in a decrease in Emitter Resistance by approximately a factor of 5, with an increase in base saturation current of only 25% while still maintaining a current gain of around 500. The authors believe that this is the largest trade-off in Emitter Resistance versus current gain demonstrated so far for polysilicon transistors with an RCA interfacial layer. These results support a theory previously proposed by the authors (1991) predicting that significant trade-offs between Emitter Resistance and current gain can be obtained if an intentionally grown interfacial oxide layer in polysilicon Emitter bipolar transistors is annealed so as to induce only partial breakup such that most of the layer remains intact. >
R J Trew - One of the best experts on this subject based on the ideXlab platform.
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low Emitter Resistance gaas based hbt s without ingaas caps
IEEE Electron Device Letters, 1994Co-Authors: D B Slater, Paul M Enquist, J A Hutchby, A S Morris, R J TrewAbstract:Low Emitter Resistance is demonstrated for AlGaAs/GaAs heterojunction bipolar transistors using Pd/Ge contacts on a GaAs contact layer. The contact resistivity to 2-10/spl times/10/sup 18/ cm/sup -3/ n-type GaAs is 4-1/spl times/10/sup -7/ /spl Omega/-cm/sup 2/. These are comparable to contact resistivities obtained with non-alloyed contacts on InGaAs layers. The non-spiking Pd/Ge contact demonstrates thermal stability and area independent resistivity suitable for scaled devices. The substitution of Pd/Ge for AuGe/Ni GaAs Emitter and collector contacts reduced by an order of magnitude the Emitter-base offset voltage at high current densities and increased f/sub t/ by more than 15% with significantly improved uniformity for devices with 2 and 2.6 /spl mu/m wide Emitters having lengths two, four and six times the width. >
Yujin Chung - One of the best experts on this subject based on the ideXlab platform.
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Low-frequency noise characterization of self-aligned AlGaAs-GaAs heterojunction bipolar transistors with a noise corner frequency below 3 kHz
IEEE Transactions on Microwave Theory and Techniques, 1998Co-Authors: Jin-ho Shin, Yujin ChungAbstract:To find dominant 1/f noise sources, generalized noise analyses have been performed for self-aligned AlGaAs/GaAs heterojunction bipolar transistors (HBT's). For shorted base-Emitter condition, the Resistance fluctuation 1/f noise is dominant, while for open base-Emitter condition, the base-Emitter current 1/f noise is dominant. The collector-Emitter 1/f current noise, though generally considered an important noise source, is negligible. The Resistance 1/f noise stems mainly from the Emitter Resistance fluctuation. Our noise-reduction work is focused on the reduction of the base-Emitter current 1/f noise. We have investigated the base-Emitter-current noise properties as a function of Emitter-base structure and surface passivation condition. It is found that the surface-recombination 1/f noise can be significantly reduced by the heterojunction launcher of the abrupt junction with 30% aluminum mole fraction Emitter. The depleted AlGaAs ledge surface passivation further suppresses the surface-recombination currents. Consequently, we have achieved a very low 1/f noise corner frequency of 2.8 kHz at the collector current density of 10 kA/cm/sup 2/. The dominant noise source of the HBT is not a surface-recombination current, but a bulk current noise. This is the lowest 1/f noise corner frequency among the III-V compound semiconductor transistors, and is comparable to those of low-noise Si bipolar junction transistors (BJTs).