The Experts below are selected from a list of 285 Experts worldwide ranked by ideXlab platform

Sandeep Anand - One of the best experts on this subject based on the ideXlab platform.

  • Evaluation of Vce at inflection point for monitoring bond wire degradation in discrete packaged IGBTs
    IEEE Transactions on Power Electronics, 2017
    Co-Authors: Arun Singh, Anup Anurag, Sandeep Anand
    Abstract:

    A novel scheme is proposed for online condition monitoring of bond wires present in insulated gate bipolar transistor (IGBT) package. The proposed method detects bond wire degradation using on-state collector Emitter Voltage at the inflection point. Previously reported condition monitoring methods based on on-state collector-Emitter Voltage as a precursor of aging require an accurate knowledge of junction temperature which is difficult to measure online during an inverter operation. The key advantage of the proposed scheme is that it monitors the bond wire degradation irrespective of the junction temperature. Therefore, this technique is not affected by increase in junction temperature due to die attach degradation or change in ambient temperature. The proposed scheme is verified experimentally under realistic operating conditions.

Bilal Akin - One of the best experts on this subject based on the ideXlab platform.

  • A Simple Plug-In Circuit for IGBT Gate Drivers to Monitor Device Aging: Toward Smart Gate Drivers
    IEEE Power Electronics Magazine, 2018
    Co-Authors: Syed Huzaif Ali, Anant Shankar Kamath, Bilal Akin
    Abstract:

    In this article, a simple, cost-effective circuit is proposed for in situ monitoring of aging and degradation in discrete IGBT devices through the measurement of on-state collector-Emitter Voltage drop (Vce,on) and gate-threshold Voltage (Vth).

  • Investigation of collector Emitter Voltage characteristics in thermally stressed discrete IGBT devices
    2016 IEEE Energy Conversion Congress and Exposition (ECCE), 2016
    Co-Authors: Syed Huzaif Ali, Serkan Dusmez, Bilal Akin
    Abstract:

    Discrete package Insulated Gate Bipolar Transistor (IGBT) devices are a popular choice for low-medium power converters. Although IGBT power modules have been extensively studied in literature, there exists a major gap for reliability study particularly for discrete devices. Current failure diagnostic tools are not mature enough for failure diagnosis and prognosis in real-time operation based on system condition monitoring. In order to move power conversion technologies forward reliably, this paper investigates the changes in on-state collector-Emitter Voltage drop (V ce , on ) of discrete IGBT devices exposed to thermal cyclic stress. Depending on the dominant aging mechanisms and device structure, V ce , on variation trend is different. In this paper, V ce , on variations of three different IGBT device types, namely, punch through, non-punch through and field stop, are continuously monitored during accelerated aging tests, and their relations to aging mechanisms are identified.

J S Harris - One of the best experts on this subject based on the ideXlab platform.

Hirofumi Akagi - One of the best experts on this subject based on the ideXlab platform.

  • a high speed protection circuit for igbts subjected to hard switching faults
    IEEE Transactions on Industry Applications, 2015
    Co-Authors: Takeshi Horiguchi, Shinichi Kinouchi, Yasushi Nakayama, Takeshi Oi, Hiroaki Urushibata, Shoji Okamoto, Shinji Tominaga, Hirofumi Akagi
    Abstract:

    This paper describes a high-speed protection circuit for insulated-gate bipolar transistors (IGBTs) subjected to hard-switching faults (HSFs). The reverse transfer capacitance depends on the collector–Emitter Voltage, and it produces a significant effect on the switching behavior not only under normal conditions but also under HSF conditions. A gate charge characteristic under HSF conditions differs from that under normal turn-on conditions. Hence, an HSF can be detected by monitoring both the gate–Emitter Voltage and the amount of gate charge during the turn-on transient period. IGBTs can be rapidly protected from destruction by using this method because a blanking time is unnecessary. Simulation and experiment verify the validity of the proposed high-speed protection circuit.

  • a high speed protection circuit for igbts subjected to hard switching faults
    Applied Power Electronics Conference, 2014
    Co-Authors: Takeshi Horiguchi, Shinichi Kinouchi, Yasushi Nakayama, Takeshi Oi, Hiroaki Urushibata, Shoji Okamoto, Shinji Tominaga, Hirofumi Akagi
    Abstract:

    This paper describes a high-speed protection circuit for IGBTs subjected to hard-switching faults (HSF). The reverse transfer capacitance depends on a collector-Emitter Voltage and it produces a significant effect on a switching behavior not only under normal conditions but also under HSF conditions. A gate charge characteristic under HSF conditions differs from that under normal turn-on conditions. Hence, a hard-switching fault can be detected by monitoring both a gate-Emitter Voltage and an amount of gate charge during the turn-on transient period. IGBTs can be rapidly protected from destruction because a blanking time is unnecessary. Simulation and experiment verify the validity of the proposed high-speed protection circuit.

  • A short circuit protection method based on a gate charge characteristic
    2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA), 2014
    Co-Authors: Takeshi Horiguchi, Shinichi Kinouchi, Yasushi Nakayama, Hiroaki Urushibata, Shoji Okamoto, Shinji Tominaga, Hirofumi Akagi
    Abstract:

    This paper describes a high-speed circuit to protect IGBTs against short-circuit faults. The reverse transfer capacitance depends on a collector-Emitter Voltage and it produces a significant effect on a switching behavior under short-circuit fault conditions as well as under normal conditions. A gate charge characteristic under short-circuit fault conditions differs from that under normal turn-on conditions. Hence, hard-switching fault (HSF) can be detected by monitoring both a gate-Emitter Voltage and an amount of gate charge. IGBTs can be rapidly protected from destruction because the protection circuit based on a gate charge characteristic does not require any blanking time. Fault under load can be also detected by almost the same circuit configuration. Simulation and experiment verify the validity of the novel protection circuit based on a gate charge characteristic.

Alexander Heinemann - One of the best experts on this subject based on the ideXlab platform.

  • a study on igbt junction temperature tj online estimation using gate Emitter Voltage vge at turn off
    Microelectronics Reliability, 2014
    Co-Authors: Vinoth Sundaramoorthy, Gernot Riedel, Enea Bianda, Richard Bloch, Franz Zurfluh, Iulian Nistor, Gerold Knapp, Daniele Angelosante, Alexander Heinemann
    Abstract:

    Abstract A novel method is presented for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-Emitter Voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation – without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules. A model has been proposed to extract Tj from Vge measurements. Finally, an IGBT module with semiconductor chips at two different temperatures has been measured using Vge method and this method was found to provide the average junction temperature of all the semiconductor chips.

  • online estimation of igbt junction temperature tj using gate Emitter Voltage vge at turn off
    European Conference on Power Electronics and Applications, 2013
    Co-Authors: Vinoth Sundaramoorthy, Enea Bianda, Richard Bloch, Iulian Nistor, Gerold Knapp, Alexander Heinemann
    Abstract:

    The paper presents a novel method for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-Emitter Voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation - without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules.