The Experts below are selected from a list of 14754 Experts worldwide ranked by ideXlab platform
In-soo Jung - One of the best experts on this subject based on the ideXlab platform.
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The effects of TaN Thickness and strained substrate on the performance and PBTI characteristics of poly-Si/TaN/HfSiON MOSFETs
IEDM Technical Digest. IEEE International Electron Devices Meeting 2004., 1Co-Authors: H.-j. Cho, Hye-lan Lee, Seonghye Park, Hong-sick Park, Taek-soo Jeon, Beom-jun Jin, Sang-bom Kang, Sangjoo Lee, Yi-tae Kim, In-soo JungAbstract:The effects of TaN metal-Gate Thickness on the electrical characteristics of poly-Si/metal-Gate/HfSiON MOSFETs have been investiGated. Too thin TaN was reactive with poly-Si Gate, which led to the formation of Si-doped metal Gate. As a result, the work function of the metal Gate was reduced and the capacitance increased while generating traps in HfSiON films. P-MOSFET using poly-Si/TaN Gate with channel engineering in strained-Si substrate showed threshold voltage of - 0.45 V at W/L= 10/1 /spl mu/m and improved MOSFET characteristics.
H.-j. Cho - One of the best experts on this subject based on the ideXlab platform.
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The effects of TaN Thickness and strained substrate on the performance and PBTI characteristics of poly-Si/TaN/HfSiON MOSFETs
IEDM Technical Digest. IEEE International Electron Devices Meeting 2004., 1Co-Authors: H.-j. Cho, Hye-lan Lee, Seonghye Park, Hong-sick Park, Taek-soo Jeon, Beom-jun Jin, Sang-bom Kang, Sangjoo Lee, Yi-tae Kim, In-soo JungAbstract:The effects of TaN metal-Gate Thickness on the electrical characteristics of poly-Si/metal-Gate/HfSiON MOSFETs have been investiGated. Too thin TaN was reactive with poly-Si Gate, which led to the formation of Si-doped metal Gate. As a result, the work function of the metal Gate was reduced and the capacitance increased while generating traps in HfSiON films. P-MOSFET using poly-Si/TaN Gate with channel engineering in strained-Si substrate showed threshold voltage of - 0.45 V at W/L= 10/1 /spl mu/m and improved MOSFET characteristics.
J. A. Martino - One of the best experts on this subject based on the ideXlab platform.
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GIDL behavior of p- and n-MuGFET devices with different TiN metal Gate Thickness and high-k Gate dielectrics
Solid-State Electronics, 2012Co-Authors: M Galeti, Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Cor ClaeysAbstract:Abstract This work studies the Gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal Gate Thickness and high-k Gate dielectrics. As a result of this analysis, it was observed that a thinner TiN metal Gate showed a larger GIDL due to the different Gate oxide Thickness and a reduced metal Gate work function. In addition, replacing SiON by a high-k dielectric (HfSiON) results for nMuGFETs in a decrease of the GIDL. On the other hand, the impact of the Gate dielectric on the GIDL for p- channel MuGFETs is marginal. The effect of the channel width was also studied, whereby narrow fin devices exhibit a reduced GIDL current in spite of the larger vertical electric field expected for these devices. Finally, comparing the effect of the channel type, an enhanced GIDL current for pMuGFET devices was observed.
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SOI MOSFET Transconductance Behavior from Micro to Nano Era
Semiconductor-On-Insulator Materials for Nanoelectronics Applications, 2011Co-Authors: J. A. Martino, Eddy Simoen, P. G. D. Agopian, Corneel ClaeysAbstract:The transconductance is one of the main device parameters used to analyze the electrical characteristics of the MOSFET. From the transconductance versus Gate voltage characteristic it is possible to extract many electrical and technological parameters like threshold voltage, carrier mobility, electric field mobility degradation and others. However, partially and fully depleted SOI (planar and multi-Gate) devices present second order effects that have to be well understood in order to avoid any mistake of the parameter extraction. This chapter is devoted to show the main second order effects that modify the transconductance behavior from micro to nano era of SOI devices like: partially-depleted, fully depleted, planar and multi-Gate, standard and strained, DTMOS and GC SOI MOSFETs. The impact of the Gate stack composition such as cap layer and metal Gate Thickness is also outlined. For example multiple gm peaks are sometimes observed and can be related with different origins like Gate induced floating body effects, multiple threshold voltages, quantum effects and others.
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Influence of the sidewall crystal orientation, HfSiO nitridation and TiN metal Gate Thickness on n-MuGFETs under analog operation
Solid-State Electronics, 2011Co-Authors: Michele Rodrigues, M Galeti, J. A. Martino, Nadine Collaert, Eddy Simoen, Corneel ClaeysAbstract:Abstract This work characterizes the analog performance of SOI n-MuGFETs with HfSiO Gate dielectric and TiN metal Gate with respect to the influence of the high- k post-nitridation, TiN Thickness and device rotation. A thinner TiN metal Gate is found favorable for improved analog characteristics showing an increase in intrinsic voltage gain. The devices where the high- k material is subjected to a nitridation step indicated a degradation of the Early voltage ( V EA ) values which resulted in a lower voltage gain. The 45° rotated devices have a smaller V EA than the standard ones when a HfSiO dielectric is used. However, the higher transconductance of these devices, due to the increased mobility in the (1 0 0) sidewall orientation, compensates this V EA degradation of the voltage gain, keeping it nearly equal to the voltage gain values of the standard devices.
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Effects of HfSiO nitridation and TiN metal Gate Thickness on p- and n-SOI MuGFETs for analog applications
2010 IEEE International SOI Conference (SOI), 2010Co-Authors: M Galeti, Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Cor ClaeysAbstract:An evaluation of the analog performance of p- and nMuGFETs with different TiN metal Gate Thickness and HfSiO Gate dielectrics with and without post-nitridation has been reported. The devices with HfSiON dielectrics showed a lower transconductance and CET, but a higher V T , which is related to an increased V FB . The post-nitridation also reduces the impact of the different TiN Thicknesses. A higher intrinsic gain is observed for pFETs with a thinner TiN metal Gate and a HfSiO dielectric witch demonstrate overall better analog characteristics.
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Low-frequency noise and static analysis of the impact of the TiN metal Gate Thicknesses on n- and p-channel MuGFETs
Solid-State Electronics, 2010Co-Authors: Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Abdelkarim Mercha, Cor ClaeysAbstract:Abstract The impact of the titanium nitride (TiN) Gate electrode Thickness has been investiGated in n- and p-channel SOI multiple Gate field-effect transistors (MuGFETs) through low-frequency noise, charge pumping and static measurements as well as capacitance–voltage curves. The results suggest that a thicker TiN metal Gate electrode gives rise to a higher EOT, a lower mobility and a higher interface trap density. The devices have also been studied for different back Gate biases where the GIFBE onset occurs at lower front-Gate voltage for thinner TiN metal Gate Thickness and at higher V GF . In addition, it is demonstrated that post-deposition nitridation of the MOCVD HfSiO Gate dielectric exhibits an unexpected trend with TiN Gate electrode Thickness, where a continuous variation of EOT and an increase on the degradation of the interface quality are observed.
Chung-gil Kang - One of the best experts on this subject based on the ideXlab platform.
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The effect of the Gate shape on the microstructural characteristic of the grain size of Al–Si alloy in the semi-solid die casting process
Materials Science and Engineering A-structural Materials Properties Microstructure and Processing, 2006Co-Authors: P.k. Seo, D.u. Kim, Chung-gil KangAbstract:Abstract Semi-solid forming is an attractive process for fabricating sound, weight-reduced automotive parts. Therefore, in this work, die systems of varied Gate shape, Gate width, and Gate Thickness were designed to investiGate the filling characteristics of semi-solid material with a controlled solid fraction. When semi-solid materials with controlled solid fraction of 50% filled inside die cavity, the causes of liquid segregation according to the separation phenomena of solid particles and liquid materials were investiGated. The parts were characterized for eutectic segregation, a segregation band, cracks and shrinkage hole on the part surface. It was found that all these defects could be solved by the selection of the optimal casting speed and selection of Gate shape when the semi-solid material with a controlled solid fraction completely filled the die cavity. The correlation between liquid segregation and a Gate system has been synthetically investiGated with experimental results and theoretical results. The hardness in the primary α zone and the eutectics microstructural zone were measured by nano indentation. The relationship between liquid segregation and hardness was also investiGated.
Cor Claeys - One of the best experts on this subject based on the ideXlab platform.
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GIDL behavior of p- and n-MuGFET devices with different TiN metal Gate Thickness and high-k Gate dielectrics
Solid-State Electronics, 2012Co-Authors: M Galeti, Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Cor ClaeysAbstract:Abstract This work studies the Gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal Gate Thickness and high-k Gate dielectrics. As a result of this analysis, it was observed that a thinner TiN metal Gate showed a larger GIDL due to the different Gate oxide Thickness and a reduced metal Gate work function. In addition, replacing SiON by a high-k dielectric (HfSiON) results for nMuGFETs in a decrease of the GIDL. On the other hand, the impact of the Gate dielectric on the GIDL for p- channel MuGFETs is marginal. The effect of the channel width was also studied, whereby narrow fin devices exhibit a reduced GIDL current in spite of the larger vertical electric field expected for these devices. Finally, comparing the effect of the channel type, an enhanced GIDL current for pMuGFET devices was observed.
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Effects of HfSiO nitridation and TiN metal Gate Thickness on p- and n-SOI MuGFETs for analog applications
2010 IEEE International SOI Conference (SOI), 2010Co-Authors: M Galeti, Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Cor ClaeysAbstract:An evaluation of the analog performance of p- and nMuGFETs with different TiN metal Gate Thickness and HfSiO Gate dielectrics with and without post-nitridation has been reported. The devices with HfSiON dielectrics showed a lower transconductance and CET, but a higher V T , which is related to an increased V FB . The post-nitridation also reduces the impact of the different TiN Thicknesses. A higher intrinsic gain is observed for pFETs with a thinner TiN metal Gate and a HfSiO dielectric witch demonstrate overall better analog characteristics.
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Low-frequency noise and static analysis of the impact of the TiN metal Gate Thicknesses on n- and p-channel MuGFETs
Solid-State Electronics, 2010Co-Authors: Michele Rodrigues, J. A. Martino, Nadine Collaert, Eddy Simoen, Abdelkarim Mercha, Cor ClaeysAbstract:Abstract The impact of the titanium nitride (TiN) Gate electrode Thickness has been investiGated in n- and p-channel SOI multiple Gate field-effect transistors (MuGFETs) through low-frequency noise, charge pumping and static measurements as well as capacitance–voltage curves. The results suggest that a thicker TiN metal Gate electrode gives rise to a higher EOT, a lower mobility and a higher interface trap density. The devices have also been studied for different back Gate biases where the GIFBE onset occurs at lower front-Gate voltage for thinner TiN metal Gate Thickness and at higher V GF . In addition, it is demonstrated that post-deposition nitridation of the MOCVD HfSiO Gate dielectric exhibits an unexpected trend with TiN Gate electrode Thickness, where a continuous variation of EOT and an increase on the degradation of the interface quality are observed.
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Impact of TiN metal Gate Thickness and the HfSiO nitridation on MuGFETs electrical performance
2009 10th International Conference on Ultimate Integration of Silicon, 2009Co-Authors: Michele Rodrigues, Nadine Collaert, Eddy Simoen, Cor Claeys, Abdelkarim Mercha, J. A. MartinoAbstract:In this work, we investiGate the impact of post-deposition nitridation of the MOCVD HfSiO Gate dielectric and the TiN Gate electrode Thickness on the electrical parameters of SOI multiple-Gate FETs (MuGFETs). It is shown that nitridation reduces the EOT, enhances the Gate leakage current and reduces the mobility. Although, HfSiON Gate dielectric can reduce the work function (WF) sensitivity on the TiN metal Gate electrode Thickness.