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Shinichi Takagi - One of the best experts on this subject based on the ideXlab platform.
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channel direction effective field and temperature dependencies of Hole Mobility in 110 oriented ge on insulator p channel metal oxide semiconductor field effect transistors fabricated by ge condensation technique
Journal of Applied Physics, 2011Co-Authors: Sanjeewa Dissanayake, Mitsuru Takenaka, Satoshi Sugahara, Yi Zhao, Shinichi TakagiAbstract:This paper experimentally reports the channel direction (θ), effective field (Eeff), and temperature (T) dependencies of Hole Mobility in (110)-oriented 12-nm-thick accumulation mode Ge-on-insulator (GOI) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) fabricated by the Ge condensation technique. It is found that, the Hole Mobility on (110)-oriented GOI surfaces increases with the channel direction tilted from ⟨100⟩ to ⟨110⟩ direction, in contrast to (100)-oriented conventional GOI surfaces. By low temperature measurements, the extracted phonon-limited mobilities (μph) of (110)-oriented GOI surfaces along ⟨110⟩ direction occupy 2.1 and 7.1 of enhancement against (100)-oriented GOI and Si surfaces, respectively, at any T. Through physical insights into the present analyses, μph dependence on T−1.8 suggests the suppression of intervalley phonon scattering at low T as in Si. Also, μph is found to increase with Eeff, which can be regarded as an inherent property of Hole Mobility on (11...
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evaluation of electron and Hole Mobility at identical metal oxide semiconductor interfaces by using metal source drain ge on insulator metal oxide semiconductor field effect transistors
Japanese Journal of Applied Physics, 2009Co-Authors: Kiyohito Morii, Sanjeewa Dissanayake, Satoshi Tanabe, Ryosho Nakane, Mitsuru Takenaka, Satoshi Sugahara, Shinichi TakagiAbstract:In contrast to high Hole Mobility of p-channel Ge metal–oxide–semiconductor field-effect transistors (MOSFETs), low electron Mobility and poor current drive of n-channel Ge MOSFETs are one of critical issues for realizing Ge complementary metal–oxide–semiconductor (CMOS) technologies. In order to adequately understand the physical origins of the difference in the Ge MOS Mobility behaviors between electrons and Holes, an appropriate Mobility analysis is strongly needed. In this paper, we propose a novel method to extract both electron and Hole Mobility in an identical device by using metal source/drain (S/D) Ge-on-insulator (GOI) MOSFETs. The influence of the parasitic resistance associated with metal S/D junctions is eliminated by using MOSFETs with four-terminal Kelvin patterns. It is demonstrated that the electron and Hole Mobility at the same Ge MOS interfaces are accurately determined. It is found, as a result, that the present Ge n-channel MOSFET has the electron Mobility close to the Si universal electron Mobility. On the other hand, the Hole Mobility at the same MOS interface is lower than the Si universal Hole Mobility, which is attributable to low crystal quality of the channel and/or the poor MOS interface properties. These facts strongly suggest the low electron Mobility in Ge MOSFETs, reported so far, is not necessarily limited by any essential problems, but much higher electron Mobility is expected by further improvement of the material and interface qualities.
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effects of si passivation on ge metal insulator semiconductor interface properties and inversion layer Hole Mobility
Applied Physics Letters, 2008Co-Authors: Noriyuki Taoka, Masatomi Harada, Yoshimi Yamashita, Toyoji Yamamoto, Naoharu Sugiyama, Shinichi TakagiAbstract:The impact of Si passivation (SP) on Ge metal-insulator-semiconductor interface properties and the inversion-layer Mobility of Ge p-type metal-insulator-semiconductor field effect transistors (PMISFETs) were investigated by using the devices with different thicknesses of the SP layers. SP was effective in decreasing the total charged centers instead of the interface traps. As a result, the inversion-layer Hole Mobility of the Ge MISFET was significantly improved by introducing the SP layers of the appropriate thickness. This improvement is attributable to the reduction of the amount of the interface charges and the separation of the positions of mobile carriers and the interface charges by the SP layers.
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advanced soi mosfets with strained si channel for high speed cmos electron Hole Mobility enhancement
Symposium on VLSI Technology, 2000Co-Authors: T Mizuno, N Sugiyama, H Satake, Shinichi TakagiAbstract:In this work, we propose strained-Si MOSFETs on double-layer SiGe films with different Ge contents as high performance p-MOSFETs. Actually, we demonstrate high Hole Mobility enhancement (45% against that in control-SOI MOSFETs and 30% against the universal Mobility) in strained-SOI p-MOSFETs including double-hetero structures (Si/sub 0.82/Ge/sub 0.18//Si/sub 0.9/Ge/sub 0.1/) for the first time. Moreover, it is also demonstrated that the electron Mobility in n-channel strained-SOI MOSFETs is enhanced by about 60%, using single SiGe layer with the Ge content of as low as 10%.
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electron and Hole Mobility enhancement in strained si mosfet s on sige on insulator substrates fabricated by simox technology
IEEE Electron Device Letters, 2000Co-Authors: T Mizuno, Shinichi Takagi, H Satake, Naoharu Sugiyama, Atsushi Kurobe, A ToriumiAbstract:We have newly developed strained-Si MOSFET's on a SiGe-on-insulator (strained-SOI) structure fabricated by separation-by-implanted-oxygen (SIMOX) technology. Their electron and Hole Mobility characteristics have been experimentally studied and compared to those of control SOI MOSFET's. Using an epitaxial regrowth technique of a strained-Si film on a relaxed-Si/sub 0.9/Ge/sub 0.1/ layer and the conventional SIMOX process, strained-Si (20 nm thickness) layer on fully relaxed-SiGe (340 nm thickness)-on-buried oxide (100 nm thickness) was formed, and n-and p-channel strained-Si MOSFET's were successfully fabricated. For the first time, the good FET characteristics were obtained in both n-and p-strained-SOI devices. It was found that both electron and Hole mobilities in strained-SOI MOSFET's were enhanced, compared to those of control SOI MOSFET's and the universal Mobility in Si inversion layer.
Eugene A Fitzgerald - One of the best experts on this subject based on the ideXlab platform.
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Hole Mobility enhancements in nanometer scale strained silicon heterostructures grown on ge rich relaxed si1 xgex
Journal of Applied Physics, 2003Co-Authors: Minjoo L Lee, Eugene A FitzgeraldAbstract:Although strained-silicon (e-Si) p-type metal–oxide–semiconductor field-effect transistors (p-MOSFETs) demonstrate enhanced Hole Mobility compared to bulk Si devices, the enhancement has widely been observed to degrade at large vertical effective fields. We conjecture that the Hole wave function in e-Si heterostructures spreads out over distances of ∼10 nm, even at large inversion densities, due to the strain-induced reduction of the out-of-plane effective mass. Relevant experimental and theoretical studies supporting this argument are presented. We further hypothesize that by growing layers thinner than the Hole wave function itself, inversion carriers can be forced to occupy and hybridize the valence bands of different materials. In this article, we show that p-MOSFETs with thin (i.e., <3 nm) e-Si layers grown on Ge-rich Si1−xGex buffers exhibit markedly different Mobility enhancements from prior e-Si p-MOSFETs. Devices fabricated on a thin e-Si layer grown on relaxed Si0.3Ge0.7 demonstrate Hole Mobility enhancements that increase with gate overdrive, peaking at a value of nearly 3 times. In other devices where the channel region consists of a periodic e-Si/relaxed Si0.3Ge0.7 digital alloy, a nearly constant Mobility enhancement of 2.0 was observed over inversion densities ranging from 3 to 14×1012/cm2.Although strained-silicon (e-Si) p-type metal–oxide–semiconductor field-effect transistors (p-MOSFETs) demonstrate enhanced Hole Mobility compared to bulk Si devices, the enhancement has widely been observed to degrade at large vertical effective fields. We conjecture that the Hole wave function in e-Si heterostructures spreads out over distances of ∼10 nm, even at large inversion densities, due to the strain-induced reduction of the out-of-plane effective mass. Relevant experimental and theoretical studies supporting this argument are presented. We further hypothesize that by growing layers thinner than the Hole wave function itself, inversion carriers can be forced to occupy and hybridize the valence bands of different materials. In this article, we show that p-MOSFETs with thin (i.e., <3 nm) e-Si layers grown on Ge-rich Si1−xGex buffers exhibit markedly different Mobility enhancements from prior e-Si p-MOSFETs. Devices fabricated on a thin e-Si layer grown on relaxed Si0.3Ge0.7 demonstrate Hole mobilit...
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Hole Mobility enhancements and alloy scattering limited Mobility in tensile strained si sige surface channel metal oxide semiconductor field effect transistors
Journal of Applied Physics, 2002Co-Authors: Christopher W Leitz, Minjoo L Lee, Z Y Cheng, Matthew T Currie, D A Antoniadis, Eugene A FitzgeraldAbstract:Strained Si-based metal–oxide–semiconductor field-effect transistors (MOSFETs) are promising candidates for next-generation complementary MOS (CMOS) technology. While electron Mobility enhancements in these heterostructures have been thoroughly investigated, Hole Mobility enhancements have not been explored in as much detail. In this study, we investigate the dependence of Hole Mobility in strained Si MOSFETs on substrate Ge content, strained layer thickness, and channel composition. We show that Hole Mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with peak Mobility enhancements over twice that of coprocessed bulk Si devices. These results represent peak Hole mobilities above 200cm2/V-S. Furthermore, we demonstrate that Hole Mobility in strained Si/relaxed Si0.7Ge0.3 heterostructures displays no strong dependence on strained layer thickness, indicating that strain is the primary variable controlling channel Mobility in strained Si p-type MOSFETs (p-MOSFETs). We then ...
D A Antoniadis - One of the best experts on this subject based on the ideXlab platform.
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width dependent Hole Mobility in top down fabricated si core ge shell nanowire metal oxide semiconductor field effect transistors
Applied Physics Letters, 2010Co-Authors: Pouya Hashemi, D A Antoniadis, Meekyung Kim, John Hennessy, Leonardo Gomez, Judy L HoytAbstract:Si-core/Ge-shell nanowire p-channel metal-oxide-semiconductor-field-effect-transistors with high-permittivity-dielectric/metal-gate have been demonstrated by selective epitaxial growth of Ge thin-films on the Si-nanowires fabricated by a top-down scheme. Cross-sectional transmission-electron-microscopy reveals that the epitaxial Ge shell exhibits hexagonal {111} facets, and that the Ge is defected, particularly near the Si corners. The Hole Mobility increases by 40% as the Si-core size is decreased from 70 to 20 nm. Finite-element simulations of the stress profile induced in the Ge channel by the gate stack suggest that a transformation in the transverse stress component from compression to tension plays a role in the Mobility enhancement.
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Hole Mobility enhancements and alloy scattering limited Mobility in tensile strained si sige surface channel metal oxide semiconductor field effect transistors
Journal of Applied Physics, 2002Co-Authors: Christopher W Leitz, Minjoo L Lee, Z Y Cheng, Matthew T Currie, D A Antoniadis, Eugene A FitzgeraldAbstract:Strained Si-based metal–oxide–semiconductor field-effect transistors (MOSFETs) are promising candidates for next-generation complementary MOS (CMOS) technology. While electron Mobility enhancements in these heterostructures have been thoroughly investigated, Hole Mobility enhancements have not been explored in as much detail. In this study, we investigate the dependence of Hole Mobility in strained Si MOSFETs on substrate Ge content, strained layer thickness, and channel composition. We show that Hole Mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with peak Mobility enhancements over twice that of coprocessed bulk Si devices. These results represent peak Hole mobilities above 200cm2/V-S. Furthermore, we demonstrate that Hole Mobility in strained Si/relaxed Si0.7Ge0.3 heterostructures displays no strong dependence on strained layer thickness, indicating that strain is the primary variable controlling channel Mobility in strained Si p-type MOSFETs (p-MOSFETs). We then ...
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Hole Mobility enhancements in strained si si1 ygey p type metal oxide semiconductor field effect transistors grown on relaxed si1 xgex x y virtual substrates
Applied Physics Letters, 2001Co-Authors: Matthew T Currie, Minjoo L Lee, Z Y Cheng, D A Antoniadis, E A FitzgeraldAbstract:We have achieved peak Hole Mobility enhancement factors of 5.15 over bulk Si in metal-oxide-semiconductor field-effect transistors (MOSFETs) by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates. To further investigate Hole transport in these dual channel structures, we study the effects of strain, alloy scattering, and layer thickness on Hole Mobility enhancements in MOSFETs based upon these layers. We show that significant performance boosts can be obtained despite the effects of alloy scattering and that the best Hole Mobility enhancements are obtained for structures with thin Si surface layers.
Minjoo L Lee - One of the best experts on this subject based on the ideXlab platform.
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Hole Mobility enhancements in nanometer scale strained silicon heterostructures grown on ge rich relaxed si1 xgex
Journal of Applied Physics, 2003Co-Authors: Minjoo L Lee, Eugene A FitzgeraldAbstract:Although strained-silicon (e-Si) p-type metal–oxide–semiconductor field-effect transistors (p-MOSFETs) demonstrate enhanced Hole Mobility compared to bulk Si devices, the enhancement has widely been observed to degrade at large vertical effective fields. We conjecture that the Hole wave function in e-Si heterostructures spreads out over distances of ∼10 nm, even at large inversion densities, due to the strain-induced reduction of the out-of-plane effective mass. Relevant experimental and theoretical studies supporting this argument are presented. We further hypothesize that by growing layers thinner than the Hole wave function itself, inversion carriers can be forced to occupy and hybridize the valence bands of different materials. In this article, we show that p-MOSFETs with thin (i.e., <3 nm) e-Si layers grown on Ge-rich Si1−xGex buffers exhibit markedly different Mobility enhancements from prior e-Si p-MOSFETs. Devices fabricated on a thin e-Si layer grown on relaxed Si0.3Ge0.7 demonstrate Hole Mobility enhancements that increase with gate overdrive, peaking at a value of nearly 3 times. In other devices where the channel region consists of a periodic e-Si/relaxed Si0.3Ge0.7 digital alloy, a nearly constant Mobility enhancement of 2.0 was observed over inversion densities ranging from 3 to 14×1012/cm2.Although strained-silicon (e-Si) p-type metal–oxide–semiconductor field-effect transistors (p-MOSFETs) demonstrate enhanced Hole Mobility compared to bulk Si devices, the enhancement has widely been observed to degrade at large vertical effective fields. We conjecture that the Hole wave function in e-Si heterostructures spreads out over distances of ∼10 nm, even at large inversion densities, due to the strain-induced reduction of the out-of-plane effective mass. Relevant experimental and theoretical studies supporting this argument are presented. We further hypothesize that by growing layers thinner than the Hole wave function itself, inversion carriers can be forced to occupy and hybridize the valence bands of different materials. In this article, we show that p-MOSFETs with thin (i.e., <3 nm) e-Si layers grown on Ge-rich Si1−xGex buffers exhibit markedly different Mobility enhancements from prior e-Si p-MOSFETs. Devices fabricated on a thin e-Si layer grown on relaxed Si0.3Ge0.7 demonstrate Hole mobilit...
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Hole Mobility enhancements and alloy scattering limited Mobility in tensile strained si sige surface channel metal oxide semiconductor field effect transistors
Journal of Applied Physics, 2002Co-Authors: Christopher W Leitz, Minjoo L Lee, Z Y Cheng, Matthew T Currie, D A Antoniadis, Eugene A FitzgeraldAbstract:Strained Si-based metal–oxide–semiconductor field-effect transistors (MOSFETs) are promising candidates for next-generation complementary MOS (CMOS) technology. While electron Mobility enhancements in these heterostructures have been thoroughly investigated, Hole Mobility enhancements have not been explored in as much detail. In this study, we investigate the dependence of Hole Mobility in strained Si MOSFETs on substrate Ge content, strained layer thickness, and channel composition. We show that Hole Mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with peak Mobility enhancements over twice that of coprocessed bulk Si devices. These results represent peak Hole mobilities above 200cm2/V-S. Furthermore, we demonstrate that Hole Mobility in strained Si/relaxed Si0.7Ge0.3 heterostructures displays no strong dependence on strained layer thickness, indicating that strain is the primary variable controlling channel Mobility in strained Si p-type MOSFETs (p-MOSFETs). We then ...
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Hole Mobility enhancements in strained si si1 ygey p type metal oxide semiconductor field effect transistors grown on relaxed si1 xgex x y virtual substrates
Applied Physics Letters, 2001Co-Authors: Matthew T Currie, Minjoo L Lee, Z Y Cheng, D A Antoniadis, E A FitzgeraldAbstract:We have achieved peak Hole Mobility enhancement factors of 5.15 over bulk Si in metal-oxide-semiconductor field-effect transistors (MOSFETs) by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates. To further investigate Hole transport in these dual channel structures, we study the effects of strain, alloy scattering, and layer thickness on Hole Mobility enhancements in MOSFETs based upon these layers. We show that significant performance boosts can be obtained despite the effects of alloy scattering and that the best Hole Mobility enhancements are obtained for structures with thin Si surface layers.
Martin Heeney - One of the best experts on this subject based on the ideXlab platform.
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small molecule polymer blend organic transistors with Hole Mobility exceeding 13 cm v 1 s 1
Advanced Materials, 2016Co-Authors: Alexandra F Paterson, Weimin Zhang, Neil D Treat, Gwenhivir Wyattmoon, Hendrik Faber, G Vourlias, P Patsalas, Olga Solomeshch, Nir Tessler, Martin HeeneyAbstract:: A ternary organic semiconducting blend composed of a small-molecule, a conjugated polymer, and a molecular p-dopant is developed and used in solution-processed organic transistors with Hole Mobility exceeding 13 cm(2) V(-1) s(-1) (see the Figure). It is shown that key to this development is the incorporation of the p-dopant and the formation of a vertically phase-separated film microstructure.
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solution processed small molecule polymer blend organic thin film transistors with Hole Mobility greater than 5 cm2 vs
Advanced Materials, 2012Co-Authors: Jeremy Smith, Weimin Zhang, Rachid Sougrat, Kui Zhao, Ruipeng Li, Aram Amassian, Martin Heeney, Iain Mcculloch, Thomas D AnthopoulosAbstract:: Using phase-separated organic semiconducting blends containing a small molecule, as the Hole transporting material, and a conjugated amorphous polymer, as the binder material, we demonstrate solution-processed organic thin-film transistors with superior performance characteristics that include; Hole Mobility >5 cm(2) /Vs, current on/off ratio ≥10(6) and narrow transistor parameter spread. These exceptional characteristics are attributed to the electronic properties of the binder polymer and the advantageous nanomorphology of the blend film.