The Experts below are selected from a list of 996 Experts worldwide ranked by ideXlab platform
Vashishta Priya - One of the best experts on this subject based on the ideXlab platform.
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Scalable Reactive Molecular Dynamics Simulations for Computational Synthesis
IEEE, 2019Co-Authors: Li Ying, Nomura Ken-ichi, Insley, Joseph A., Morozov Vitali, Kumaran Kalyan, Romero, Nichols A., Goddard, William A., Kalia, Rajiv K., Nakano Aiichiro, Vashishta PriyaAbstract:Reactive molecular dynamics (MD) simulation is a powerful research tool for describing chemical reactions. We eliminate the speed-limiting charge iteration in MD with a novel extended-Lagrangian scheme. The extended-Lagrangian reactive MD (XRMD) code drastically improves energy conservation while substantially reducing time-to-solution. Furthermore, we introduce a new polarizable charge equilibration (PQEq) model to accurately predict atomic charges and polarization. The XRMD code based on hybrid message passing+multithreading achieves a weak-scaling parallel efficiency of 0.977 on 786 432 IBM Blue Gene/Q cores for a 67.6 billion-atom system. The performance is portable to the second-generation Intel Xeon Phi, Knights Landing. Blue Gene/Q simulations for the computational synthesis of materials via novel exfoliation mechanisms for synthesizing atomically thin transition metal dichalcogenide layers will dominate nanomaterials science in this century
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Shift-Collapse Acceleration of Generalized Polarizable Reactive Molecular Dynamics for Machine Learning-Assisted Computational Synthesis of Layered Materials
'Institute of Electrical and Electronics Engineers (IEEE)', 2018Co-Authors: Liu Kuang, Nomura Ken-ichi, Kalia, Rajiv K., Nakano Aiichiro, Tiwari Subodh, Sheng Chunyang, Krishnamoorthy Aravind, Hong Sungwook, Rajak Pankaj, Vashishta PriyaAbstract:Reactive molecular dynamics is a powerful simulation method for describing chemical reactions. Here, we introduce a new generalized polarizable reactive force-field (ReaxPQ+) model to significantly improve the accuracy by accommodating the reorganization of surrounding media. The increased computation is accelerated by (1) extended Lagrangian approach to eliminate the speed-limiting charge iteration, (2) shift-collapse computation of many-body renormalized n-tuples, which provably minimizes data transfer, (3) multithreading with round-robin data privatization, and (4) data reordering to reduce computation and allow vectorization. The new code achieves (1) weak-scaling parallel efficiency of 0.989 for 131,072 cores, and (2) eight-fold reduction of time-to-solution (T2S) compared with the original code, on an Intel Knights Landing-based computer. The reduced T2S has for the first time allowed purely computational synthesis of atomically-thin transition metal dichalcogenide layers assisted by machine learning to discover a novel synthetic pathway
Abhinav Vishnu - One of the best experts on this subject based on the ideXlab platform.
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scaling deep learning workloads nvidia dgx 1 pascal and intel Knights Landing
Future Generation Computer Systems, 2020Co-Authors: Nitin A Gawande, Jeff Daily, Nathan R Tallent, Charles Siegel, Abhinav VishnuAbstract:Abstract Deep Learning (DL) algorithms have become ubiquitous in data analytics. As a result, major computing vendors – including NVIDIA, Intel, AMD, and IBM – have architectural road maps influenced by DL workloads. Furthermore, several vendors have recently advertised new computing products as accelerating large DL workloads. Unfortunately, it is difficult for data scientists to quantify the potential of these different products. This paper provides a performance and power analysis of important DL workloads on two major parallel architectures: NVIDIA DGX-1 (eight Pascal P100 GPUs interconnected with NVLink) and Intel Knights Landing (KNL) CPUs interconnected with Intel Omni-Path or Cray Aries. Our evaluation consists of a cross section of convolutional neural net workloads: CifarNet, AlexNet, GoogLeNet, and ResNet50 topologies using the Cifar10 and ImageNet datasets. The workloads are vendor-optimized for each architecture. We use sequentially equivalent implementations to maintain iso-accuracy between parallel and sequential DL models. Our analysis indicates that although GPUs provide the highest overall performance, the gap can close for some convolutional networks; and the KNL can be competitive in performance/watt. We find that NVLink facilitates scaling efficiency on GPUs. However, its importance is heavily dependent on neural network architecture. Furthermore, for weak-scaling – sometimes encouraged by restricted GPU memory – NVLink is less important.
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scaling deep learning workloads nvidia dgx 1 pascal and intel Knights Landing
International Parallel and Distributed Processing Symposium, 2017Co-Authors: Nitin A Gawande, Joshua Landwehr, Jeff Daily, Nathan R Tallent, Abhinav Vishnu, Darren J KerbysonAbstract:Deep Learning (DL) algorithms have become ubiquitous in data analytics. As a result, major computing vendors — including NVIDIA, Intel, AMD and IBM — have architectural road-maps influenced by DL workloads. Furthermore, several vendors have recently advertised new computing products as accelerating DL workloads. Unfortunately, it is difficult for data scientists to quantify the potential of these different products. This paper provides a performance and power analysis of important DL workloads on two major parallel architectures: NVIDIA DGX-1 (eight Pascal P100 GPUs interconnected with NVLink) and Intel Knights Landing (KNL) CPUs interconnected with Intel Omni-Path. Our evaluation consists of a cross section of convolutional neural net workloads: CifarNet, CaffeNet, AlexNet and GoogleNet topologies using the Cifar10 and ImageNet datasets. The workloads are vendor optimized for each architecture. GPUs provide the highest overall raw performance. Our analysis indicates that although GPUs provide the highest overall performance, the gap can close for some convolutional networks; and KNL can be competitive when considering performance/watt. Furthermore, NVLink is critical to GPU scaling.
Mikhail L. Zymbler - One of the best experts on this subject based on the ideXlab platform.
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the use of mpi and openmp technologies for subsequence similarity search in very long time series on a computer cluster system with nodes based on the intel xeon phi Knights Landing many core processor
Numerical Methods and Programming (Vychislitel'nye Metody i Programmirovanie), 2019Co-Authors: Yana Kraeva, Mikhail L. ZymblerAbstract:Nowadays, the subsequence similarity search is required in a wide range of time series mining applications: climate modeling, financial forecasts, medical research, etc. In most of these applications, the Dynamic Time Warping (DTW) similarity measure is used, since DTW is empirically confirmed as one of the best similarity measures for the majority of subject domains. Since the DTW measure has a quadratic computational complexity with respect to the length of query subsequence, a number of parallel algorithms for various many-core architectures are developed, namely FPGA, GPU, and Intel MIC. In this paper we propose a new parallel algorithm for subsequence similarity search in very large time series on computer cluster systems with nodes based on Intel Xeon Phi Knights Landing (KNL) many-core processors. Computations are parallelized on two levels as follows: by MPI at the level of all cluster nodes and by OpenMP within a single cluster node. The algorithm involves additional data structures and redundant computations, which make it possible to efficiently use the capabilities of vector computations on Phi KNL. Experimental evaluation of the algorithm on real-world and synthetic datasets shows that the proposed algorithm is highly scalable.
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Parallel Algorithm for Time Series Discords Discovery on the Intel Xeon Phi Knights Landing Many-core Processor.
arXiv: Distributed Parallel and Cluster Computing, 2019Co-Authors: Andrey Polyakov, Mikhail L. ZymblerAbstract:Discord is a refinement of the concept of anomalous subsequence of a time series. The task of discords discovery is applied in a wide range of subject domains related to time series: medicine, economics, climate modeling, etc. In this paper, we propose a novel parallel algorithm for discords discovery for the Intel Xeon Phi Knights Landing (KNL) many-core systems for the case when input data fit in main memory. The algorithm exploits the ability to independently calculate Euclidean distances between the subsequences of the time series. Computations are paralleled through OpenMP technology. The algorithm consists of two stages, namely precomputations and discovery. At the precomputations stage, we construct the auxiliary matrix data structures, which ensure efficient vectorization of computations on Intel Xeon Phi KNL. At the discovery stage, the algorithm finds discord based upon the structures above. Experimental evaluation confirms the high scalability of the developed algorithm.
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the use of mpi and openmp technologies for subsequence similarity search in very large time series on computer cluster system with nodes based on the intel xeon phi Knights Landing many core processor
arXiv: Distributed Parallel and Cluster Computing, 2018Co-Authors: Yana Kraeva, Mikhail L. ZymblerAbstract:Nowadays, subsequence similarity search is required in a wide range of time series mining applications: climate modeling, financial forecasts, medical research, etc. In most of these applications, the Dynamic TimeWarping (DTW) similarity measure is used since DTW is empirically confirmed as one of the best similarity measure for most subject domains. Since the DTW measure has a quadratic computational complexity w.r.t. the length of query subsequence, a number of parallel algorithms for various many-core architectures have been developed, namely FPGA, GPU, and Intel MIC. In this article, we propose a new parallel algorithm for subsequence similarity search in very large time series on computer cluster systems with nodes based on Intel Xeon Phi Knights Landing (KNL) many-core processors. Computations are parallelized on two levels as follows: through MPI at the level of all cluster nodes, and through OpenMP within one cluster node. The algorithm involves additional data structures and redundant computations, which make it possible to effectively use the capabilities of vector computations on Phi KNL. Experimental evaluation of the algorithm on real-world and synthetic datasets shows that it is highly scalable.
Nitin A Gawande - One of the best experts on this subject based on the ideXlab platform.
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scaling deep learning workloads nvidia dgx 1 pascal and intel Knights Landing
Future Generation Computer Systems, 2020Co-Authors: Nitin A Gawande, Jeff Daily, Nathan R Tallent, Charles Siegel, Abhinav VishnuAbstract:Abstract Deep Learning (DL) algorithms have become ubiquitous in data analytics. As a result, major computing vendors – including NVIDIA, Intel, AMD, and IBM – have architectural road maps influenced by DL workloads. Furthermore, several vendors have recently advertised new computing products as accelerating large DL workloads. Unfortunately, it is difficult for data scientists to quantify the potential of these different products. This paper provides a performance and power analysis of important DL workloads on two major parallel architectures: NVIDIA DGX-1 (eight Pascal P100 GPUs interconnected with NVLink) and Intel Knights Landing (KNL) CPUs interconnected with Intel Omni-Path or Cray Aries. Our evaluation consists of a cross section of convolutional neural net workloads: CifarNet, AlexNet, GoogLeNet, and ResNet50 topologies using the Cifar10 and ImageNet datasets. The workloads are vendor-optimized for each architecture. We use sequentially equivalent implementations to maintain iso-accuracy between parallel and sequential DL models. Our analysis indicates that although GPUs provide the highest overall performance, the gap can close for some convolutional networks; and the KNL can be competitive in performance/watt. We find that NVLink facilitates scaling efficiency on GPUs. However, its importance is heavily dependent on neural network architecture. Furthermore, for weak-scaling – sometimes encouraged by restricted GPU memory – NVLink is less important.
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scaling deep learning workloads nvidia dgx 1 pascal and intel Knights Landing
International Parallel and Distributed Processing Symposium, 2017Co-Authors: Nitin A Gawande, Joshua Landwehr, Jeff Daily, Nathan R Tallent, Abhinav Vishnu, Darren J KerbysonAbstract:Deep Learning (DL) algorithms have become ubiquitous in data analytics. As a result, major computing vendors — including NVIDIA, Intel, AMD and IBM — have architectural road-maps influenced by DL workloads. Furthermore, several vendors have recently advertised new computing products as accelerating DL workloads. Unfortunately, it is difficult for data scientists to quantify the potential of these different products. This paper provides a performance and power analysis of important DL workloads on two major parallel architectures: NVIDIA DGX-1 (eight Pascal P100 GPUs interconnected with NVLink) and Intel Knights Landing (KNL) CPUs interconnected with Intel Omni-Path. Our evaluation consists of a cross section of convolutional neural net workloads: CifarNet, CaffeNet, AlexNet and GoogleNet topologies using the Cifar10 and ImageNet datasets. The workloads are vendor optimized for each architecture. GPUs provide the highest overall raw performance. Our analysis indicates that although GPUs provide the highest overall performance, the gap can close for some convolutional networks; and KNL can be competitive when considering performance/watt. Furthermore, NVLink is critical to GPU scaling.
Avinash Sodani - One of the best experts on this subject based on the ideXlab platform.
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Intel Xeon Phi Processor High Performance Programming: Knights Landing Edition 2nd Edition
2016Co-Authors: Jim Jeffers, James Reinders, Avinash SodaniAbstract:This book is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights Landingspecific details, programming advice, and real-world examples. The authors distill their years of Xeon Phi programming experience coupled with insights from many expert customers Intel Field Engineers, Application Engineers, and Technical Consulting Engineers to create this authoritative book on the essentials of programming for Intel Xeon Phi products. Intel Xeon Phi Processor High-Performance Programming is useful even before you ever program a system with an Intel Xeon Phi processor. To help ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi processors, or other high-performance microprocessors. Applying these techniques will generally increase your program performance on any system and prepare you better for Intel Xeon Phi processors. A practical guide to the essentials for programming Intel Xeon Phi processors Definitive coverage of the Knights Landing architecture Presents best practices for portable, high-performance computing and a familiar and proven threads and vectors programming model Includes real world code examples that highlight usages of the unique aspects of this new highly parallel and high-performance computational productCovers use of MCDRAM, AVX-512, Intel Omni-Path fabric, many-cores (up to 72), and many threads (4 per core)Covers software developer tools, libraries and programming modelsCovers using Knights Landing as a processor and a coprocessor
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Knights Landing: Second-Generation Intel Xeon Phi Product
IEEE Micro, 2016Co-Authors: Avinash Sodani, Roger Gramunt, Jesus Corbal, Krishna N. Vinod, Sundaram Chinthamani, Steven R. Hutsell, Rajat AgarwalAbstract:This article describes the architecture of Knights Landing, the second-generation Intel Xeon Phi product family, which targets high-performance computing and other highly parallel workloads. It provides a significant increase in scalar and vector performance and a big boost in memory bandwidth compared to the prior generation, called Knights Corner. Knights Landing is a self-booting, standard CPU that is completely binary compatible with prior Intel Xeon processors and is capable of running all legacy workloads unmodified. Its innovations include a core optimized for power efficiency, a 512-bit vector instruction set, a memory architecture comprising two types of memory for high bandwidth and large capacity, a high-bandwidth on-die interconnect, and an integrated on-package network fabric. These features enable the Knights Landing processor to provide significant performance improvement for computationally intensive and bandwidth-bound workloads while still providing good performance on unoptimized legacy workloads, without requiring any special way of programming other than the standard CPU programming model.
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chapter 26 quantum chromodynamics
Intel Xeon Phi Processor High Performance Programming (Second Edition)#R##N#Knights Landing Edition, 2016Co-Authors: Jim Jeffers, James Reinders, Avinash SodaniAbstract:Explores Lattice QCD (Quantum Chromodynamics), which models the nuclear strong force that binds matter together, on Knights Landing. Optimization and performance results are discussed.
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Knights Landing architecture
Intel Xeon Phi Processor High Performance Programming (Second Edition)#R##N#Knights Landing Edition, 2016Co-Authors: Jim Jeffers, James Reinders, Avinash SodaniAbstract:Dives deeply into the Knights Landing architecture. Describes the tile and core architecture, as well as the cluster modes and memory modes supported by Knights Landing.
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Knights Landing overview
Intel Xeon Phi Processor High Performance Programming (Second Edition)#R##N#Knights Landing Edition, 2016Co-Authors: Jim Jeffers, James Reinders, Avinash SodaniAbstract:Introduces Knights Landing, a many-core processor that delivers massive thread and data parallelism with high memory bandwidth. Knights Landing is the Second Generation of Intel® Xeon Phi™ products using a many-core architecture which both benefits from, and relies on, parallel programming. Key new innovations such as MCDRAM, cluster modes, and memory modes are explained at a high level.