The Experts below are selected from a list of 264 Experts worldwide ranked by ideXlab platform
Michiel A P Pertijs - One of the best experts on this subject based on the ideXlab platform.
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A Variable-Gain Low-Noise Transimpedance Amplifier for Miniature Ultrasound Probes
IEEE Journal of Solid-State Circuits, 2020Co-Authors: Eunchul Kang, Mingliang Tan, Zu-yao Chang, Philippe Vince, Nicolas Senegond, Tony Mateo, Cyril Meynier, Michiel A P PertijsAbstract:This article presents a low-noise transimpedance Amplifier (TIA) designed for miniature ultrasound probes. It provides continuously variable gain to compensate for the time-dependent attenuation of the received echo signal. This time-gain compensation (TGC) compresses the echo-signal dynamic range (DR) while avoiding imaging artifacts associated with discrete gain steps. Embedding the TGC function in the TIA reduces the output DR, saving power compared to prior solutions that apply TGC after the low-noise Amplifier. The TIA employs a capacitive ladder feedback network and a current-steering circuit to obtain a linear-in-dB gain range of 37 dB. A variable-gain Loop Amplifier based on current-reuse stages maintains constant bandwidth in a power-efficient manner. The TIA has been integrated in a 64-channel ultrasound transceiver application-specific integrated circuit (ASIC) in a 180-nm BCDMOS process and occupies a die area of 0.12 mm2. It achieves a gain error below ±1 dB and a 1.7 pA/ $\surd $ Hz noise floor and consumes 5.2 mW from a ±0.9 V supply. B-mode images of a tissue-mimicking phantom are presented that show the benefits of the TGC scheme.
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Design of a low power time-gain-compensation Amplifier for a 2D piezoelectric ultrasound transducer
2010 IEEE International Ultrasonics Symposium, 2010Co-Authors: Z. Yu, Michiel A P Pertijs, J.g. Bosch, C.t. Lancee, G.c.m. Meijer, N. De JongAbstract:In this paper, a programmable time-gain compensation Amplifier dedicated to a 2D piezoelectric ultrasound transducer is presented. It uses an open-Loop Amplifier structure consisting of a voltage-to-current converter and a current-to-voltage converter. The circuit has been designed in a standard 0.35-μm CMOS process. Simulation and measurement results show that gains of 0dB, 12dB, 26dB and 40dB can be achieved for input signals centered at 6MHz with 80dB dynamic range (100μV to 1V). The measured gain errors at 6MHz are below 1dB for all gain settings. The Amplifier consumes only 130μW when driving a 250fF load.
Andrius Baltuška - One of the best experts on this subject based on the ideXlab platform.
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Sagnac interferometric multipass Loop Amplifier
Optics express, 2012Co-Authors: Stefan Roither, G. Reider, Oliver D. Mücke, Audrius Pugzlys, Aart J. Verhoef, Andrius BaltuškaAbstract:We propose and investigate experimentally an interferometrically stable, polarization-selective pulse multiplexing scheme for direct laser amplification of picosecond pulses. The basic building block of this scheme is a Sagnac Loop which allows for a straightforward scaling of the pulse-multiplexing scheme. Switching the Amplifier from single-pulse amplification to burst mode increases extraction efficiency, reduces parasitic non-linearities in the gain medium and allows for higher output energies. Time-frequency analysis of the amplified output pulses demonstrates the viability of this approach.
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Sagnac-interferometer multipass-Loop Amplifier
2008 Conference on Quantum Electronics and Laser Science Conference on Lasers and Electro-Optics CLEO QELS, 2008Co-Authors: Stefan Roither, G. Reider, Oliver D. Mücke, Audrius Pugzlys, Anton Verhoef, Andrius BaltuškaAbstract:We demonstrate an interferometrically stable pulse multiplexing-amplification- recombination scheme for direct laser amplification of picosecond pulses. Switching from single- pulse amplification to the burst mode increases extraction efficiency, gain in cw-pumped crystals and output energies.
Brian Otis - One of the best experts on this subject based on the ideXlab platform.
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Design of Ultra-Low Power Biopotential Amplifiers for Biosignal Acquisition Applications
IEEE transactions on biomedical circuits and systems, 2012Co-Authors: Fan Zhang, Jeremy Holleman, Brian OtisAbstract:Rapid development in miniature implantable electronics are expediting advances in neuroscience by allowing observation and control of neural activities. The first stage of an implantable biosignal recording system, a low-noise biopotential Amplifier (BPA), is critical to the overall power and noise performance of the system. In order to integrate a large number of front-end Amplifiers in multichannel implantable systems, the power consumption of each Amplifier must be minimized. This paper introduces a closed-Loop complementary-input Amplifier, which has a bandwidth of 0.05 Hz to 10.5 kHz, an input-referred noise of 2.2 μ Vrms, and a power dissipation of 12 μW. As a point of comparison, a standard telescopic-cascode closed-Loop Amplifier with a 0.4 Hz to 8.5 kHz bandwidth, input-referred noise of 3.2 μ Vrms, and power dissipation of 12.5 μW is presented. Also for comparison, we show results from an open-Loop complementary-input Amplifier that exhibits an input-referred noise of 3.6 μ Vrms while consuming 800 nW of power. The two closed-Loop Amplifiers are fabricated in a 0.13 μ m CMOS process. The open-Loop Amplifier is fabricated in a 0.5 μm SOI-BiCMOS process. All three Amplifiers operate with a 1 V supply.
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A Low-Power Low-Noise Open-Loop Amplifier for Neural Recording
Ultra Low-Power Integrated Circuit Design for Wireless Neural Interfaces, 2010Co-Authors: Jeremy Holleman, Fan Zhang, Brian OtisAbstract:The signal path in a neural recording system must typically start with an Amplifier in order to boost the signal levels and buffer the high source impedance. Because of the small signal amplitudes, Amplifier noise must be minimized in order to avoid unnecessary degradation of the signal. Additionally, the high impedance of neural electrodes necessitates a high impedance input.
Gaetano Palumbo - One of the best experts on this subject based on the ideXlab platform.
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ISCAS - Settling-time oriented OTA design through the approximation of the ideal delay
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018Co-Authors: Gianluca Giustolisi, Gaetano PalumboAbstract:In this communication we propose a simple and well-defined approach for the design of fast settling Amplifiers suitable for switched capacitors circuits. The design is based on a settling-time oriented compensation that makes the phase of the closed-Loop Amplifier to be linearly related to the frequency, thus emulating the behavior of an ideal delay, like in a Bessel filter. The design and the simulation of a three-stage Amplifier in a 65-nm CMOS process validate the proposed settling-time oriented approach.
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Analysis and compensation of two-pole Amplifiers with a pole-zero doublet
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 1999Co-Authors: G. Palmisano, Gaetano PalumboAbstract:A simple representation of a two-pole Amplifier with a pole-zero doublet is proposed which can be used in the compensation of transconductance Amplifiers. The model is based on the consideration that a pole-zero doublet does not greatly modify the behavior of the closed-Loop Amplifier. Indeed, assuming an underdamped behavior we have found that the pole-zero doublet only affects the phase margin and, hence, it can accurately be accounted for by properly modifying the second pole of the original two-pole Amplifier. Simulations on a two-stage transconductance Amplifier show that such a model closely agrees with the time response of the real Amplifier.
G.k. Montress - One of the best experts on this subject based on the ideXlab platform.
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Extremely low thermal noise floor, high power oscillators using surface transverse wave devices
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control, 1996Co-Authors: I.d. Avramov, Fred L. Walls, Thomas E. Parker, G.k. MontressAbstract:This paper presents state-of-the-art results on 1-GHz surface transverse wave (STW) oscillators running at extremely high Loop power levels. The high-Q single-mode STW resonators used in these designs have an insertion loss of 3.6 dB, an unloaded Q of 8000, a residual PM noise of -142 dBc/Hz at a 1-Hz carrier offset, and operate at an incident power of up to +31 dBm in the Loop. Other low-Q STW resonators and coupled resonator filters (CRF), with insertion losses in the 5-9 dB range, can conveniently handle power levels in excess of two Watts. These devices were incorporated into voltage controlled oscillators (VCO's) running from a 9.6-V dc source and provide an RF output power of +23 dBm at an RF/dc efficiency of 28%. Their tuning range was 750 kHz and the PM noise floor was -180 dBc/Hz. The oscillators, stabilized with the high-Q devices and using specially designed AB-class power Amplifiers, delivered an output power of +29 dBm and exhibited a PM noise floor of -184 dBc/Hz and a 1-Hz phase noise level of -17 dBc/Hz. The 1-Hz phase noise level was improved to -33 dBc/Hz using a commercially available Loop Amplifier. In this case, the output power was +22 dBm. In all cases studied, the Loop Amplifier was found to be the factor limiting the close-to-carrier oscillator phase noise performance.
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Surface transverse wave oscillators with extremely low thermal noise floors
Proceedings of IEEE 48th Annual Symposium on Frequency Control, 1Co-Authors: I.d. Avramov, Fred L. Walls, Thomas E. Parker, G.k. MontressAbstract:This paper presents state-of-the-art results on 1 GHz surface transverse wave (STW) power oscillators running at extremely high Loop power levels. High-Q single-mode STW resonators used in these designs have an insertion loss of 3.6 dB, an unloaded Q of 8000, a residual phase noise of -142 dBc/Hz at 1 Hz intercept and operate at an incident power of up to 31 dBm in the Loop. Other low-Q STW resonators and coupled resonator filters (CRF) with an insertion loss in the 5-9 dB range can conveniently handle power levels in excess of 2 W. These devices were implemented in voltage controlled oscillators (VCO's) running from a 9.6 V source at an output power of 23 dBm and a RF/dc efficiency of 28%. Their tuning range was 750 kHz and the noise floor -180 dBc/Hz. The oscillators, stabilized with the high-Q devices, use specially designed AB-class power Amplifiers, deliver an output power of 29 dBm and demonstrate a noise floor of -184 dBc/Hz and a 1 Hz intercept of -17 dBc/Hz. The 1 Hz intercept was improved to -33 dBc/Hz using the UTO-1023 as a Loop Amplifier. In this case the output power was 22 dBm. In all cases the Loop Amplifier was the limiting factor for the close-to-carrier oscillator phase noise performance. >
