The Experts below are selected from a list of 8100 Experts worldwide ranked by ideXlab platform
Ram Achar - One of the best experts on this subject based on the ideXlab platform.
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Delay extraction-based passive macromodeling techniques for transmission line type interconnects characterized by tabulated multiport data
Analog Integrated Circuits and Signal Processing, 2009Co-Authors: Andrew Charest, Michel Nakhla, Ram Achar, I. ErdinAbstract:This paper introduces a novel algorithm for delay extraction-based passive macromodeling of multiconductor transmission line type interconnects characterized by multiport (Y, Z, S, or H) tabulated parameters. The algorithm determines a unique logarithm of the H parameters, which is then approximated using a low-order rational function. Subsequently, the DEPACT (delay extraction-based passive compact transmission line macromodel) algorithm is applied to obtain a passive and causal macromodel for SPICE simulation. The new method leads to compact, low-order Macromodels resulting in faster transient simulations.
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Fast transient analysis of incident field coupling to multiconductor transmission lines
IEEE Transactions on Electromagnetic Compatibility, 2006Co-Authors: G. Shinh, Anestis Dounavis, Ram Achar, Michel Nakhla, N. Nakhla, I. ErdinAbstract:Due to the rapid surge in operating frequencies and complexity of modern electronic designs, accurate/fast electromagnetic compatibility/interference analysis is becoming mandatory. This paper presents a closed-form SPICE macromodel for fast transient analysis of lossy multiconductor transmission lines in the presence of incident electromagnetic fields. In the proposed algorithm, the equivalent sources due to incident field coupling have been formulated so as to take an advantage of the recently developed delay extraction based passive transmission line Macromodels. Also, a method to incorporate frequency-dependent per-unit-length parameters is presented. The time-domain macromodel is in the form of ordinary differential equations and can be easily included in SPICE like simulators for transient analysis. The proposed algorithm while guaranteeing the stability of the simulation by employing passive transmission line macromodel, provides significant speed-up for the incident field coupling analysis of multiconductor transmission line networks, especially with large delay and low losses
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DEPACT: delay extraction-based passive compact transmission-line macromodeling algorithm
IEEE Transactions on Advanced Packaging, 2005Co-Authors: N. Nakhla, Anestis Dounavis, Ram AcharAbstract:With the continually increasing operating frequencies, signal integrity and interconnect analysis in high-speed designs is becoming increasingly important. Recently, several algorithms were proposed for macromodeling and transient analysis of distributed transmission line interconnect networks. The techniques such as method-of-characteristics (MoC) yield fast transient results for long delay lines. However, they do not guarantee the passivity of the macromodel. It has been demonstrated that preserving passivity of the macromodel is essential to guarantee a stable global transient simulation. On the other hand, methods such as matrix rational approximation (MRA) provide efficient Macromodels for lossy coupled lines, while preserving the passivity. However, for long lossy delay lines this may require higher order approximations, making the macromodel inefficient. To address the above difficulties, this paper presents a new algorithm for passive and compact macromodeling of distributed transmission lines. The proposed method employs delay extraction prior to approximating the exponential stamp to generate compact Macromodels, while ensuring the passivity. Validity and efficiency of the proposed algorithm is demonstrated using several benchmark examples
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Passivity verification in delay-based Macromodels of electrical interconnects
IEEE Transactions on Circuits and Systems I: Regular Papers, 2005Co-Authors: Changzhong Chen, Michel Nakhla, Ram AcharAbstract:This paper presents a new theory that addresses the issue of passivity in Macromodels of electrical interconnects constructed based on the method of characteristics (MoC). The proposed approach develops a new algebraic test to check for passivity in Macromodels generated using MoC. The theory behind the developed test is based on deriving the necessary and sufficient conditions for the loss of positive-realness in the admittance matrix of the developed macromodel. An algorithmic procedure is proposed to verify passivity of general Macromodels derived from the MoC. The results presented in this paper can be employed to test for positive-realness in dynamical systems described by algebraic delay-differential equations with discrete commensurate delays.
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Fast transient analysis of incident field coupling to multiconductor transmission lines
2004 10th International Symposium on Antenna Technology and Applied Electromagnetics and URSI Conference, 2004Co-Authors: G. Shinh, I. Erdin, Ram Achar, Michel Nakhla, N. Nakhla, Anestis DounavisAbstract:This paper presents an algorithm for fast transient analysis of multiconductor transmission line interconnects in the presence of incident fields. In the proposed approach: (a) The formulation of equivalent external sources due to incident fields is independent of the type of the macromodel used to represent the MTL system and can be represented analytically in the time-domain solely based on the information of per-unit-length parameters of the line and incident field parameters, (b) An efficient passive macromodel based on delay extraction and closed-form representation is used to describe the distributed nature of the MTL stamp. The time-domain macromodel is in the form of ordinary differential equations and can be easily included in SPICE like simulators for transient analysis. The proposed algorithm, while guaranteeing the stability of the simulation by employing passive Macromodels, provides significant speed-up for transmission line networks, especially with large delay and low-losses.
Michel Nakhla - One of the best experts on this subject based on the ideXlab platform.
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Delay extraction-based passive macromodeling techniques for transmission line type interconnects characterized by tabulated multiport data
Analog Integrated Circuits and Signal Processing, 2009Co-Authors: Andrew Charest, Michel Nakhla, Ram Achar, I. ErdinAbstract:This paper introduces a novel algorithm for delay extraction-based passive macromodeling of multiconductor transmission line type interconnects characterized by multiport (Y, Z, S, or H) tabulated parameters. The algorithm determines a unique logarithm of the H parameters, which is then approximated using a low-order rational function. Subsequently, the DEPACT (delay extraction-based passive compact transmission line macromodel) algorithm is applied to obtain a passive and causal macromodel for SPICE simulation. The new method leads to compact, low-order Macromodels resulting in faster transient simulations.
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Fast transient analysis of incident field coupling to multiconductor transmission lines
IEEE Transactions on Electromagnetic Compatibility, 2006Co-Authors: G. Shinh, Anestis Dounavis, Ram Achar, Michel Nakhla, N. Nakhla, I. ErdinAbstract:Due to the rapid surge in operating frequencies and complexity of modern electronic designs, accurate/fast electromagnetic compatibility/interference analysis is becoming mandatory. This paper presents a closed-form SPICE macromodel for fast transient analysis of lossy multiconductor transmission lines in the presence of incident electromagnetic fields. In the proposed algorithm, the equivalent sources due to incident field coupling have been formulated so as to take an advantage of the recently developed delay extraction based passive transmission line Macromodels. Also, a method to incorporate frequency-dependent per-unit-length parameters is presented. The time-domain macromodel is in the form of ordinary differential equations and can be easily included in SPICE like simulators for transient analysis. The proposed algorithm while guaranteeing the stability of the simulation by employing passive transmission line macromodel, provides significant speed-up for the incident field coupling analysis of multiconductor transmission line networks, especially with large delay and low losses
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Passivity verification in delay-based Macromodels of electrical interconnects
IEEE Transactions on Circuits and Systems I: Regular Papers, 2005Co-Authors: Changzhong Chen, Michel Nakhla, Ram AcharAbstract:This paper presents a new theory that addresses the issue of passivity in Macromodels of electrical interconnects constructed based on the method of characteristics (MoC). The proposed approach develops a new algebraic test to check for passivity in Macromodels generated using MoC. The theory behind the developed test is based on deriving the necessary and sufficient conditions for the loss of positive-realness in the admittance matrix of the developed macromodel. An algorithmic procedure is proposed to verify passivity of general Macromodels derived from the MoC. The results presented in this paper can be employed to test for positive-realness in dynamical systems described by algebraic delay-differential equations with discrete commensurate delays.
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Fast transient analysis of incident field coupling to multiconductor transmission lines
2004 10th International Symposium on Antenna Technology and Applied Electromagnetics and URSI Conference, 2004Co-Authors: G. Shinh, I. Erdin, Ram Achar, Michel Nakhla, N. Nakhla, Anestis DounavisAbstract:This paper presents an algorithm for fast transient analysis of multiconductor transmission line interconnects in the presence of incident fields. In the proposed approach: (a) The formulation of equivalent external sources due to incident fields is independent of the type of the macromodel used to represent the MTL system and can be represented analytically in the time-domain solely based on the information of per-unit-length parameters of the line and incident field parameters, (b) An efficient passive macromodel based on delay extraction and closed-form representation is used to describe the distributed nature of the MTL stamp. The time-domain macromodel is in the form of ordinary differential equations and can be easily included in SPICE like simulators for transient analysis. The proposed algorithm, while guaranteeing the stability of the simulation by employing passive Macromodels, provides significant speed-up for transmission line networks, especially with large delay and low-losses.
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enforcing passivity for rational function based Macromodels of tabulated data
Electrical Performance of Electronic Packaging, 2003Co-Authors: D Saraswat, Ram Achar, Michel NakhlaAbstract:With the continually increasing operating frequencies, complex high-speed package and interconnect modules require characterization based on measured/simulated data. Several efficient algorithms were recently suggested for macromodeling of such data to enable transient analysis in the presence of external circuit elements. One of the difficult issues involved here is the passivity violations associated with the computed macromodel. To address this issue, an efficient algorithm is presented in this paper to enforce passivity for Macromodels with passivity violations.
Jaijeet Roychowdhury - One of the best experts on this subject based on the ideXlab platform.
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General-purpose nonlinear model-order reduction using piecewise-polynomial representations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2008Co-Authors: Ning Dong, Jaijeet RoychowdhuryAbstract:We present algorithms for automated macromodeling of nonlinear mixed-signal system blocks. A key feature of our methods is that they automate the generation of general-purpose Macromodels that are suitable for a wide range of time- and frequency-domain analyses important in mixed-signal design flows. In our approach, a nonlinear circuit or system is approximated using piecewise-polynomial (PWP) representations. Each polynomial system is reduced to a smaller one via weakly nonlinear polynomial model-reduction methods. Our approach, dubbed PWP, generalizes recent trajectory-based piecewise-linear approaches and ties them with polynomial-based model-order reduction, which inherently captures stronger nonlinearities within each region. PWP-generated Macromodels not only reproduce small-signal distortion and intermodulation properties well but also retain fidelity in large-signal transient analyses. The reduced models can be used as drop-in replacements for large subsystems to achieve fast system-level simulation using a variety of time- and frequency-domain analyses (such as dc, ac, transient, harmonic balance, etc.). For the polynomial reduction step within PWP, we also present a novel technique dubbed multiple pseudoinput (MPI) that combines concepts from proper orthogonal decomposition with Krylov-subspace projection. We illustrate the use of PWP and MPI with several examples (including op-amps and I/O buffers) and provide important implementation details. Our experiments indicate that it is easy to obtain speedups of about an order of magnitude with push-button nonlinear macromodel-generation algorithms.
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fast pll simulation using nonlinear vco Macromodels for accurate prediction of jitter and cycle slipping due to loop non idealities and supply noise
Asia and South Pacific Design Automation Conference, 2005Co-Authors: Xiaolue Lai, Yayun Wan, Jaijeet RoychowdhuryAbstract:Phase-locked loops (PLLs) are widely used in electronic systems. As PLL malfunction is one of the most important factors in re-fabs of SoCs, fast simulation of PLLs to capture non-ideal behavior accurately is an immediate, pressing need in the semiconductor design industry. In this paper, we present a nonlinear macro model based PLL simulation technique that is considerably more accurate than prior linear PLL simulation techniques. Our method is able to accurately capture transient behavior and faithfully estimate timing jitter in noisy PLLs. We demonstrate the proposed technique on ring and LC voltage-controlled oscillator (VCO) based PLLs, and compare results against linear PLL Macromodels and full SPICE-level simulation. We show that, unlike prior linear macromodel based approaches, the proposed nonlinear technique captures the dynamics of complex phenomena such as locking, cycle slipping and power supply noise induced PLL jitter, replicating qualitative features from full SPICE simulations accurately while providing speedups of over two orders of magnitude.
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automated extraction of broadly applicable nonlinear analog Macromodels from spice level descriptions
Custom Integrated Circuits Conference, 2004Co-Authors: N Dong, Jaijeet RoychowdhuryAbstract:Automated techniques for generating Macromodels from SPICE-level circuit descriptions are rapidly gaining importance as a sustainable methodology for the design of large, complex mixed-signal SoCs and SiPs. We demonstrate the efficacy of a novel macromodel extraction technique, dubbed piecewise polynomial (PWP), for extracting broadly-applicable general-purpose Macromodels from SPICE netlists. A key advantage of PWP over other methods is that it can generate a single macromodel that captures linear, weakly nonlinear and strongly non near system dynamics. We demonstrate the application of PWP using a current-mirror op-amp, comparing simulations of the macromodel against those of the original SPICE circuit using DC, AC, harmonic balance and transient analyses. We also illustrate how PWP-generated Macromodels can be used for system-level simulation using a simple analog-digital converter example. We confirm excellent accuracies, relative to full SPICE circuit simulation, while achieving order-of-magnitude speedups.
Jack Roos - One of the best experts on this subject based on the ideXlab platform.
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Comparison of reduced-order interconnect Macromodels for time-domain simulation
IEEE Transactions on Microwave Theory and Techniques, 2004Co-Authors: Timo Palenius, Jack RoosAbstract:A typical integrated-circuit model consists of nonlinear transistor models and large linear RLC networks describing the interconnects. During the last decade, various model-reduction algorithms have been developed for replacing each RLC network with an approximately equivalent, but much smaller, model. Since these reduced-order models are described in the frequency domain, they have to be linked to the transient analysis of the whole nonlinear circuit, which can be done by replacing these models with appropriate Macromodels. In the interconnect literature, the actual macromodel realization, which has a great impact on the transient-simulation CPU time, is often overlooked. This paper presents a comprehensive comparison of nine reduced-order interconnect Macromodels for time-domain simulation: the Macromodels are reviewed, presented in a unified manner, and compared both theoretically and numerically. Since we have implemented all the nine Macromodels into the APLAC circuit simulation and design tool, we are able to present a fair and meaningful CPU-time comparison.
W H A Schilders - One of the best experts on this subject based on the ideXlab platform.
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fast and accurate time domain simulations of integer n plls
IEEE Transactions on Circuits and Systems I-regular Papers, 2017Co-Authors: Giovanni De Luca, Pascal Bolcato, Remi Larcheveque, Joost Rommes, W H A SchildersAbstract:We present a methodology to simulate industrial integer- $N$ phase-locked loops (PLLs) at a verification level, as accurate as and faster than transistor-level simulation. The accuracy is measured on the PLL factors of interest, i.e., locking time, power consumption, phase noise and jitter (period and long-term). The speedup factor tends to the division ratio $N$ for device-noise simulations. We develop a unifying technique which is able to deal with both noise-free and device-noise analyses, taking into account nonlinear and second-order effects visible at transistor-level simulation only, whereas previous works focused on one of the two analyses, separately. The procedure is based on oscillator’s sensitivity analysis and on the creation of a phase macromodel for the voltage-controlled oscillator (VCO) together with the loop divider (the phase model is called VCODIV), whilst the other PLL’s blocks remain at transistor level. The macromodel’s phase law is characterized by a piecewise linear curve, representing the sensitivity of the VCODIV output’s phase deviation with respect to the voltage variation of the VCO’s control pin, and by the effects of all the VCO’s and divider’s noise sources on the model’s output. We show two experiments on industrial PLLs, and provide guidelines for designers which highlight the steps needed to implement the methodology by using well-known analyses in circuit simulation and Verilog-A for the creation of the macromodel.
