Majority Carriers

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C.r. Viswanathan - One of the best experts on this subject based on the ideXlab platform.

  • Quasi-static behavior of MOS devices in the freeze-out regime
    IEEE Transactions on Electron Devices, 1995
    Co-Authors: Ramachandra Divakaruni, C.r. Viswanathan
    Abstract:

    The quasi-static CV curves (low-frequency C-V curves) measured in the freeze-out regime of MOS transistors result in peaks near the accumulation or inversion regions depending on the direction of the voltage sweep. In this paper, we report a study of these peaks in n- and p-channel CMOS transistors within and outside compensating wells. The peaks in the quasi-static CV curves are attributed to the capture of minority Carriers near inversion by the interface states and the capture of Majority Carriers by the interface states near accumulation.

  • Activation Energy Determination from Low-Temperature CV Dispersion
    IEEE Transactions on Electron Devices, 1994
    Co-Authors: Ramachandra Divakaruni, Venkatraman Prabhakar, C.r. Viswanathan
    Abstract:

    The response of the semiconductor device at low temperatures to changes in the voltage across the depletion region is limited by the dielectric relaxation time of the Majority Carriers in the bulk region. This results in a dispersion of the CV curves at low temperatures [1]. In this paper, we report a study of the dispersion seen in the accumulation and depletion regions of the C-V curve in n- and p-channel MOS transistors as well as in reverse biased one-sided abrupt junctions. From the admittance measured as a function of temperature and frequency the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices.

  • Activation energy determination from low-temperature CV dispersion [semiconductor devices]
    IEEE Transactions on Electron Devices, 1994
    Co-Authors: Ramachandra Divakaruni, Venkatraman Prabhakar, C.r. Viswanathan
    Abstract:

    The response of semiconductor devices at low temperatures to changes in the voltage across the depletion region is limited by the dielectric relaxation time of the Majority Carriers in the bulk region. This results in a dispersion of the C-V curves at low temperatures. In this paper, we report a study of the dispersion seen in the accumulation and depletion regions of the C-V curve in n- and p-channel MOS transistors as well as in reverse biased one-sided abrupt junctions. From the admittance measured as a function of temperature and frequency, the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices.

Ramachandra Divakaruni - One of the best experts on this subject based on the ideXlab platform.

  • Quasi-static behavior of MOS devices in the freeze-out regime
    IEEE Transactions on Electron Devices, 1995
    Co-Authors: Ramachandra Divakaruni, C.r. Viswanathan
    Abstract:

    The quasi-static CV curves (low-frequency C-V curves) measured in the freeze-out regime of MOS transistors result in peaks near the accumulation or inversion regions depending on the direction of the voltage sweep. In this paper, we report a study of these peaks in n- and p-channel CMOS transistors within and outside compensating wells. The peaks in the quasi-static CV curves are attributed to the capture of minority Carriers near inversion by the interface states and the capture of Majority Carriers by the interface states near accumulation.

  • Activation Energy Determination from Low-Temperature CV Dispersion
    IEEE Transactions on Electron Devices, 1994
    Co-Authors: Ramachandra Divakaruni, Venkatraman Prabhakar, C.r. Viswanathan
    Abstract:

    The response of the semiconductor device at low temperatures to changes in the voltage across the depletion region is limited by the dielectric relaxation time of the Majority Carriers in the bulk region. This results in a dispersion of the CV curves at low temperatures [1]. In this paper, we report a study of the dispersion seen in the accumulation and depletion regions of the C-V curve in n- and p-channel MOS transistors as well as in reverse biased one-sided abrupt junctions. From the admittance measured as a function of temperature and frequency the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices.

  • Activation energy determination from low-temperature CV dispersion [semiconductor devices]
    IEEE Transactions on Electron Devices, 1994
    Co-Authors: Ramachandra Divakaruni, Venkatraman Prabhakar, C.r. Viswanathan
    Abstract:

    The response of semiconductor devices at low temperatures to changes in the voltage across the depletion region is limited by the dielectric relaxation time of the Majority Carriers in the bulk region. This results in a dispersion of the C-V curves at low temperatures. In this paper, we report a study of the dispersion seen in the accumulation and depletion regions of the C-V curve in n- and p-channel MOS transistors as well as in reverse biased one-sided abrupt junctions. From the admittance measured as a function of temperature and frequency, the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices.

E F Da Silva - One of the best experts on this subject based on the ideXlab platform.

  • trapping of Majority Carriers in sio2 4h sic structures
    Journal of Physics D, 2009
    Co-Authors: Rodrigo Palmieri, Claudio Radtke, Mickael Messias Rodrigues Da Silva, H Boudinov, E F Da Silva
    Abstract:

    We compared SiO2/SiC interface characteristics for three different oxidation processes (dry-oxygen, water-containing oxygen and water-containing nitrogen atmospheres). Metal-oxide-semiconductor (MOS) structures were fabricated on 8 ◦ off-axis 4H-SiC(0001) n- and p-type epitaxial wafers. Electrical characteristics were obtained by I –V measurements, high-frequency capacitance–voltage (C–V ) and ac conductance (G–V and G–ω) methods. The samples were also characterized by x-ray photoelectron spectroscopy. Results evidence a remarkable difference between n- and p-type doped samples. The p-type samples showed effective oxide charge density up to three orders of magnitude higher than n-type. This fact was explained by the capturing of Majority Carriers in near interface oxide traps.

  • Trapping of Majority Carriers in SiO2/4H-SiC structures
    Journal of Physics D, 2009
    Co-Authors: Rodrigo Palmieri, Claudio Radtke, Mickael Messias Rodrigues Da Silva, H Boudinov, E F Da Silva
    Abstract:

    We compared SiO2/SiC interface characteristics for three different oxidation processes (dry-oxygen, water-containing oxygen and water-containing nitrogen atmospheres). Metal-oxide-semiconductor (MOS) structures were fabricated on 8 ◦ off-axis 4H-SiC(0001) n- and p-type epitaxial wafers. Electrical characteristics were obtained by I –V measurements, high-frequency capacitance–voltage (C–V ) and ac conductance (G–V and G–ω) methods. The samples were also characterized by x-ray photoelectron spectroscopy. Results evidence a remarkable difference between n- and p-type doped samples. The p-type samples showed effective oxide charge density up to three orders of magnitude higher than n-type. This fact was explained by the capturing of Majority Carriers in near interface oxide traps.

J E Carceller - One of the best experts on this subject based on the ideXlab platform.

  • evolution of electrical magnitudes in gradual p n junctions with deep levels during the emission of Majority Carriers
    Journal of Applied Physics, 1992
    Co-Authors: J A Jimeneztejada, P Cartujo, J A Lopezvillanueva, J Vicente, J E Carceller
    Abstract:

    A real (nonabrupt) p‐n junction has been theoretically analyzed. It consists of a graded profile of shallow dopant atoms and a uniform profile of deep impurities, their relative concentrations varying along the structure (i.e., there are regions where deep impurity concentration is highest and others where dopant concentration dominates). This type of structure was excited by Majority‐carrier pulses, which allowed us to describe and explain new components in the charge distribution through the junction. The change in the interpretation of results from the application of capacitance techniques to these samples is quite remarkable. The validity of the theory is verified by comparison with experimental results obtained for silicon p‐n junctions highly doped with platinum. The detailed analysis of the electrical model of a gradual junction with two deep levels, located in both halves of the band gap has allowed us to explain the following: (a) the disappearance of peaks in deep level transient spectroscopy (D...

Feng Tso Chien - One of the best experts on this subject based on the ideXlab platform.